(yes, this is different from R_ARM_CALL)
- Adds a new method getARMBranchTargetOpValue() which handles the
necessary distinction between the conditional and unconditional br/bl
needed for ARM/ELF
At least for ARM mode, the needed fixup for conditional versus unconditional
br/bl is identical, but the ARM docs and existing ARM tools expect this
reloc type...
Added a few FIXME's for future naming fixups in ARMInstrInfo.td
llvm-svn: 124895
- Fixed :upper16: fix up routine. It should be shifting down the top 16 bits first.
- Added support for Thumb2 :lower16: and :upper16: fix up.
- Added :upper16: and :lower16: relocation support to mach-o object writer.
llvm-svn: 123424
IsSymbolRefDifferenceFullyResolved, it turns out this does change behavior on
enough cases for x86-32 that I would rather wait a bit on it.
- In practice, we will want to change this eventually because it only means we
generate less relocations (it also eliminates the need for the horrible
'.set' hack that Darwin requires in some places).
llvm-svn: 122042
- Unlike for fixups, we always do the "reliable" thing (not just for x86_64).
- Since Darwin 'as' would typically reject things that using this will allow,
we don't need to worry about compatibility.
llvm-svn: 122038
actuall addresses in a .o file, so it is better to let the MachO writer compute
it.
This is good for two reasons. First, areas that shouldn't care about
addresses now don't have access to it. Second, the layout of each section
is independent. I should use this in a subsequent commit to speed it up.
Most of the patch is just removing the section address computation. The two
interesting parts are the change on how we handle padding in the end
of sections and how MachO can get the address of a-b when a and b are in
different sections.
Since now the expression evaluation normally doesn't know the section address,
it will think that a-b needs relocation and let the MachO writer know. Once
it has computed the section addresses, it calls back the expression evaluation
with the section addresses to resolve these expressions.
The remaining problem is the handling of padding. Currently it will create
a special alignment fragment at the end. Since that fragment doesn't update
the alignment of the section, it needs the real address to be computed.
Since now the layout will not compute a-b with a and b in different sections,
the only effect that the special alignment fragment has is update the
address size of the section. This can also be done by the MachO writer.
llvm-svn: 121076
where both symbols are "local", that is non-external symbols, and there is
no "base" for the symbols used in the expression, that is the section has
no non-temporary symbols. This case looks like this:
% cat local_reloc_A-B.s
.long 0
LB: .long 1
.long LA - LB - 4
.long 2
LA: .long 3
which llvm-mc will not encode without this patch, generates a "unsupported
local relocations in difference" error, but the Darwin assembler will
encode with relocation entries like this:
% otool -rv a.out l.out
a.out:
Relocation information (__TEXT,__text) 2 entries
address pcrel length extern type scattered symbolnum/value
00000008 False long False SUB False 1 (__TEXT,__text)
00000008 False long False UNSIGND False 1 (__TEXT,__text)
which is very similar to what is encoded when the symbols don't have the
leading 'L' and they are not temporary symbols. Which llvm-mc and the
Darwin assembler will encoded like this:
Relocation information (__TEXT,__text) 2 entries
address pcrel length extern type scattered symbolnum/value
00000008 False long True SUB False B
00000008 False long True UNSIGND False A
This is the missing relocation encoding needed to allow the Mach-O x86
Dwarf file and line table to be emitted. So this patch also removes the
TODO from the if() statement in MCMachOStreamer::Finish() that didn't
call MCDwarfFileTable::Emit() for 64-bit targets.
llvm-svn: 115389
Jason W Kim