virtual bool
ABI::StackUsesFrames () = 0;
Should return true if your ABI uses frames when doing stack backtraces. This
means a frame pointer is used that points to the previous stack frame in some
way or another.
virtual bool
ABI::CallFrameAddressIsValid (lldb::addr_t cfa) = 0;
Should take a look at a call frame address (CFA) which is just the stack
pointer value upon entry to a function. ABIs usually impose alignment
restrictions (4, 8 or 16 byte aligned), and zero is usually not allowed.
This function should return true if "cfa" is valid call frame address for
the ABI, and false otherwise. This is used by the generic stack frame unwinding
code to help determine when a stack ends.
virtual bool
ABI::CodeAddressIsValid (lldb::addr_t pc) = 0;
Validates a possible PC value and returns true if an opcode can be at "pc".
Some ABIs or architectures have fixed width instructions and must be aligned
to a 2 or 4 byte boundary. "pc" can be an opcode or a callable address which
means the load address might be decorated with extra bits (such as bit zero
to indicate a thumb function call for ARM targets), so take this into account
when returning true or false. The address should also be validated to ensure
it is a valid address for the address size of the inferior process. 32 bit
targets should make sure the address is less than UINT32_MAX.
Modified UnwindLLDB to use the new ABI functions to help it properly terminate
stacks.
Modified the mach-o function that extracts dependent files to not resolve the
path as the paths inside a binary might not match those on the current
host system.
llvm-svn: 132021
can end up with an invalid path if the path resolves to something different
on the local machine. It is very important not to since remote debugging will
mention paths that might exist on the current machine (like
"/System/Library/Frameworks/CoreFoundation/CoreFoundation" which on the desktop
systems is a symlink to "/System/Library/Frameworks/CoreFoundation/Versions/A/CoreFoundation").
We will let the platform plug-ins resolve the paths in a later stage.
llvm-svn: 131934
parse NOP instructions. I added the new table entries for the NOP for the
plain NOP, Yield, WFE, WFI, and SEV variants. Modified the opcode emulation
function EmulateInstructionARM::EmulateMOVRdSP(...) to notify us when it is
creating a frame. Also added an abtract way to detect the frame pointer
register for both the standard ARM ABI and for Darwin.
Fixed GDBRemoteRegisterContext::WriteAllRegisterValues(...) to correctly be
able to individually write register values back if case the 'G' packet is
not implemented or returns an error.
Modified the StopInfoMachException to "trace" stop reasons. On ARM we currently
use the BVR/BCR register pairs to say "stop when the PC is not equal to the
current PC value", and this results in a EXC_BREAKPOINT mach exception that
has 0x102 in the code.
Modified debugserver to create the short option string from long option
definitions to make sure it doesn't get out of date. The short option string
was missing many of the newer short option values due to a modification of
the long options defs, and not modifying the short option string.
llvm-svn: 131911
so that both the opcode and the operands are aligned with the rest of output.
Comment out the code related to force_raw mode when disassembling arm or thumb for now.
It testing goes ok, we will remove the section of code related to force_raw.
llvm-svn: 131910
of duplicated code from appearing all over LLDB:
lldb::addr_t
Process::ReadPointerFromMemory (lldb::addr_t vm_addr, Error &error);
bool
Process::WritePointerToMemory (lldb::addr_t vm_addr, lldb::addr_t ptr_value, Error &error);
size_t
Process::ReadScalarIntegerFromMemory (lldb::addr_t addr, uint32_t byte_size, bool is_signed, Scalar &scalar, Error &error);
size_t
Process::WriteScalarToMemory (lldb::addr_t vm_addr, const Scalar &scalar, uint32_t size, Error &error);
in lldb_private::Process the following functions were renamed:
From:
uint64_t
Process::ReadUnsignedInteger (lldb::addr_t load_addr,
size_t byte_size,
Error &error);
To:
uint64_t
Process::ReadUnsignedIntegerFromMemory (lldb::addr_t load_addr,
size_t byte_size,
uint64_t fail_value,
Error &error);
Cleaned up a lot of code that was manually doing what the above functions do
to use the functions listed above.
Added the ability to get a scalar value as a buffer that can be written down
to a process (byte swapping the Scalar value if needed):
uint32_t
Scalar::GetAsMemoryData (void *dst,
uint32_t dst_len,
lldb::ByteOrder dst_byte_order,
Error &error) const;
The "dst_len" can be smaller that the size of the scalar and the least
significant bytes will be written. "dst_len" can also be larger and the
most significant bytes will be padded with zeroes.
Centralized the code that adds or removes address bits for callable and opcode
addresses into lldb_private::Target:
lldb::addr_t
Target::GetCallableLoadAddress (lldb::addr_t load_addr, AddressClass addr_class) const;
lldb::addr_t
Target::GetOpcodeLoadAddress (lldb::addr_t load_addr, AddressClass addr_class) const;
All necessary lldb_private::Address functions now use the target versions so
changes should only need to happen in one place if anything needs updating.
Fixed up a lot of places that were calling :
addr_t
Address::GetLoadAddress(Target*);
to call the Address::GetCallableLoadAddress() or Address::GetOpcodeLoadAddress()
as needed. There were many places in the breakpoint code where things could
go wrong for ARM if these weren't used.
llvm-svn: 131878
and set the address as an opcode address or as a callable address. This is
needed in various places in the thread plans to make sure that addresses that
might be found in symbols or runtime might already have extra bits set (ARM/Thumb).
The new functions are:
bool
Address::SetCallableLoadAddress (lldb::addr_t load_addr, Target *target);
bool
Address::SetOpcodeLoadAddress (lldb::addr_t load_addr, Target *target);
SetCallableLoadAddress will initialize a section offset address if it can,
and if so it might possibly set some bits in the address to make the address
callable (bit zero might get set for ARM for Thumb functions).
SetOpcodeLoadAddress will initialize a section offset address using the
specified target and it will strip any special address bits if needed
depending on the target.
Fixed the ABIMacOSX_arm::GetArgumentValues() function to require arguments
1-4 to be in the needed registers (previously this would incorrectly fallback
to the stack) and return false if unable to get the register values. The
function was also modified to first look for the generic argument registers
and then fall back to finding the registers by name.
Fixed the objective trampoline handler to use the new Address::SetOpcodeLoadAddress
function when needed to avoid address mismatches when trying to complete
steps into objective C methods. Make similar fixes inside the
AppleThreadPlanStepThroughObjCTrampoline::ShouldStop() function.
Modified ProcessGDBRemote::BuildDynamicRegisterInfo(...) to be able to deal with
the new generic argument registers.
Modified RNBRemote::HandlePacket_qRegisterInfo() to handle the new generic
argument registers on the debugserver side.
Modified DNBArchMachARM::NumSupportedHardwareBreakpoints() to be able to
detect how many hardware breakpoint registers there are using a darwin sysctl.
Did the same for hardware watchpoints in
DNBArchMachARM::NumSupportedHardwareWatchpoints().
llvm-svn: 131834
a branch instruction and therefore the symbolic information is not being dumped for
non-raw mode.
The problem is that the ARMAsmParser is not recognizing the "#274" in "b #274"
as a valid operand when doing disassembly in non-raw mode.
llvm-svn: 131738
In DWARFCompileUnit::ExtractDIEsIfNeeded we are relying on a compilation units
DIEs to be terminated by a null entry. I think the standard is fairly clear
that all sibling chains are to be terminated by null, but at least gcc 4.5.2
disagrees -- the top level chain drops the final entry. This results in us
interpreting the next compilation unit header as a DIE.
Regardless of whether gcc is right or wrong, we should not overstep a
compilation units extent. This patch ensures that we do not attempt to extract
a DIE beyond the length specified for a given DWARFCompileUnit by ensuring our
current offset is strictly less than the start of the next CU.
llvm-svn: 131721
the "payload_length" argument for the "payload" packet data. This meant we
could end up sending random extra data with a packet depending on how the
packet was constructed.
Fixed GDBRemoteRegisterContext to properly save and restore all registers.
Previous fixes had been added to work around the "payload_length" issues fixed
above and aren't needed anymore.
Fix logging in GDBRemoteCommunication to make sure we log the correct packet
data being sent by using the packet length when dumping the packet contents.
Added register definitions for 'arm-lldb' in the "disasm-gdb-remote.pl" script
so if you have a register dump from the GDB remote that doesn't include the
qRegisterInfo packets, you can manually tell the script which registers are
which.
llvm-svn: 131715
Mac OS X Process plugin from the build.
I'm surprised no one caught this earlier. Am I the only one who builds with
the makefiles on Mac?
llvm-svn: 131704
Removed ifdeffed out functions and added the implementation of
WriteRegister for x86_64 architecture.
Signed-off-by: Johnny Chen <johnny.chen@apple.com>
llvm-svn: 131696
Host.cpp was missing Error.h and the implementation of
LaunchProcess. Once againg I have added a "fake" implementation
waiting for a real one.
Fixed the call GetAddressRange to reflect the new interface in
DynamicLoaderLinuxDYLD.cpp.
Added string.h to ARM_DWARF_Registers.cpp that is needed for ::memset.
Signed-off-by: Johnny Chen <johnny.chen@apple.com>
llvm-svn: 131695
Fixed ThreadPlanCallFunction::ReportRegisterState(...) to only dump when
verbose logging is enabled and fixed the function to use the new
RegisterValue method of reading registers.
Fixed the GDB remote client to not send a continue packet after receiving
stdout or stderr from the inferior process.
llvm-svn: 131628
EDOperandIndexForToken(token) calls fail to return a meaningful operand index,
resulting in both operands and comment being empty. We will use the raw disassembly
string as output in these cases.
There is still a known bug where llvm:tB (A8.6.16 B Encoding T2) is not being processed
as a branch instruction and therefore the symbolic information is not being dumped for
non-raw mode.
llvm-svn: 131615
types.
Added the abilty to set a RegisterValue type via accessor and enum.
Added the ability to read arguments for a function for ARM if you are on the
first instruction in ABIMacOSX_arm.
Fixed an issue where a file descriptor becoming invalid could cause an
inifnite loop spin in the libedit thread.
llvm-svn: 131610
Johnny Chen