0f2e44a1cb
Reorder some parts of the td file to by in alphabetical order
...
llvm-svn: 165590
2012-10-10 01:58:16 +00:00
240322140e
Patch for integer multiply, signed/unsigned, long/long long.
...
llvm-svn: 165322
2012-10-05 18:27:54 +00:00
210ebe93f3
1. Add load/store words from the stack
...
2. As part of this, added assembly format FEXT_RI16_SP_explicit_ins and
moved other lines for FEXT_RI16 formats to be in the right place in the code.
3. Added mayLoad and mayStore assignements for the load/store instructions added and for ones already there that did not have this assignment.
4. Another patch will deal with the problem of load/store byte/halfword to the stack. This is a particular Mips16 problem.
llvm-svn: 164811
2012-09-28 02:26:24 +00:00
7b10400709
blank line for test commit
...
llvm-svn: 164640
2012-09-25 22:34:20 +00:00
cd04e2b8e2
Properly save and restore RA and Mips16 callee save registers S0,S1
...
Patch by Reed Kotler.
llvm-svn: 164349
2012-09-21 01:08:16 +00:00
3e7ba76157
Remove aligned/unaligned load/store fragments defined in MipsInstrInfo.td and
...
use load/store fragments defined in TargetSelectionDAG.td in place of them.
Unaligned loads/stores are either expanded or lowered to target-specific nodes,
so instruction selection should see only aligned load/store nodes.
No changes in functionality.
llvm-svn: 163960
2012-09-15 01:52:08 +00:00
0fbaec2246
mips16 fixes.
...
1. Add MoveR3216
2. Correct spelling for Move32R16
Patch by Reed Kotler.
llvm-svn: 163869
2012-09-14 03:21:56 +00:00
22bec282e9
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
...
Change these to patterns.
2. Add another 16 instructions.
Patch by Reed Kotler.
llvm-svn: 161272
2012-08-03 22:57:02 +00:00
a66d676b20
Define ADJCALLSTACKDOWN/UP nodes. These nodes are emitted regardless of whether
...
or not it is in mips16 mode. Define MipsPseudo (mode-independant pseudo) and
PseudoSE (mips32/64 pseudo) classes.
llvm-svn: 161071
2012-07-31 19:13:07 +00:00
64626fc20f
Fix call setup for PIC.
...
Patch by Reed Kotler.
llvm-svn: 160774
2012-07-26 02:24:43 +00:00
26e9ecb7a3
Add basic ability to setup call frame, and make procedure calls.
...
Hello world will compile and execute with this patch.
Patch by Reed Kotler.
llvm-svn: 160651
2012-07-23 23:45:54 +00:00
b49c68a65d
Revert accidental commit.
...
llvm-svn: 160598
2012-07-21 02:20:33 +00:00
f73e362758
Add VK_Mips_HIGHER and VK_Mips_HIGHEST to MCSymbolRefExpr::VariantKind.
...
Test case will be added later when long branch patch is checked in.
llvm-svn: 160597
2012-07-21 02:15:19 +00:00
f640f040d1
Clean up Mips16InstrFormats.td and Mips16InstrInfo.td.
...
Patch by Reed Kotler.
llvm-svn: 160403
2012-07-17 22:55:34 +00:00
ed6c0408fa
Remove variable_ops from call instructions in most targets.
...
Call instructions are no longer required to be variadic, and
variable_ops should only be used for instructions that encode a variable
number of arguments, like the ARM stm/ldm instructions.
llvm-svn: 160189
2012-07-13 20:44:29 +00:00
efff7b763b
Make register Mips::RA allocatable if not in mips16 mode.
...
llvm-svn: 159971
2012-07-10 00:19:06 +00:00
765c312314
1. fix null program output after some other changes
...
2. re-enable null.ll test
3. fix some minor style violations
Patch by Reed Kotler.
llvm-svn: 158935
2012-06-21 20:39:10 +00:00
bff8e31d3c
Cleanup and factoring of mips16 tablegen classes. Make register classes
...
CPU16RegsRegClass and CPURARegRegClass available. Add definition of mips16
jalr instruction.
Patch by Reed Kotler.
llvm-svn: 157730
2012-05-31 02:59:44 +00:00
df98a7a34d
Enable Mips16 compiler to compile a null program.
...
First code from the Mips16 compiler. Includes trivial test program.
Patch by Reed Kotler.
llvm-svn: 157408
2012-05-24 18:32:33 +00:00
Reed Kotler