Commit Graph

8466 Commits

Author SHA1 Message Date
Eli Friedman 8d66e98c92 Fix a bug with <8 x i16> shuffle lowering on X86 where parts of the
shuffle could be skipped.  The check is invalid because the loop index i 
doesn't correspond to the element actually inserted. The correct check is
already done a few lines earlier, for whether the element is already in 
the right spot, so this shouldn't have any effect on the codegen for 
code that was already correct.

llvm-svn: 52486
2008-06-19 06:09:51 +00:00
Evan Cheng 2dbba985d5 Unneeded include's.
llvm-svn: 52478
2008-06-19 01:21:02 +00:00
Evan Cheng 1d260dfa3b XOR32rr, etc. are not AsCheapAsMove, but MOV32ri, etc. are.
llvm-svn: 52454
2008-06-18 08:13:07 +00:00
Evan Cheng f6a1466829 Unbreak DECLARE isel in pic mode.
llvm-svn: 52439
2008-06-18 02:48:27 +00:00
Anton Korobeynikov f51ed6a161 Add one more 'magic' define :)
llvm-svn: 52420
2008-06-17 17:57:43 +00:00
Anton Korobeynikov 8e5d9214ba Unbreak non-PPC builds
llvm-svn: 52419
2008-06-17 17:38:31 +00:00
Anton Korobeynikov 7d7dcd52db Provide generic hooks for icache invalidation. Add PPC implementation.
Patch by Gary Benson!

llvm-svn: 52418
2008-06-17 17:30:05 +00:00
Evan Cheng e47ca0940f Rather than avoiding to wrap ISD::DECLARE GV operand in X86ISD::Wrapper, simply handle it at dagisel time with x86 specific isel code.
llvm-svn: 52377
2008-06-17 02:01:22 +00:00
Evan Cheng a5e30076a0 Horizontal-add instructions are not commutative.
llvm-svn: 52363
2008-06-16 21:16:24 +00:00
Evan Cheng b90be27f8c mpsadbw is commutable.
llvm-svn: 52352
2008-06-16 20:25:59 +00:00
Chris Lattner 8b69e8a647 Add support for icache invalidation on non-darwin ppc systems.
Patch by Gary Benson!

llvm-svn: 52332
2008-06-16 17:04:06 +00:00
Evan Cheng 03553bb59a Add option to commuteInstruction() which forces it to create a new (commuted) instruction.
llvm-svn: 52308
2008-06-16 07:33:11 +00:00
Chris Lattner 91f4a0ff58 Switch from generating the int128 typedefs based on targetdata to generating
them based on the end-compiler's capabilities.  This fixes PR2453

llvm-svn: 52297
2008-06-16 04:25:29 +00:00
Andrew Lenharth f88d50bfcc add missing atomic intrinsic from gcc
llvm-svn: 52270
2008-06-14 05:48:15 +00:00
Duncan Sands 8651e9c584 Disable some DAG combiner optimizations that may be
wrong for volatile loads and stores.  In fact this
is almost all of them!  There are three types of
problems: (1) it is wrong to change the width of
a volatile memory access.  These may be used to
do memory mapped i/o, in which case a load can have
an effect even if the result is not used.  Consider
loading an i32 but only using the lower 8 bits.  It
is wrong to change this into a load of an i8, because
you are no longer tickling the other three bytes.  It
is also unwise to make a load/store wider.  For
example, changing an i16 load into an i32 load is
wrong no matter how aligned things are, since the
fact of loading an additional 2 bytes can have
i/o side-effects.  (2) it is wrong to change the
number of volatile load/stores: they may be counted
by the hardware.  (3) it is wrong to change a volatile
load/store that requires one memory access into one
that requires several.  For example on x86-32, you
can store a double in one processor operation, but to
store an i64 requires two (two i32 stores).  In a
multi-threaded program you may want to bitcast an i64
to a double and store as a double because that will
occur atomically, and be indivisible to other threads.
So it would be wrong to convert the store-of-double
into a store of an i64, because this will become two
i32 stores - no longer atomic.  My policy here is
to say that the number of processor operations for
an illegal operation is undefined.  So it is alright
to change a store of an i64 (requires at least two
stores; but could be validly lowered to memcpy for
example) into a store of double (one processor op).
In short, if the new store is legal and has the same
size then I say that the transform is ok.  It would
also be possible to say that transforms are always
ok if before they were illegal, whether after they
are illegal or not, but that's more awkward to do
and I doubt it buys us anything much.
However this exposed an interesting thing - on x86-32
a store of i64 is considered legal!  That is because
operations are marked legal by default, regardless of
whether the type is legal or not.  In some ways this
is clever: before type legalization this means that
operations on illegal types are considered legal;
after type legalization there are no illegal types
so now operations are only legal if they really are.
But I consider this to be too cunning for mere mortals.
Better to do things explicitly by testing AfterLegalize.
So I have changed things so that operations with illegal
types are considered illegal - indeed they can never
map to a machine operation.  However this means that
the DAG combiner is more conservative because before
it was "accidentally" performing transforms where the
type was illegal because the operation was nonetheless
marked legal.  So in a few such places I added a check
on AfterLegalize, which I suppose was actually just
forgotten before.  This causes the DAG combiner to do
slightly more than it used to, which resulted in the X86
backend blowing up because it got a slightly surprising
node it wasn't expecting, so I tweaked it.

llvm-svn: 52254
2008-06-13 19:07:40 +00:00
Anton Korobeynikov 729c4e95e2 Properly lower DYNAMIC_STACKALLOC - bracket all black magic with
CALLSEQ_BEGIN & CALLSEQ_END.

llvm-svn: 52225
2008-06-11 20:16:42 +00:00
Dan Gohman 6e384fc28e CPPBackend support for extractvalue and insertvalue.
llvm-svn: 52147
2008-06-09 14:12:10 +00:00
Dan Gohman 7be3fc7c97 Abort on an unrecognized opcode.
llvm-svn: 52146
2008-06-09 14:09:13 +00:00
Dan Gohman 62f63f4320 Update the CPP backend for the ConstantFP::get API change.
llvm-svn: 52144
2008-06-09 14:08:11 +00:00
Rafael Espindola 29479df2ac add support for PIC on linux x86-64
llvm-svn: 52139
2008-06-09 09:52:31 +00:00
Duncan Sands 11dd424539 Remove comparison methods for MVT. The main cause
of apint codegen failure is the DAG combiner doing
the wrong thing because it was comparing MVT's using
< rather than comparing the number of bits.  Removing
the < method makes this mistake impossible to commit.
Instead, add helper methods for comparing bits and use
them.

llvm-svn: 52098
2008-06-08 20:54:56 +00:00
Bruno Cardoso Lopes 041604ba9f Added FP instruction formats.
llvm-svn: 52086
2008-06-08 01:39:36 +00:00
Bill Wendling b7272db9f6 Temporarily reverting r52056. It's causing PPC to fail to bootstrap.
llvm-svn: 52085
2008-06-08 01:36:24 +00:00
Bruno Cardoso Lopes f09c372191 Added support for FP Registers
llvm-svn: 52079
2008-06-07 21:32:41 +00:00
Evan Cheng 1a0835017a Revert r52046. It broke cbe on x86 / Mac OS X.
llvm-svn: 52071
2008-06-07 07:50:29 +00:00
Evan Cheng 0b8f2c53a2 Typo.
llvm-svn: 52062
2008-06-06 21:00:10 +00:00
Evan Cheng 9bf9110d93 PPC preferred loop alignment is 16.
llvm-svn: 52056
2008-06-06 19:50:46 +00:00
Anton Korobeynikov f69bc3df9b Handle assembler identifiers specially in CBE. This fixes PR2418.
llvm-svn: 52046
2008-06-06 16:08:26 +00:00
Duncan Sands 13237ac3b9 Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction.  Rename the type
to MVT.  To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits().  Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).

llvm-svn: 52044
2008-06-06 12:08:01 +00:00
Bruno Cardoso Lopes 1a6e0d613f Added custom isel for MUL, SDIVREM, UDIVREM, SMUL_LOHI and UMUL_LOHI nodes
MUL is not anymore directly matched because its a pseudoinstruction.
LogicI class fixed to zero-extend immediates. 

llvm-svn: 52036
2008-06-06 06:37:31 +00:00
Bruno Cardoso Lopes 4eed3afda0 Added custom SELECT_CC lowering
Added special isel for ADDE,SUBE and new patterns to match SUBC,ADDC

llvm-svn: 52031
2008-06-06 00:58:26 +00:00
Evan Cheng 9e76c047d1 Don't break strict aliasing.
llvm-svn: 52026
2008-06-05 22:59:21 +00:00
Chris Lattner c596ec04e1 Rewrite a bunch of the CBE's inline asm code, giving it the
ability to handle indirect input operands.  This fixes PR2407.

llvm-svn: 51952
2008-06-04 18:03:28 +00:00
Duncan Sands fc3c489b52 Change packed struct layout so that field sizes
are the same as in unpacked structs, only field
positions differ.  This only matters for structs
containing x86 long double or an apint; it may
cause backwards compatibility problems if someone
has bitcode containing a packed struct with a
field of one of those types.
The issue is that only 10 bytes are needed to
hold an x86 long double: the store size is 10
bytes, but the ABI size is 12 or 16 bytes (linux/
darwin) which comes from rounding the store size
up by the alignment.  Because it seemed silly not
to pack an x86 long double into 10 bytes in a
packed struct, this is what was done.  I now
think this was a mistake.  Reserving the ABI size
for an x86 long double field even in a packed
struct makes things more uniform: the ABI size is
now always used when reserving space for a type.
This means that developers are less likely to
make mistakes.  It also makes life easier for the
CBE which otherwise could not represent all LLVM
packed structs (PR2402).
Front-end people might need to adjust the way
they create LLVM structs - see following change
to llvm-gcc.

llvm-svn: 51928
2008-06-04 08:21:45 +00:00
Bruno Cardoso Lopes 326a03732e Some Mips minor fixes
Added support for mips little endian arch => mipsel

llvm-svn: 51923
2008-06-04 01:45:25 +00:00
Dale Johannesen 355b74acc2 Add StringConstantPrefix to control what the
assembler names of string constants look like.

llvm-svn: 51909
2008-06-03 18:09:06 +00:00
Scott Michel d831cc49e5 Add necessary 64-bit support so that gcc frontend compiles (mostly). Current
issue is operand promotion for setcc/select... but looks like the fundamental
stuff is implemented for CellSPU.

llvm-svn: 51884
2008-06-02 22:18:03 +00:00
Dan Gohman 4e8a512f80 Implement CBE support for first-class structs and array values,
and insertvalue and extractvalue instructions.

First-class array values are not trivial because C doesn't
support them. The approach I took here is to wrap all arrays
in structs. Feedback is welcome.

The 2007-01-15-NamedArrayType.ll test needed to be modified
because it has a "not grep" for a string that now exists,
because array types now have associated struct types, and
those struct types have names.

llvm-svn: 51881
2008-06-02 21:30:49 +00:00
Rafael Espindola d04cd22ff4 Don't use the GOT for symbols that are not externally visible.
llvm-svn: 51865
2008-06-02 07:52:43 +00:00
Bruno Cardoso Lopes bdedc148a8 Fixed flag issue that was generating infinite loop while in list scheduling.
llvm-svn: 51833
2008-06-01 03:49:39 +00:00
Nick Lewycky 035fe6f716 Peer through sext/zext when looking for not(cmp).
llvm-svn: 51819
2008-05-31 19:01:33 +00:00
Nick Lewycky 69a51cbd6d Yay us! Every one of these examples turns into icmp/zext/ret.
llvm-svn: 51818
2008-05-31 18:20:26 +00:00
Chris Lattner 666d664595 Fix the CBE's handling of instructions whose result is an i1. Previously,
we did not truncate the value down to i1 with (x&1).  This caused a problem
when the computation of x was nontrivial, for example, "add i1 1, 1" would 
return 2 instead of 0.

This makes the testcase compile into:

...
  llvm_cbe_t = (((llvm_cbe_r == 0u) + (llvm_cbe_r == 0u))&1);
  llvm_cbe_u = (((unsigned int )(bool )llvm_cbe_t));
...

instead of:

...
  llvm_cbe_t = ((llvm_cbe_r == 0u) + (llvm_cbe_r == 0u));
  llvm_cbe_u = (((unsigned int )(bool )llvm_cbe_t));
...

This fixes a miscompilation of mediabench/adpcm/rawdaudio/rawdaudio and
403.gcc with the CBE, regressions from LLVM 2.2. Tanya, please pull 
this into the release branch.

llvm-svn: 51813
2008-05-31 09:23:55 +00:00
Dan Gohman bd3390c73a Teach the DAGISelEmitter to not compute the variable_ops operand
index for the input pattern in terms of the output pattern. Instead
keep track of how many fixed operands the input pattern actually
has, and have the input matching code pass the output-emitting
function that index value. This simplifies the code, disentangles
variables_ops from the support for predication operations, and
makes variable_ops more robust.

llvm-svn: 51808
2008-05-31 02:11:25 +00:00
Evan Cheng 864541aa7b Fix indentation.
llvm-svn: 51792
2008-05-30 22:39:18 +00:00
Bill Wendling b0aa651259 Add the "AsCheapAsAMove" flag to some 64-bit xor instructions.
llvm-svn: 51761
2008-05-30 06:47:04 +00:00
Dan Gohman 96af4ddb62 Add patterns for CALL32m and CALL64m. They aren't matched in most
cases due to an isel deficiency already noted in
lib/Target/X86/README.txt, but they can be matched in this fold-call.ll
testcase, for example.

This is interesting mainly because it exposes a tricky tblgen bug;
tblgen was incorrectly computing the starting index for variable_ops
in the case of a complex pattern.

llvm-svn: 51706
2008-05-29 21:50:34 +00:00
Bill Wendling 33e396d041 Remove more iostream header includes. Needed to implement a "FlushStream"
function to flush a specified std::ostream.

llvm-svn: 51705
2008-05-29 21:46:33 +00:00
Dan Gohman 6e582c449f Fix a tblgen problem handling variable_ops in tblgen instruction
definitions. This adds a new construct, "discard", for indicating
that a named node in the input matching pattern is to be discarded,
instead of corresponding to a node in the output pattern. This
allows tblgen to know where the arguments for the varaible_ops are
supposed to begin.

This fixes "rdar://5791600", whatever that is ;-).

llvm-svn: 51699
2008-05-29 19:57:41 +00:00
Dan Gohman 714663ab94 Expand small memmovs using inline code. Set the X86 threshold for expanding
memmove to a more plausible value, now that it's actually being used.

llvm-svn: 51696
2008-05-29 19:42:22 +00:00