1187e3f09b
Improve comment to make explicit why not to touch this could before JIT goes MC
...
llvm-svn: 111021
2010-08-13 17:44:10 +00:00
d1f4465df0
tidy up whitespace a bit
...
llvm-svn: 111019
2010-08-13 16:55:08 +00:00
1d54a4ea1d
One more XFAIL.
...
llvm-svn: 111010
2010-08-13 07:03:56 +00:00
49fd7d3a5f
More XFAILs.
...
llvm-svn: 111008
2010-08-13 07:01:55 +00:00
8bdfce97a8
Add a workaround for building with Clang.
...
llvm-svn: 111007
2010-08-13 06:02:45 +00:00
143a33758c
Add an XFAIL.
...
llvm-svn: 111004
2010-08-13 04:15:45 +00:00
6e5b67ccc4
Revert last patch and r110954 as I meant to.
...
llvm-svn: 111001
2010-08-13 02:37:50 +00:00
5e027fe113
Revert r110954 for now, pseudo instructions can't make it through to the JIT.
...
llvm-svn: 111000
2010-08-13 02:30:00 +00:00
ee1ef8c402
Remove -fexceptions from llvmc tests.
...
llvm-svn: 110999
2010-08-13 02:29:35 +00:00
d2cc5fb971
llvmc: fix two tests, remove XFAILs.
...
Tested on Linux and Darwin; please add platform-specific XFAILs/mail me a bug
report if this still fails.
llvm-svn: 110998
2010-08-13 02:29:24 +00:00
3d1027e7a1
Let LiveInterval::addRange extend existing ranges, it will verify that value
...
numbers match. The old check could accidentally leave holes in openli.
Also let useIntv add all ranges for the phi-def value inserted by
enterIntvAtEnd. This works as long at the value mapping is established in
enterIntvAtEnd.
llvm-svn: 110995
2010-08-13 01:05:26 +00:00
840b81a19e
Remember to actually update SplitAnalysis statistics now that we have a fancy
...
function to do it.
llvm-svn: 110994
2010-08-13 01:05:23 +00:00
2df195eea1
Use getAllOnesValue, saves a copy and looks better.
...
llvm-svn: 110991
2010-08-13 00:29:44 +00:00
2a0ca3e937
Reapply this transformation now that it is passing the external test which it previously failed.
...
llvm-svn: 110987
2010-08-13 00:17:53 +00:00
60a31c30c3
Move some code from Verifier into SVI::isValidOperands. This allows us to catch bad shufflevector operations when they are created, rather than waiting for someone to notice later on.
...
llvm-svn: 110986
2010-08-13 00:16:46 +00:00
7b1bcaafae
Trim #includes.
...
llvm-svn: 110983
2010-08-12 23:56:03 +00:00
de6188a5d8
Tidy up whitespace.
...
llvm-svn: 110982
2010-08-12 23:50:08 +00:00
b83d1b694a
Use .empty() instead of .size().
...
llvm-svn: 110981
2010-08-12 23:46:28 +00:00
991e4ee860
Handle an empty dupli.
...
This can happen if the original interval has been broken into two disconnected
parts. Ideally, we should be able to detect when the graph is disconnected and
create separate intervals, but that code is not implemented yet.
Example:
Two basic blocks are both branching to a loop header. Our interval is defined in
both basic blocks, and live into the loop along both edges.
We decide to split the interval around the loop. The interval is split into an
inside part and an outside part. The outside part now has two disconnected
segments, one in each basic block.
If we later decide to split the outside interval into single blocks, we get one
interval per basic block and an empty dupli for the remainder.
llvm-svn: 110976
2010-08-12 23:02:57 +00:00
32c181c444
Update the SplitAnalysis statistics as uses are moved from curli to the new
...
split intervals. THis means the analysis can be used for multiple splits as long
as curli doesn't shrink.
llvm-svn: 110975
2010-08-12 23:02:55 +00:00
363226dfe8
fix PR7876: If ipsccp decides that a function's address is taken
...
before it rewrites the code, we need to use that in the post-rewrite pass.
llvm-svn: 110962
2010-08-12 22:25:23 +00:00
cc20fe5937
Some small clean-up: use of pseudo instructions
...
llvm-svn: 110954
2010-08-12 20:55:18 +00:00
8e8f1c133a
Cleaned up the for-disassembly-only entries in the arm instruction table so that
...
the memory barrier variants (other than 'SY' full system domain read and write)
are treated as one instruction with option operand.
llvm-svn: 110951
2010-08-12 20:46:17 +00:00
0910689353
Also recompute HasPHIKill flags in LiveInterval::RenumberValues.
...
If a phi-def value were removed from the interval, the phi-kill flags are no
longer valid.
llvm-svn: 110949
2010-08-12 20:38:03 +00:00
44a320dafa
Make sure ARM constant island pass does not break up an IT block. If the split point is in the middle of an IT block, it should move it up to just above the IT instruction. rdar://8302637
...
llvm-svn: 110947
2010-08-12 20:30:05 +00:00
7f704b31a9
- Teach SSEDomainFix to switch between different levels of AVX instructions. Here we guess that AVX will have domain issues, so just implement them for consistency and in the future we remove if it's unnecessary.
...
- Make foldMemoryOperandImpl aware of 256-bit zero vectors folding and support the 128-bit counterparts of AVX too.
- Make sure MOV[AU]PS instructions are only selected when SSE1 is enabled, and duplicate the patterns to match AVX.
- Add a testcase for a simple 128-bit zero vector creation.
llvm-svn: 110946
2010-08-12 20:20:53 +00:00
073cd8004a
Remove trailing whitespace.
...
llvm-svn: 110944
2010-08-12 20:01:23 +00:00
fa3ea11ae6
Clean up debug output.
...
llvm-svn: 110940
2010-08-12 18:50:55 +00:00
7e1a30c0d3
Define AVX 128-bit pattern versions of SET0PS/PD.
...
llvm-svn: 110937
2010-08-12 18:20:59 +00:00
86fa07ea05
Add a test for llvm-gcc svn 110632.
...
llvm-svn: 110935
2010-08-12 17:31:41 +00:00
622848b262
Implement single block splitting.
...
Before spilling a live range, we split it into a separate range for each basic
block where it is used. That way we only get one reload per basic block if the
new smaller ranges can allocate to a register.
This type of splitting is already present in the standard spiller.
llvm-svn: 110934
2010-08-12 17:07:14 +00:00
2de47777f4
Optimize ScalarEvolution::getAddExpr's operand factoring code by
...
having it finish processing all of the muliply operands before
starting the whole getAddExpr process over again, instead of
immediately after the first simplification.
llvm-svn: 110916
2010-08-12 15:00:23 +00:00
157847f5d1
Hoist some loop-invariant code out of a hot loop.
...
llvm-svn: 110915
2010-08-12 14:52:55 +00:00
e67b287451
Optimize ScalarEvolution::getAddExpr's duplicate operand detection
...
by having it finish processing the whole operand list before
starting the whole getAddExpr process over again, instead of
immediately after the first duplicate is found.
llvm-svn: 110914
2010-08-12 14:46:54 +00:00
501dff76ce
Add a 'normalize' method to the Triple class, which takes a mucked up
...
target triple and straightens it out. This does less than gcc's script
config.sub, for example it turns i386-mingw32 into i386--mingw32 not
i386-pc-mingw32, but it does a decent job of turning funky triples into
something that the rest of the Triple class can understand. The plan
is to use this to canonicalize triple's when they are first provided
by users, and have the rest of LLVM only deal with canonical triples.
Once this is done the special case workarounds in the Triple constructor
can be removed, making the class more regular and easier to use. The
comments and unittests for the Triple class are already adjusted in this
patch appropriately for this brave new world of increased uniformity.
llvm-svn: 110909
2010-08-12 11:31:39 +00:00
ac40d49c70
Temporarily revert 110737 and 110734, they were causing failures
...
in an external testsuite.
llvm-svn: 110905
2010-08-12 07:01:22 +00:00
1401e040eb
Fix comment order
...
llvm-svn: 110898
2010-08-12 02:08:52 +00:00
7306c86886
Begin to support some vector operations for AVX 256-bit intructions. The long
...
term goal here is to be able to match enough of vector_shuffle and build_vector
so all avx intrinsics which aren't mapped to their own built-ins but to
shufflevector calls can be codegen'd. This is the first (baby) step, support
building zeroed vectors.
llvm-svn: 110897
2010-08-12 02:06:36 +00:00
74491bb52c
The autogened decoder was confusing the ARM STRBT for ARM USAT, because the .td
...
entry for ARM STRBT is actually a super-instruction for A8.6.199 STRBT A1 & A2.
Recover by looking for ARM:USAT encoding pattern before delegating to the auto-
gened decoder.
Added a "usat" test case to arm-tests.txt.
llvm-svn: 110894
2010-08-12 01:40:54 +00:00
7d7b4d1b0f
MC/X86/AsmParser: Give an explicit error message when we reject an instruction
...
because it could have an ambiguous suffix.
llvm-svn: 110890
2010-08-12 00:55:42 +00:00
2ecc3bb4f7
MC/AsmParser: Push the burdon of emitting diagnostics about unmatched
...
instructions onto the target specific parser, which can do a better job.
llvm-svn: 110889
2010-08-12 00:55:38 +00:00
167b9d7f30
tblgen/AsmMatcher: Always emit the match function as 'MatchInstructionImpl',
...
target specific parsers can adapt the TargetAsmParser to this.
llvm-svn: 110888
2010-08-12 00:55:32 +00:00
48595bf2bc
This is x86 only test.
...
llvm-svn: 110887
2010-08-12 00:17:38 +00:00
b524afbae3
configure: Add detection of the linker version string.
...
- Review appreciated, as long as you understand that I understand that this is
a horrible hack.
llvm-svn: 110883
2010-08-11 23:53:59 +00:00
d59c73f998
Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm.
...
Added two test cases to arm-tests.txt.
llvm-svn: 110880
2010-08-11 23:35:12 +00:00
4d597e8268
Even if a variable has constant value all the time, it is still a variable in gdb's eyes.
...
Tested by scope.exp in gdb testsuite.
llvm-svn: 110876
2010-08-11 23:17:54 +00:00
add513112a
Move the ARM SSAT and USAT optional shift amount operand out of the
...
instruction opcode. This also fixes part of PR7792.
llvm-svn: 110875
2010-08-11 23:10:46 +00:00
9c473e46f3
Fix <rdar://problem/8282498> even if it doesn't reproduce on trunk.
...
When a register is defined by a partial load:
%reg1234:sub_32 = MOV32mr <fi#-1>; GR64:%reg1234
That load cannot be folded into an instruction using the full 64-bit register.
It would become a 64-bit load.
This is related to the recent change to have isLoadFromStackSlot return false on
a sub-register load.
llvm-svn: 110874
2010-08-11 23:08:22 +00:00
7b974a45db
Fix a subtle use-after-free issue.
...
llvm-svn: 110863
2010-08-11 22:36:04 +00:00
d385c22cf3
Clean up ConstantRange a bit:
...
- remove ashr which never worked.
- fix lshr and shl and add tests.
- remove dead function "intersect1Wrapped".
- add a new sub method to subtract ranges, with test.
llvm-svn: 110861
2010-08-11 22:04:36 +00:00
1675ee7a02
Add testcases for all AVX 256-bit intrinsics added in the last couple days
...
llvm-svn: 110854
2010-08-11 21:12:09 +00:00
a97e78b4ac
Make LoopPass::getContainedPass return a LoopPass* instead of a Pass*
...
and remove casts from all its callers.
llvm-svn: 110848
2010-08-11 20:34:43 +00:00
30d0382efe
Remove BasicBlockPass::runOnFunction, which was unused.
...
llvm-svn: 110847
2010-08-11 20:28:16 +00:00
b7ef82baab
Remove rsqrt/sqrt_nr intrinsics since there are no more builtins for them on clang
...
llvm-svn: 110845
2010-08-11 19:21:05 +00:00
fe8e2eae16
Delete FunctionPass::run, which is unused.
...
llvm-svn: 110843
2010-08-11 19:11:05 +00:00
b223a0e074
Delete FunctionPass::runOnModule, which is unused.
...
llvm-svn: 110842
2010-08-11 19:05:53 +00:00
a5a25036bb
Don't use unsigned char for alignments in TargetData. There aren't
...
that many of these things, so the memory savings isn't significant,
and there are now situations where there can be alignments greater
than 128.
llvm-svn: 110836
2010-08-11 18:15:01 +00:00
5531aa4de1
Use ISD::ADD instead of ISD::SUB with a negated constant. This
...
avoids trouble if the return type of TD->getPointerSize() is
changed to something which doesn't promote to a signed type,
and is simpler anyway.
Also, use getCopyFromReg instead of getRegister to read a
physical register's value.
llvm-svn: 110835
2010-08-11 18:14:00 +00:00
29c8818ad9
Reapply r109881 using a more strict command line for llc.
...
llvm-svn: 110833
2010-08-11 17:39:23 +00:00
a5f923b1a1
fix silly typo
...
llvm-svn: 110831
2010-08-11 17:32:46 +00:00
2bf8bd1e19
Add a target triple, as the runtime library invocation varies a bit by
...
platform. It's apparently "bl __muldf3" on linux, for example. Since that's
not what we're checking here, it's more robust to just force a triple. We
just wwant to check that the inline FP instructions are only generated
on cpus that have them."
llvm-svn: 110830
2010-08-11 17:31:12 +00:00
b0276814d5
Fix test and re-enable it.
...
llvm-svn: 110829
2010-08-11 17:25:51 +00:00
852a2c19dd
Fix a FIXME. The SlotIndex::Slot enum should be private.
...
llvm-svn: 110826
2010-08-11 16:50:17 +00:00
4df4114870
Temporarily disable some failing tests, until they can be
...
properly investigated.
llvm-svn: 110825
2010-08-11 16:36:07 +00:00
4d5dc3e7e5
cortex m4 has floating point support, but only single precision.
...
llvm-svn: 110810
2010-08-11 15:44:15 +00:00
f3d783a6d2
Temporarily disable some failing tests, until they can be
...
properly investigated.
llvm-svn: 110808
2010-08-11 15:09:00 +00:00
6a98131468
Consider this code snippet:
...
float t1(int argc) {
return (argc == 1123) ? 1.234f : 2.38213f;
}
We would generate truly awful code on ARM (those with a weak stomach should look
away):
_t1:
movw r1, #1123
movs r2, #1
movs r3, #0
cmp r0, r1
mov.w r0, #0
it eq
moveq r0, r2
movs r1, #4
cmp r0, #0
it ne
movne r3, r1
adr r0, #LCPI1_0
ldr r0, [r0, r3]
bx lr
The problem was that legalization was creating a cascade of SELECT_CC nodes, for
for the comparison of "argc == 1123" which was fed into a SELECT node for the ?:
statement which was itself converted to a SELECT_CC node. This is because the
ARM back-end doesn't have custom lowering for SELECT nodes, so it used the
default "Expand".
I added a fairly simple "LowerSELECT" to the ARM back-end. It takes care of this
testcase, but can obviously be expanded to include more cases.
Now we generate this, which looks optimal to me:
_t1:
movw r1, #1123
movs r2, #0
cmp r0, r1
adr r0, #LCPI0_0
it eq
moveq r2, #4
ldr r0, [r0, r2]
bx lr
.align 2
LCPI0_0:
.long 1075344593 @ float 2.382130e+00
.long 1067316150 @ float 1.234000e+00
llvm-svn: 110799
2010-08-11 08:43:16 +00:00
5190f09291
Report error if codegen tries to instantiate a ARM target when the cpu does support it. e.g. cortex-m* processors.
...
llvm-svn: 110798
2010-08-11 07:17:46 +00:00
163b624b4e
ArchV7M implies HW division instructions.
...
llvm-svn: 110797
2010-08-11 07:00:16 +00:00
1c3c0009bd
ArchV6T2, V7A, and V7M implies Thumb2; Archv7A implies NEON.
...
llvm-svn: 110796
2010-08-11 06:57:53 +00:00
40921a4e62
Add ARM Archv6M and let it implies FeatureDB (having dmb, etc.)
...
llvm-svn: 110795
2010-08-11 06:51:54 +00:00
188b47b214
MC/ARM: Add basic support for handling predication by parsing it out of the mnemonic into a separate operand form.
...
llvm-svn: 110794
2010-08-11 06:37:20 +00:00
75d26be81a
MC/ARM: Split mnemonic on '.' characters.
...
llvm-svn: 110793
2010-08-11 06:37:16 +00:00
4a863e6cf7
MC/ARM: Fill in ARMOperand::dump a bit.
...
llvm-svn: 110792
2010-08-11 06:37:12 +00:00
2eca0252c3
llvm-mc: Add -show-inst-operands, for dumping the parsed instruction representation before matching.
...
llvm-svn: 110791
2010-08-11 06:37:09 +00:00
ebace2248f
MCAsmParser: Add dump() hook to MCParsedAsmOperand.
...
llvm-svn: 110790
2010-08-11 06:37:04 +00:00
69f024b855
tblgen/AsmMatcher: Treat '.' in assembly strings as a token separator.
...
llvm-svn: 110789
2010-08-11 06:36:59 +00:00
d8042b7bd7
MC/ARM: Add an ARMOperand class for condition codes.
...
llvm-svn: 110788
2010-08-11 06:36:53 +00:00
91033bed94
Really control isel of barrier instructions with cpu feature.
...
llvm-svn: 110787
2010-08-11 06:36:31 +00:00
49e02fc414
Add Cortex-M0 support. It's a ARMv6m device (no ARM mode) with some 32-bit
...
instructions: dmb, dsb, isb, msr, and mrs.
llvm-svn: 110786
2010-08-11 06:30:38 +00:00
6e809de90c
- Add subtarget feature -mattr=+db which determine whether an ARM cpu has the
...
memory and synchronization barrier dmb and dsb instructions.
- Change instruction names to something more sensible (matching name of actual
instructions).
- Added tests for memory barrier codegen.
llvm-svn: 110785
2010-08-11 06:22:01 +00:00
5cd4d0f9ac
MC/ARM: Switch to using the generated match functions instead of stub implementations.
...
llvm-svn: 110783
2010-08-11 05:24:50 +00:00
56e77c409b
MC/ARM: Enable generation of the ARM asm matcher, not that it can do much.
...
llvm-svn: 110782
2010-08-11 05:09:20 +00:00
07cc87438f
ARM: Mark some disassembler only instructions as not available for matching --
...
for some reason they have a very odd MCInst form where the operands overlap, but
I haven't dug in to find out why yet.
llvm-svn: 110781
2010-08-11 04:46:13 +00:00
740c50385c
ARM: Quote $p in an asm string.
...
llvm-svn: 110780
2010-08-11 04:46:10 +00:00
1326056108
tblgen/AsmMatcher: Downgrade instructions with tied operands to a debug-only warning, for now.
...
llvm-svn: 110779
2010-08-11 04:46:08 +00:00
0bd61240e9
Improve indentation.
...
llvm-svn: 110778
2010-08-11 04:24:25 +00:00
8c9c9c77c8
Remove AVX 256-bit cast intrinsics now that clang is using __builtin_shufflevector for those
...
llvm-svn: 110772
2010-08-11 02:15:33 +00:00
4134f97e56
Remove AVX 256-bit unpack and interleave intrinsics now that clang is using __builtin_shufflevector for those
...
llvm-svn: 110769
2010-08-11 01:44:11 +00:00
90b238c68b
Remove AVX 256-bit shuffle intrinsics now that clang is using __builtin_shufflevector for those
...
llvm-svn: 110767
2010-08-11 01:18:26 +00:00
79937dfc5b
Update test to match output of optimize compares for ARM.
...
llvm-svn: 110765
2010-08-11 01:05:02 +00:00
945f64ebac
CMake: corrections on LLVM.cmake external services.
...
llvm-svn: 110763
2010-08-11 00:51:32 +00:00
79553bad50
Handle ARM compares as well as converting for ARM adds, subs, and thumb2's adds.
...
llvm-svn: 110762
2010-08-11 00:23:00 +00:00
920f74aaab
Mark ARM compare instructions as isCompare.
...
llvm-svn: 110761
2010-08-11 00:22:27 +00:00
ccab1dddd1
Make it possible to set the cpu used for codegen.
...
llvm-svn: 110759
2010-08-11 00:15:13 +00:00
f7495f286a
When analyzing loop exit conditions combined with and and or, don't
...
make any assumptions about when the two conditions will agree on when
to permit the loop to exit. This fixes PR7845.
llvm-svn: 110758
2010-08-11 00:12:36 +00:00
a8272596bc
lto: Fix an inverted conditional which prevented the addition of symbols scraped
...
from inline assembly, except in cases where they had already been seen (in which
case they would get added twice).
- I can't see how this ever worked...
llvm-svn: 110757
2010-08-11 00:11:19 +00:00
4493c7e550
lto: Fix gratuitous memory leaks.
...
llvm-svn: 110756
2010-08-11 00:11:17 +00:00
9664984be8
Add a separate ARM instruction format for Saturate instructions.
...
(I discovered 2 more copies of the ARM instruction format list, bringing the
total to 4!! Two of them were already out of sync. I haven't yet gotten into
the disassembler enough to know the best way to fix this, but something needs
to be done.) Add support for encoding these instructions.
llvm-svn: 110754
2010-08-11 00:01:18 +00:00
daf5881128
Avoid multiple definition warnings when both config.h and
...
llvm-config.h are included.
This is the cmake counterpart of r110547. See bug #7809 .
llvm-svn: 110753
2010-08-10 23:48:22 +00:00
919660b2ed
lto: Reduce nesting.
...
llvm-svn: 110752
2010-08-10 23:46:46 +00:00
5657e7b667
LTOModule.cpp: Fix numerous style issues.
...
llvm-svn: 110751
2010-08-10 23:46:39 +00:00
e18c2d6f99
Rename and reorder the arguments to isImpliedCond, for consistency and clarity.
...
llvm-svn: 110750
2010-08-10 23:46:30 +00:00
e264e092bf
We already have this as OperandNode.
...
llvm-svn: 110748
2010-08-10 23:46:20 +00:00
5415713d9a
CBZ and CBNZ are implemented.
...
llvm-svn: 110745
2010-08-10 23:27:11 +00:00
91d61df3eb
Add AVX matching patterns to Packed Bit Test intrinsics.
...
Apply the same approach of SSE4.1 ptest intrinsics but
create a new x86 node "testp" since AVX introduces
vtest{ps}{pd} instructions which set ZF and CF depending
on sign bit AND and ANDN of packed floating-point sources.
This is slightly different from what the "ptest" does.
Tests comming with the other 256 intrinsics tests.
llvm-svn: 110744
2010-08-10 23:25:42 +00:00
5f1dd0967d
Now that we're using ConstantRange to represent potential values, make use of that represenation to
...
create constraints from comparisons other than eq/neq.
llvm-svn: 110742
2010-08-10 23:20:01 +00:00
871d4e1170
The optimize comparisons pass removes the "cmp" instruction this is checking for.
...
llvm-svn: 110739
2010-08-10 22:16:05 +00:00
3ec892c167
Add test for recent instcombine vector shuffle enhancement
...
llvm-svn: 110737
2010-08-10 21:58:00 +00:00
0b6dce4ea4
upgrade to use new intrinsics, patch by Dan Hipschman!
...
llvm-svn: 110735
2010-08-10 21:45:38 +00:00
265363061e
Add the minimal amount of smarts necessary to instcombine of shufflevectors to recognize
...
patterns generated by clang for transpose of a matrix in generic vectors. This is made
of two parts:
1) Propagating vector extracts of hi/lo half into their users
2) Recognizing an insertion of even elements followed by the odd elements as an unpack.
Testcase to come, but this shrinks the # of shuffle instructions generated on x86 from ~40 to the minimal 8.
llvm-svn: 110734
2010-08-10 21:38:12 +00:00
0757820f8f
Turn optimize compares back on with fix. We needed to test that a machine op was
...
a register before checking if it was defined.
llvm-svn: 110733
2010-08-10 21:38:11 +00:00
57f3db6e2e
Give up on register class recalculation when the register is used with subreg
...
operands. We don't currently have a hook to provide "the largest super class of
A where all registers' getSubReg(subidx) is valid and in B".
llvm-svn: 110730
2010-08-10 21:16:16 +00:00
a53f4e23e4
Revert r110718; it broke clang-i386-darwin9.
...
llvm-svn: 110726
2010-08-10 20:49:33 +00:00
3b870f045f
Avoid editing the current live interval during remat.
...
The live interval may be used for a spill slot as well, and that spill slot
could be shared by split registers. We cannot shrink it, even if we know the
current register won't need the spill slot in that range.
llvm-svn: 110721
2010-08-10 20:45:07 +00:00
62e721478b
More debug spew
...
llvm-svn: 110720
2010-08-10 20:45:01 +00:00
558f822bc7
Turn optimize cmps on by default so that we can get some testing by the nightly
...
ARM testers.
llvm-svn: 110718
2010-08-10 20:23:02 +00:00
3e4d04230b
Add missing argument. CreateCompositeTypeEx() users, please verify.
...
llvm-svn: 110717
2010-08-10 20:22:49 +00:00
185fe00633
Switch over to using ConstantRange to track integral values.
...
llvm-svn: 110714
2010-08-10 20:03:09 +00:00
8e06a5eb47
Do not forget debug info for enums. Use named mdnode to keep track of these types.
...
llvm-svn: 110712
2010-08-10 20:01:20 +00:00
18cc4acb00
tests: Don't error out if HOME isn't present in t the environment.
...
llvm-svn: 110711
2010-08-10 19:36:25 +00:00
fa16acae44
Delete some unused instructions.
...
llvm-svn: 110710
2010-08-10 19:36:22 +00:00
3f251fb26e
Re-apply r110655 with fixes. Epilogue must restore sp from fp if the function stack frame has a var-sized object.
...
Also added a test case to check for the added benefit of this patch: it's optimizing away the unnecessary restore of sp from fp for some non-leaf functions.
llvm-svn: 110707
2010-08-10 19:30:19 +00:00
0045646633
Make it possible to set the flags passed to the assembler.
...
Nick, please review.
llvm-svn: 110705
2010-08-10 18:55:09 +00:00
53c5022040
Implement register class inflation.
...
When splitting a live range, the new registers have fewer uses and the
permissible register class may be less constrained. Recompute the register class
constraint from the uses of new registers created for a split. This may let them
be allocated from a larger set, possibly avoiding a spill.
llvm-svn: 110703
2010-08-10 18:37:40 +00:00
0dd47bfca3
Revert r110655, "Fix ARM hasFP() semantics. It should return true whenever FP
...
register is", it breaks a couple test-suite tests.
llvm-svn: 110701
2010-08-10 18:32:02 +00:00
d215976208
MC/AsmParser: Fix a bug in macro argument parsing, which was dropping
...
parentheses from argument lists.
llvm-svn: 110692
2010-08-10 17:38:52 +00:00
407e76995b
Install llvmCore_Sim to the simulator SDK directory. Radar 8282845.
...
llvm-svn: 110687
2010-08-10 17:13:58 +00:00
284c2dbfd7
Recalculate the spill weight and allocation hint for virtual registers created
...
during live range splitting.
llvm-svn: 110686
2010-08-10 17:07:22 +00:00
5730846c2f
Fix test for more architectures. Patch by Tobias Grosser.
...
llvm-svn: 110685
2010-08-10 16:48:24 +00:00
148c3284ee
Fix silly bug.
...
llvm-svn: 110684
2010-08-10 16:32:15 +00:00
18bf25f189
Revert "MC/MachO: Fix possible null pointer dereference."
...
This reverts commit 110575.
Target.isAbsolute() is true if SD would be null.
llvm-svn: 110683
2010-08-10 16:00:49 +00:00
d1e241a4c3
Use RunPassesOn as in the rest of bugpoint.
...
llvm-svn: 110682
2010-08-10 15:46:11 +00:00
84fc4586f7
Simplify generating LLVMC_BUILTIN_PLUGIN.
...
Patch by NAKAMURA Takumi!
llvm-svn: 110680
2010-08-10 14:49:29 +00:00
fc838009d6
Trailing whitespace.
...
llvm-svn: 110679
2010-08-10 14:49:24 +00:00
ce200fd4c6
Mark this variable as used.
...
llvm-svn: 110667
2010-08-10 10:39:25 +00:00
7fbe6cb429
RegionInfo: Do not assert if a BB is not part of the dominance tree.
...
llvm-svn: 110665
2010-08-10 09:54:35 +00:00
fedeff8015
Fix failing testcase.
...
Those look like typos to me.
llvm-svn: 110664
2010-08-10 09:54:29 +00:00
b219746c80
Handle TAG_constant for integers.
...
llvm-svn: 110656
2010-08-10 07:11:13 +00:00
8d5d1c1331
Fix ARM hasFP() semantics. It should return true whenever FP register is
...
reserved, not available for general allocation. This eliminates all the
extra checks for Darwin.
This change also fixes the use of FP to access frame indices in leaf
functions and cleaned up some confusing code in epilogue emission.
llvm-svn: 110655
2010-08-10 06:26:49 +00:00
884514066e
Update CMake...sorry for the breakage.
...
llvm-svn: 110654
2010-08-10 05:16:06 +00:00
18ba0b4ac3
Simplify.
...
llvm-svn: 110653
2010-08-10 04:12:17 +00:00
b1e07b3f2a
Drop "const". It does not add value here.
...
llvm-svn: 110652
2010-08-10 04:09:06 +00:00
39f215bd33
Add AVX movnt{pd,ps,dq} 256-bit intrinsics
...
llvm-svn: 110650
2010-08-10 02:49:24 +00:00
23ef829096
Add missing null check reported by Amaury Pouly.
...
llvm-svn: 110649
2010-08-10 02:39:45 +00:00
cedf23dfe5
Add AVX movmsk 256-bit intrinsics
...
llvm-svn: 110648
2010-08-10 02:34:56 +00:00
2ccdcad5d9
Remove replicate intrinsics, clang will generate shufflevector for those. The shuffles can't be matched by x86 codegen yet, but will soon
...
llvm-svn: 110647
2010-08-10 02:25:35 +00:00
85da72a88f
Support AVX 256-bit load and store intrinsics
...
llvm-svn: 110645
2010-08-10 01:43:16 +00:00
413db95b09
Use i32 instead of i8 for dot product intrinsic
...
llvm-svn: 110643
2010-08-10 01:40:05 +00:00
469c12d254
Do not include file static variable in pubnames list.
...
Refactor and simplify code to avoid redundant checks.
llvm-svn: 110642
2010-08-10 01:37:23 +00:00
ac6a3c4c66
Expand uses of python 2.6's "A if B else C" syntax into regular
...
if-else statements, to hopefully support older pythons (PR7850).
llvm-svn: 110638
2010-08-10 01:03:34 +00:00
1ac0e2a027
remove code setting rw locks to PTHREAD_PROCESS_PRIVATE, which
...
is the default. Patch by NAKAMURA Takumi!
llvm-svn: 110636
2010-08-10 00:34:06 +00:00
b2b6b65b86
Patterns to match AVX cmp instructions
...
llvm-svn: 110633
2010-08-10 00:13:20 +00:00
e00c49da11
Transpose the calculation of spill weights such that we are calculating one
...
register at a time. This turns out to be slightly faster than iterating over
instructions, but more importantly, it allows us to compute spill weights for
new registers created after the spill weight pass has run.
Also compute the allocation hint at the same time as the spill weight. This
allows us to use the spill weight as a cost metric for copies, and choose the
most profitable hint if there is more than one possibility.
The new hints provide a very small (< 0.1%) but universal code size improvement.
llvm-svn: 110631
2010-08-10 00:02:26 +00:00
001d6fa174
Add matching patterns for vblend AVX intrinsics
...
llvm-svn: 110630
2010-08-10 00:02:05 +00:00
1aeaba6c73
Fix the last argument type of AVX vblend intrinsics
...
llvm-svn: 110628
2010-08-10 00:00:22 +00:00
ca67835eaa
Merge the OptimizeExts and OptimizeCmps passes into one PeepholeOptimizer
...
pass. This pass should expand with all of the small, fine-grained optimization
passes to reduce compile time and increase happiment.
llvm-svn: 110627
2010-08-09 23:59:04 +00:00
394a69ed52
Undo accidental commit.
...
llvm-svn: 110623
2010-08-09 23:28:52 +00:00
4eda9abddb
Simplify. Avoid redundant checks.
...
llvm-svn: 110621
2010-08-09 23:26:06 +00:00
b9627ee79b
Wording.
...
llvm-svn: 110618
2010-08-09 22:52:47 +00:00
7221b76c32
Next bit of support for the dwarf .file directive. This patch takes the
...
previously collected info from the .file directives and outputs the encoded
bytes for it. For now this is only in the Mach-O streamer but at some point
will move to a more generic place.
llvm-svn: 110617
2010-08-09 22:52:14 +00:00
9113832571
ARMBaseRegisterInfo::hasFP() has been broken for a while now. :-(
...
This will always be false before PEI:
(DisableFramePointerElim(MF) && MFI->adjustsStack())
Which means it's going to make r11 available as a general purpose register even
if -disable-fp-elim is specified. It's working on Darwin only because r7 is
always reserved. But it's obviously broken for other targets.
llvm-svn: 110614
2010-08-09 22:32:45 +00:00
685cb32d2b
Add VCVTPD2PS, VCVTPS2DQ, VCVTPS2PDY, VCVTTPD2DQY, VCVTTPS2DQ and VCVTPD2DQ 256-bit conversion intrinsics
...
llvm-svn: 110608
2010-08-09 21:51:56 +00:00
c7cf14f5f6
Refactor.
...
llvm-svn: 110607
2010-08-09 21:39:24 +00:00
3e9b567643
Add patterns to AVX conversions instructions. Do that instead of declaring more intructions whenever is possible, more coming
...
llvm-svn: 110605
2010-08-09 21:24:59 +00:00
4ef89f5200
Make it possible to set the target triple and expose that with an option in the
...
gold plugin.
llvm-svn: 110604
2010-08-09 21:09:46 +00:00
f0067b668c
Fix a use after free error caught by the valgrind builders.
...
llvm-svn: 110601
2010-08-09 21:03:28 +00:00
6d9f9feb2b
Refactoring. Update DbgVarible to handle queries itself.
...
llvm-svn: 110600
2010-08-09 21:01:39 +00:00
8afac043fb
Add ConstantRange information to the debugging output.
...
llvm-svn: 110598
2010-08-09 20:50:46 +00:00
f99e7e6643
PR7853: fix a silly mistake introduced in r101899, and add a test to make sure
...
it doesn't regress again.
llvm-svn: 110597
2010-08-09 20:49:43 +00:00
788e84d70e
Update cmake library dependencies.
...
llvm-svn: 110594
2010-08-09 20:33:20 +00:00
212cfde6ec
CMake: eliminated unnecessary target_link_libraries.
...
Next time the build is broken due to wrong library dependencies, just
try building again (if you are on some Unix and are building all LLVM
targets) or ask someone to commit the regenerated LLVMLibDeps.cmake.
llvm-svn: 110593
2010-08-09 20:33:08 +00:00
b6511a36b4
It is ok, and convenient, to pass descriptors by value.
...
llvm-svn: 110590
2010-08-09 20:20:05 +00:00
3fa110f227
A REG_SEQUENCE instruction may use the same register twice.
...
If we are emitting COPY instructions for the REG_SEQUENCE, make sure the kill
flag goes on the last COPY. Otherwise we may be using a killed register.
<rdar://problem/8287792>
llvm-svn: 110589
2010-08-09 20:19:16 +00:00
891f831963
Explicitly initialize SlowFPBrcc and Pref32BitThumb to false.
...
llvm-svn: 110587
2010-08-09 19:19:36 +00:00
406798a17d
Rename a method.
...
llvm-svn: 110586
2010-08-09 18:51:29 +00:00
ce8fb68078
Change -prefer-32bit-thumb to attribute -mattr=+32bit instead to disable more 32-bit to 16-bit optimizations.
...
llvm-svn: 110584
2010-08-09 18:35:19 +00:00
c33940b3aa
Memory version of vcvtdq2pd intrinsic
...
llvm-svn: 110582
2010-08-09 18:20:14 +00:00
828f6aeced
Patterns to match vinsert, vbroadcast, vmovmask and vcvtdq2pd AVX intrinsics
...
llvm-svn: 110580
2010-08-09 18:03:43 +00:00
7d8d9a5dd5
Add an option to disable 32 -> 16-bit Thumb2 size reduction pass for experimentation.
...
llvm-svn: 110579
2010-08-09 17:16:10 +00:00
8c811cc831
Remove the ValueMap operator=, which was wrong (it did't correct the
...
Map pointers of any contained ValueMapCallbackVH's) and unused.
llvm-svn: 110577
2010-08-09 16:44:56 +00:00
999da1f3a0
Have SPU handle halfvec stores aligned by 8 bytes.
...
llvm-svn: 110576
2010-08-09 16:33:00 +00:00
4a5167c836
MC/MachO: Fix possible null pointer dereference.
...
Discovered by Microsoft Visual Studio 2010 Code Analysis.
llvm-svn: 110575
2010-08-09 15:28:05 +00:00
cc4a9670d3
XFAIL for mingw that has no plugins.
...
llvm-svn: 110574
2010-08-09 15:14:06 +00:00
68f8b27bb9
Don't try to build a plugin on windows.
...
llvm-svn: 110573
2010-08-09 14:05:42 +00:00
ec846ac2cc
Stop the JIT from refusing to work just because the program it was compiled into
...
was built with -static.
llvm-svn: 110564
2010-08-09 07:20:20 +00:00
a6c1337239
CMake: llvm_map_components_to_libraries now returns system libs too.
...
llvm-svn: 110563
2010-08-09 03:47:11 +00:00
8f4ce879f4
Change the Interval type to signed in ImmutableIntervalMap.h.
...
llvm-svn: 110562
2010-08-09 03:43:39 +00:00
43c6321340
CMake: document how to incorporate LLVM into the cmake project of an
...
external project.
llvm-svn: 110561
2010-08-09 03:26:48 +00:00
a389c58598
CMake: system for providing llvm-config-like features to the user.
...
The user can use a cmake function for obtaining the LLVM libraries
corresponding to a list of LLVM components.
llvm-svn: 110560
2010-08-09 03:26:43 +00:00
c9793795f7
CMake: documented testing procedure
...
llvm-svn: 110559
2010-08-09 02:49:39 +00:00
4c0895893b
llc: Fix help typo as pointed out by Nick Lewycky.
...
llvm-svn: 110556
2010-08-08 23:26:49 +00:00
fb1f29acf9
Add a opt-args option that can be used to pass arguments to every opt
...
invocation. Fixes PR7793:
bugpoint -debug test.ll --opt-args -unroll-count=4
llvm-svn: 110555
2010-08-08 22:14:20 +00:00
717cd17f6f
s/libLLVMgold/LLVMgold/g
...
llvm-svn: 110552
2010-08-08 21:14:26 +00:00
7fc5a94f4e
Remove unused variable.
...
llvm-svn: 110551
2010-08-08 19:54:10 +00:00
67f8b16067
Remove the ValueMap copy constructor. It's not used anywhere,
...
and removing it catches the mistake of passing a ValueMap by
copy rather than by reference.
llvm-svn: 110549
2010-08-08 12:57:48 +00:00
41983c6f1d
Regenerate.
...
llvm-svn: 110548
2010-08-08 09:20:39 +00:00
e8f47dd13a
Add a bit of a hack to avoid multiple defines of variables in
...
config.h and llvm-config.h. This could probably be improved.
llvm-svn: 110547
2010-08-08 09:18:29 +00:00
bb10e90487
Add optimization to Target/README.txt.
...
llvm-svn: 110543
2010-08-08 07:04:25 +00:00
7f36ac54d7
Reject unrepresentable pointer types in intrinsics. Fixes PR7316.
...
llvm-svn: 110541
2010-08-08 06:12:09 +00:00
798617b1ab
Use the "isCompare" machine instruction attribute instead of calling the
...
relatively expensive comparison analyzer on each instruction. Also rename the
comparison analyzer method to something more in line with what it actually does.
This pass is will eventually be folded into the Machine CSE pass.
llvm-svn: 110539
2010-08-08 05:04:59 +00:00
fbd2757cde
Do more to modernize MergeFunctions. Refactor in response to Chris' code review.
...
llvm-svn: 110538
2010-08-08 05:04:23 +00:00
2b1077fb1d
CMake: set configure macro LLVM_PREFIX
...
llvm-svn: 110536
2010-08-08 04:32:21 +00:00
74f92e1102
CMake: configure header llvm-config.h
...
This is the cmake equivalent of r110532, which fixed bug #7809 .
llvm-svn: 110535
2010-08-08 04:17:18 +00:00
33e81a8221
Most of bugpoint now only needs to know the pass names.
...
llvm-svn: 110534
2010-08-08 03:55:08 +00:00
97014d8a8b
Regenerate.
...
llvm-svn: 110533
2010-08-08 02:44:25 +00:00
f24446d0c5
Fix PR7809 by creating a header for just llvm variables that can be
...
included in exported interfaces. Update a couple of exported interfaces.
llvm-svn: 110532
2010-08-08 02:44:17 +00:00
18e853f458
Add back in r109901, which adds a Compare flag to the target instructions. It's
...
useful after all.
llvm-svn: 110531
2010-08-08 01:49:35 +00:00
8aa19b05ee
Use %shlibext instead of .so
...
llvm-svn: 110529
2010-08-08 00:55:59 +00:00
414de85274
Try to fix cmake build.
...
llvm-svn: 110528
2010-08-08 00:50:57 +00:00
87947f7729
Fix a couple of warnings.
...
llvm-svn: 110527
2010-08-08 00:00:34 +00:00
bbdce49c2a
Run opt instead of bugpoint itself.
...
llvm-svn: 110524
2010-08-07 23:03:21 +00:00
225801cd32
Another missing file :-(
...
llvm-svn: 110522
2010-08-07 21:58:44 +00:00
16db6a5651
Add missing file.
...
llvm-svn: 110521
2010-08-07 21:53:04 +00:00
92a4a833f9
Move the bugpoint test passes to a plugin in preparation for having bugpoint
...
use opt.
llvm-svn: 110520
2010-08-07 21:48:09 +00:00
a7d0ccfe7f
Roll back my last two commits, valgrind complains.
...
llvm-svn: 110518
2010-08-07 13:27:41 +00:00
b9525dea59
A reference to the Timer's name is safe, it outlives the contents of the vector.
...
llvm-svn: 110517
2010-08-07 13:07:57 +00:00
591a79fb2f
Kill rarely used std::sort.
...
llvm-svn: 110516
2010-08-07 12:37:00 +00:00
be05173105
Shrink PassNameParser's binary size with array_pod_sort.
...
llvm-svn: 110512
2010-08-07 11:45:42 +00:00
a5a3ff586f
Remove layering violation.
...
llvm-svn: 110505
2010-08-07 06:01:13 +00:00
1a9078b862
Add an inverse() method to ConstantRange.
...
llvm-svn: 110504
2010-08-07 05:47:46 +00:00
5caa7c58db
Fix typo.
...
llvm-svn: 110502
2010-08-07 05:25:29 +00:00
6b99da0aab
Remove assignPassManager's default arguments. It's really
...
confusing to have different arguments for the same virtual
function at different levels of the class hierarchy.
llvm-svn: 110500
2010-08-07 01:25:32 +00:00
a19631f437
More #include cleanups.
...
llvm-svn: 110499
2010-08-07 01:18:18 +00:00
1b4a087317
Delete this explicit assignment operator; it's equivalent to
...
the implicit one.
llvm-svn: 110498
2010-08-07 01:17:47 +00:00
027ad43794
Oops, check in this file too.
...
llvm-svn: 110496
2010-08-07 01:04:15 +00:00
404c58847e
Tidy up PMStack. Add a bunch of consts, use std::vector instead of
...
std::deque, since this is a stack and only supports push/pop on
one end, and remove an unimplemented declaration.
llvm-svn: 110495
2010-08-07 00:53:01 +00:00
093b42fc7c
Tidy some #includes and forward-declarations, and move the C binding code
...
out of PassManager.cpp and into Core.cpp with the rest of the C binding code.
llvm-svn: 110494
2010-08-07 00:43:20 +00:00
07d0637000
Add a convenience constructor.
...
llvm-svn: 110493
2010-08-07 00:42:06 +00:00
71b30e0db6
Make AnalysisImpls private.
...
llvm-svn: 110492
2010-08-07 00:34:52 +00:00
a3bd31a923
Use sdmem and sse_load_f64 (etc.) for the vector
...
form of CMPSD (etc.) Matching a 128-bit memory
operand is wrong, the instruction uses only 64 bits
(same as ADDSD etc.) 8193553.
llvm-svn: 110491
2010-08-07 00:33:42 +00:00
0398607714
Don't attempt the PRE inline asm calls, since we don't value number them yet. Fixes PR7835.
...
llvm-svn: 110489
2010-08-07 00:20:35 +00:00
b650ad0861
Add a predicate to determine if a call is an inline asm statement.
...
llvm-svn: 110488
2010-08-07 00:19:59 +00:00
f16a9bc5b9
Some cleanup. Use a class (OptionInfo) instead of a pair of a pair and remove
...
some default values that are not used.
llvm-svn: 110485
2010-08-06 23:03:52 +00:00
45e07c8fc5
Lazily defer duplicating the live interval we are splitting until we know it is
...
necessary.
Sometimes, live range splitting doesn't shrink the current interval, but simply
changes some instructions to use a new interval. That makes the original more
suitable for spilling. In this case, we don't need to duplicate the original.
llvm-svn: 110481
2010-08-06 22:17:33 +00:00
93cc666a58
Patterns to match AVX 256-bit vzero intrinsics
...
llvm-svn: 110480
2010-08-06 22:10:01 +00:00
0f7892b8ae
Eliminate PromoteMemoryToRegisterID; just use addPreserved("mem2reg")
...
instead, as an example of what this looks like.
llvm-svn: 110478
2010-08-06 21:48:06 +00:00
4f50b97fd8
llc: Clarify -mc-relax-all description.
...
llvm-svn: 110477
2010-08-06 21:37:45 +00:00
8e4e2aaa2f
tidy up
...
llvm-svn: 110476
2010-08-06 21:31:35 +00:00
bcb332475c
MC: Add default value for AddrSpace argument to EmitValue.
...
llvm-svn: 110475
2010-08-06 21:24:05 +00:00
3d6a3a0ede
Patterns to match AVX 256-bit permutation intrinsics
...
llvm-svn: 110468
2010-08-06 20:03:27 +00:00
5afa738d7f
Test case for r110459. Radar 8264751. Test case by Fariborz Jahanian!
...
llvm-svn: 110467
2010-08-06 19:02:24 +00:00
da27eb246d
Cleanup comment wording
...
llvm-svn: 110466
2010-08-06 18:59:07 +00:00
4603d09660
Remove empty processFunctionBeforeFrameFinalized(). The default
...
implementation of the function is equivalent, so no need to provide
the target-specific version until/unless it needs to do something.
llvm-svn: 110465
2010-08-06 18:57:24 +00:00
1dfca4e4bb
Keep the MachiuneFunctionPass pointer around. It is useful for verification.
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llvm-svn: 110464
2010-08-06 18:47:06 +00:00
8c0f693150
Add LiveInterval::RenumberValues - Garbage collection for VNInfos.
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After heavy editing of a live interval, it is much easier to simply renumber the
live values instead of trying to keep track of the unused ones.
llvm-svn: 110463
2010-08-06 18:46:59 +00:00
a7aed18624
Reapply r110396, with fixes to appease the Linux buildbot gods.
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llvm-svn: 110460
2010-08-06 18:33:48 +00:00
e68958fcdf
Implement a proper getModRefInfo for va_arg.
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llvm-svn: 110458
2010-08-06 18:24:38 +00:00
0cb2c7a25e
spelling
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llvm-svn: 110457
2010-08-06 18:24:36 +00:00
6b4671b208
Be more conservative in the face of volatile.
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llvm-svn: 110456
2010-08-06 18:11:28 +00:00
Bruno Cardoso Lopes