4 Commits

Author	SHA1	Message	Date
Luis Marques	2d550d19b3	Revert Patch from Phabricator ... This reverts r372092 (git commit e38695a025) llvm-svn: 372104	2019-09-17 10:52:09 +00:00
Luis Marques	e38695a025	Patch from Phabricator ... llvm-svn: 372092	2019-09-17 09:43:08 +00:00
Alex Bradbury	d834d8301d	[RISCV] Add RV64F codegen support ... This requires a little extra work due tothe fact i32 is not a legal type. When call lowering happens post-legalisation (e.g. when an intrinsic was inserted during legalisation). A bitcast from f32 to i32 can't be introduced. This is similar to the challenges with RV32D. To handle this, we introduce target-specific DAG nodes that perform bitcast+anyext for f32->i64 and trunc+bitcast for i64->f32. Differential Revision: https://reviews.llvm.org/D53235 llvm-svn: 352807	2019-01-31 22:48:38 +00:00
Alex Bradbury	76c29ee815	[RISCV] Add codegen for RV32F arithmetic and conversion operations ... Currently, only a soft floating point ABI is supported. llvm-svn: 327976	2018-03-20 12:45:35 +00:00