Commit Graph

334252 Commits

Author SHA1 Message Date
Daniel Sanders 3a779b7dfd [globalisel] Small correction to the fixup in 0a0813962d. The two ID's are not the same size
The rule ID is a uint64_t as it has global scope but the UID is scoped to
the rule and expected to be much smaller so it's only unsigned.
2019-12-18 14:56:23 +00:00
Kamil Rytarowski e14ff22694 [compiler-rt] Sync NetBSD ioctl definitions with 9.99.26
Document the minimal version supported to 9.0.
2019-12-18 15:44:01 +01:00
Daniel Sanders c3cb089a87 [gicombiner] Import tryCombineIndexedLoadStore()
Summary:
Now that arbitrary data is supported, import tryCombineIndexedLoadStore()

Depends on D69147

Reviewers: bogner, volkan

Reviewed By: volkan

Subscribers: hiraditya, arphaman, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69151
2019-12-18 14:41:38 +00:00
Roman Lebedev c6a56c9a50
[NFC][InstCombine] Autogenerate assume.ll test 2019-12-18 17:16:19 +03:00
Daniel Sanders 0a0813962d [globalisel] Attempt to fix ARM bots that emit the correct number in the wrong place 2019-12-18 14:15:11 +00:00
Hans Wennborg d129aa1d53 Add an -fno-temp-file flag for compilation
Our build system does not handle randomly named files created during
the build well. We'd prefer to write compilation output directly
without creating a temporary file. Function parameters already
existed to control this behavior but were not exposed all the way out
to the command line.

Patch by Zachary Henkel!

Differential revision: https://reviews.llvm.org/D70615
2019-12-18 15:07:43 +01:00
Sanjay Patel 5e5e99c041 [AArch64] match fcvtl2 with bitcasted extract
This should eliminate a regression seen in D63815.

If we are FP extending the high half extract of a vector,
we should be able to peek through a bitcast sitting
between the extract and extend.

This replaces tablegen patterns with a more general
DAG to DAG override, so we can handle any casted type.

Differential Revision: https://reviews.llvm.org/D71515
2019-12-18 08:47:07 -05:00
Sanjay Patel c7492fbd4e [InstCombine] add tests for copysign; NFC 2019-12-18 07:56:36 -05:00
Raphael Isemann d8a3194987 [lldb][NFC] Add unit test for persistent variable lookup with ClangExpressionDeclMap
This adds a unit test for looking up persistent declarations in the scratch AST
context. Also adds the `GetPersistentDecl` hook to the ClangExpressionDeclMap
that this unit test can emulate looking up persistent variables without having
a lldb_private::Target.
2019-12-18 13:50:05 +01:00
Daniel Sanders 55c57408b0 [gicombiner] Add support for arbitrary match data being passed from match to apply
Summary:
This is used by the extending_loads combine to tell the apply step which
use is the preferred one to fold and the other uses should be re-written
to consume.

Depends on D69117

Reviewers: volkan, bogner

Reviewed By: volkan

Subscribers: hiraditya, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69147
2019-12-18 12:27:29 +00:00
stozer 1f3dd83cc1 Revert "[DebugInfo] Correctly handle salvaged casts and split fragments at ISel"
Reverted due to build failure on windows bots.

This reverts commit bb1b0bc4e5.
2019-12-18 11:46:10 +00:00
LLVM GN Syncbot bad6a76041 gn build: Merge 7ea2e5195a 2019-12-18 11:37:45 +00:00
Daniel Sanders 7ea2e5195a Revert "Temporarily Revert "[gicombiner] Add the MatchDag structure and parse instruction DAG's from the input""
This reverts commit e62e760f29.

The issue @uweigand raised should have been fixed by iterating over the
vector that owns the operand list data instead of the FoldingSet.

The MSVC issue raised by @thakis should have been fixed by relaxing the
regexes a little. I don't have a Windows machine available to test that so
I tested it by using `perl -p -e 's/0x([0-9a-f]+)/\U\1\E/g' to convert the
output of %p to the windows style.

I've guessed at the issue @phosek raised as there wasn't enough information
to investigate it. What I think is happening on that bot is the -debug
option isn't available because the second stage build is a release build.
I'm not sure why other release-mode bots didn't report it though.
2019-12-18 11:37:12 +00:00
LLVM GN Syncbot 2f45693030 gn build: Merge 1ad15046dc 2019-12-18 11:25:51 +00:00
Ilya Biryukov c1bbefef9d [Syntax] Use a hash table to search for tokens by their location
This is both more efficient and avoids corner cases in
`SourceManager::isBeforeInTranslationUnit`.

The change is trivial and clearly a performance improvement on the hot
path of building the syntax tree, so sending without review.
2019-12-18 12:24:00 +01:00
Ilya Biryukov 038f53882e [Syntax] Uppercase the first letter of the test name. NFC
To match naming style of other tests.
2019-12-18 12:20:30 +01:00
Ilya Biryukov 1ad15046dc [Syntax] Allow to mutate syntax trees
Summary:
This patch adds facilities to mutate the syntax trees and produce
corresponding text replacements.

The public interface of the syntax library now includes facilities to:
    1. perform type-safe modifications of syntax trees,
    2. compute textual replacements to apply the modifications,
    3. create syntax trees not backed by the source code.

For each of the three, we only add a few example transformations in this
patch to illustrate the idea, support for more kinds of nodes and
transformations will be done in follow-up patches.

The high-level mutation operations are implemented on top of operations
that allow to arbitrarily change the trees. They are considered to be
implementation details and are not available to the users of the
library.

Reviewers: sammccall, gribozavr2

Reviewed By: gribozavr2

Subscribers: merge_guards_bot, mgorny, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64573
2019-12-18 12:19:03 +01:00
stozer bb1b0bc4e5 [DebugInfo] Correctly handle salvaged casts and split fragments at ISel
Previously, LLVM had no functional way of performing casts inside of a
DIExpression(), which made salvaging cast instructions other than Noop
casts impossible. This patch enables the salvaging of casts by using the
DW_OP_LLVM_convert operator for SExt and Trunc instructions.

There is another issue which is exposed by this fix, in which fragment
DIExpressions (which are preserved more readily by this patch) for
values that must be split across registers in ISel trigger an assertion,
as the 'split' fragments extend beyond the bounds of the fragment
DIExpression causing an error. This patch also fixes this issue by
checking the fragment status of DIExpressions which are to be split, and
dropping fragments that are invalid.
2019-12-18 11:09:18 +00:00
Gabor Marton bc5b7e21e3 recommit: [ASTImporter] Friend class decl should not be visible in its context
Summary:
In the past we had to use DeclContext::makeDeclVisibleInContext to make
friend declarations available for subsequent lookup calls and this way
we could chain (redecl) the structurally equivalent decls.
By doing this we created an AST that improperly made declarations
visible in some contexts, so the AST was malformed.
Since we use the importer specific lookup this is no longer necessary,
because with that we can find every previous nodes.

Reviewers: balazske, a_sidorin, a.sidorin, shafik

Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, teemperor, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D71020
2019-12-18 11:43:46 +01:00
Sven van Haastregt 308b8b76ce [OpenCL] Add builtin function extension handling
Provide a mechanism to attach OpenCL extension information to builtin
functions, so that their use can be restricted according to the
extension(s) the builtin is part of.

Patch by Pierre Gondois and Sven van Haastregt.

Differential Revision: https://reviews.llvm.org/D71476
2019-12-18 10:13:51 +00:00
Victor Campos 364b8f5fbe [AArch64] Improve codegen of volatile load/store of i128
Summary:
Instead of generating two i64 instructions for each load or store of a
volatile i128 value (two LDRs or STRs), now emit a single LDP or STP.

Reviewers: labrinea, t.p.northover, efriedma

Reviewed By: efriedma

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69559
2019-12-18 10:03:12 +00:00
Jay Foad 97ca7c2cc9 [AArch64] Enable clustering memory accesses to fixed stack objects
Summary:
r347747 added support for clustering mem ops with FI base operands
including support for fixed stack objects in shouldClusterFI, but
apparently this was never tested.

This patch fixes shouldClusterFI to work with scaled as well as
unscaled load/store instructions, and fixes the ordering of memory ops
in MemOpInfo::operator< to ensure that memory addresses always
increase, regardless of which direction the stack grows.

Subscribers: MatzeB, kristof.beyls, hiraditya, javed.absar, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71334
2019-12-18 09:46:11 +00:00
Miloš Stojanović 862a602416 [llvm-exegesis][mips] Add lit test
Adding a basic lit test for MIPS.

Differential Revision: https://reviews.llvm.org/D71605
2019-12-18 10:21:06 +01:00
Anna Welker 7cd1cfdd6b [NFC][TTI] Add Alignment for isLegalMasked[Gather/Scatter]
Add an extra parameter so alignment can be taken under
consideration in gather/scatter legalization.

Differential Revision: https://reviews.llvm.org/D71610
2019-12-18 09:14:39 +00:00
David Stenberg a6be12dbb1 [cmake] Add llvm-locstats to LLVM_TEST_DEPENDS
Summary:
Make sure that llvm-locstats is updated before running lit tests even
when it's not an explicit target.

Reviewers: djtodoro, krisb, spatel

Reviewed By: djtodoro

Subscribers: mgorny, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71611
2019-12-18 09:54:21 +01:00
Georgii Rymar 36c3b3a61c [llvm-readobj][test] - Move a comment. NFC.
I've forgot to address this review comment.
2019-12-18 11:50:08 +03:00
Georgii Rymar 8810284af2 [llvm-readob] - Refactor printing of sections flags. NFCI.
This is a natural clean-up after D71462/D71464.
It allows to define known section letters used for GNU style
in one place.

Differential revision: https://reviews.llvm.org/D71591
2019-12-18 11:43:52 +03:00
Georgii Rymar f31fa4f898 [llvm-readobj][test] - Cleanup hash-histogram.test
In this test case we use 3 precompiled objects to
test how we print a histogram for an GNU hash section.
It does not make sense to use precompiled objects
for that. Also we could have 2 tests: one for 32 and
another for 64 bits target.

This patch does this change. It is not possible to remove
these precompiled objects because they are used elsewhere.

Differential revision: https://reviews.llvm.org/D71606
2019-12-18 11:36:49 +03:00
Georgii Rymar f8dbb2c62f [llvm-readelf] - Change letters used for SHF_ARM_PURECODE and SHF_X86_64_LARGE flags.
GNU uses `l` for SHF_X86_64_LARGE and `y` for SHF_ARM_PURECODE.
Lets follow.

To do this I had to refactor and refine how we print the help flags description.
It was too generic and inconsistent with GNU readelf.

Differential revision: https://reviews.llvm.org/D71464
2019-12-18 11:31:58 +03:00
Fangrui Song 37b2808059 [ELF] writePlt, writeIplt: replace parameters gotPltEntryAddr and index with `const Symbol &`. NFC
PPC::writeIplt (IPLT code sequence, D71621) needs to access `Symbol`.

Reviewed By: grimar, ruiu

Differential Revision: https://reviews.llvm.org/D71631
2019-12-18 00:14:03 -08:00
Georgii Rymar 541daa5e6b [llvm-readelf][llvm-readobj] - Reimplement the logic of section flags dumping.
Our logic that dumped the flags was buggy.

For LLVM style it dumped SHF_MASKPROC/SHF_MASKOS named constants, though
they are not flags, but masks.

For GNU style it was just very inconsistent with GNU which has logic
that is not straightforward. Imagine we have sh_flags == 0x90000000.
SHF_EXCLUDE ("E") has a value of 0x80000000 and SHF_MASKPROC is 0xf0000000.
GNU readelf will not print "E" or "Ep" in this case, but will print just
"p". It only will print "E" when no other processor flag is set.
I had to investigate the GNU source to find the algorithm and now our logic should
match it.

Differential revision: https://reviews.llvm.org/D71462
2019-12-18 10:44:40 +03:00
Wang, Pengfei 8cc0b58673 [X86] Add calculation for elements in structures in getting uniform base for the Gather/Scatter intrinsic.
Summary: Add calculation for elements in structures in getting uniform
base for the Gather/Scatter intrinsic.

Reviewers: craig.topper, c-rhodes, RKSimon

Subscribers: hiraditya, llvm-commits, annita.zhang, LuoYuanke

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71442
2019-12-18 12:24:58 +08:00
Wang, Pengfei 1949235d13 [X86] Add strict fma support
Summary: Add strict fma support

Reviewers: craig.topper, RKSimon, LiuChen3

Subscribers: hiraditya, llvm-commits, LuoYuanke

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71604
2019-12-18 11:44:00 +08:00
Gabor Horvath ea93d7d642 [CFG] Add an option to expand CXXDefaultInitExpr into aggregate initialization
This is useful for clients that are relying on linearized CFGs for evaluating
subexpressions and want the default initializer to be evaluated properly.

The upcoming lifetime analysis is using this but it might also be useful
for the static analyzer at some point.

Differential Revision: https://reviews.llvm.org/D71642
2019-12-17 17:56:06 -08:00
Petr Hosek 547659ae56 [unwind] Don't link libpthread and libdl on Fuchsia
This is a follow up to D71135.
2019-12-17 17:21:43 -08:00
Fangrui Song 07522e4e23 [ELF] Fix a comment. NFC 2019-12-17 17:17:33 -08:00
Justin Bogner b6f5caa48f [docs] Remove `git llvm push` and `git llvm revert` from GettingStarted
These sections aren't accurate since the github move.

Differential Revision: https://reviews.llvm.org/D71640
2019-12-17 17:16:20 -08:00
Nemanja Ivanovic a5da8d90da [PowerPC] Add missing legalization for vector BSWAP
We somehow missed doing this when we were working on Power9 exploitation.
This just adds the missing legalization and cost for producing the vector
intrinsics.

Differential revision: https://reviews.llvm.org/D70436
2019-12-17 19:07:34 -06:00
LLVM GN Syncbot 758825c5b8 gn build: Merge e62e760f29 2019-12-18 00:29:06 +00:00
Eric Christopher e62e760f29 Temporarily Revert "[gicombiner] Add the MatchDag structure and parse instruction DAG's from the input"
and follow-on patches.

This is breaking a few build bots and local builds with follow-up already
on the patch thread.

This reverts commits 390c8baa54 and
520e3d66e7.
2019-12-17 16:23:29 -08:00
Craig Topper 004fdbe041 [X86] Manually format some setOperationAction calls to line up arguments to improve readability. NFC 2019-12-17 16:11:31 -08:00
Xiaoqing Wu a17619e0b0 [AArch64][GlobalISel]: Fix a crash in GlobalIsel in dealing with 16bit uadd.with.overflow.
Summary: AArch64 doesn't support uadd.with.overflow.i16 natively. This change adds a legalization rule to convert the 32bit add result to 16bit. This should fix PR43981.

Reviewers: arsenm, qcolombet, paquette, aemerson

Reviewed By: paquette

Subscribers: wdng, rovka, kristof.beyls, hiraditya, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71587
2019-12-17 16:05:00 -08:00
Craig Topper c36773c78e [FPEnv][LegalizeTypes] Make ScalarizeVecOp_STRICT_FP_ROUND do its own replacements and return SDValue()
The caller will assert for nodes with more than 2 results unless
we return a null SDValue.

I tried to test this by copying an AArch64 test for ScalarizeVecOp_FP_ROUND.
While it did hit the assert and this commited fixed that. It also
hit a later problem that couldn't be fixed without adding strict
FP support to AArch64.
2019-12-17 15:17:43 -08:00
Stanislav Mekhanoshin b8ac5894a1 [AMDGPU] Fixed cost model for packed 16 bit ops
Differential Revision: https://reviews.llvm.org/D71622
2019-12-17 15:14:17 -08:00
Thomas Lively f1b351e14a [WebAssembly] Implement SIMD {i8x16,i16x8}.avgr_u instructions
Summary:
These instructions were added to the spec proposal in
https://github.com/WebAssembly/simd/pull/126. Their semantics are
equivalent to `(a + b + 1) / 2`. The opcode for the experimental
i32x4.dot_i16x8_s is also bumped due to a collision with the
i8x16.avgr_u opcode.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71628
2019-12-17 15:05:50 -08:00
Mitch Phillips f827aff859 Revert "[ MC ] Match labels to existing fragments even when switching sections."
This reverts commit 4272372c57.

Caused an MSan buildbot failure. More information available in the patch
that introduced the bug: https://reviews.llvm.org/D71368
2019-12-17 15:04:26 -08:00
Artem Dergachev 6d3f43ec61 [analysis] Discard type qualifiers when casting values retrieved from the Store.
This canonicalizes the representation of unknown pointer symbols,
which reduces the overall confusion in pointer cast representation.

Patch by Vince Bridgers!

Differential Revision: https://reviews.llvm.org/D70836
2019-12-17 15:00:41 -08:00
Craig Topper 84d8fa30f9 [FPEnv][LegalizeTypes][LegalizeDAG][AArch64] Few fixes/improvements for legalizing fp<->int conversion nodes.
This started with adding a test to support get code coverage on
ScalarizeVecOp_UnaryOp_StrictFP by copying an existing AArch64 test
and using constrained sitofp/uitofp intrinsics.

This found 3 separate issues:
-ScalarizeVecOp_UnaryOp_StrictFP needs to do its own replacement
 because the caller can't handle replacing multiple results.
-Missing integer promotion support for sitofp/uitofp
-Chain result not always assigned in ExpandLegalINT_TO_FP.

Committing them together so I can add the test case.
2019-12-17 14:37:00 -08:00
Alex Lorenz be88a20c90 [driver][darwin] Use explicit -mlinker-version in the -platform_version tests
The driver actually adds a default -mlinker-version, based on HOST_LINK_VERSION
cmake variable. The tests should be explicit about which version they're using to
trigger the right behavior.
2019-12-17 14:25:22 -08:00
Whitney Tsang 36bdc3dc35 [LoopFusion] Move instructions from FC0.Latch to FC1.Latch.
Summary:This PR move instructions from FC0.Latch bottom up to the
beginning of FC1.Latch as long as they are proven safe.

To illustrate why this is beneficial, let's consider the following
example:
Before Fusion:
header1:
  br header2
header2:
  br header2, latch1
latch1:
  br header1, preheader3
preheader3:
  br header3
header3:
  br header4
header4:
  br header4, latch3
latch3:
  br header3, exit3

After Fusion (before this PR):
header1:
  br header2
header2:
  br header2, latch1
latch1:
  br header3
header3:
  br header4
header4:
  br header4, latch3
latch3:
  br header1, exit3

Note that preheader3 is removed during fusion before this PR.
Notice that we cannot fuse loop2 with loop4 as there exists block latch1
in between.
This PR move instructions from latch1 to beginning of latch3, and remove
block latch1. LoopFusion is now able to fuse loop nest recursively.

After Fusion (after this PR):
header1:
  br header2
header2:
  br header3
header3:
  br header4
header4:
  br header2, latch3
latch3:
  br header1, exit3

Reviewer: kbarton, jdoerfert, Meinersbur, dmgreen, fhahn, hfinkel,
bmahjour, etiotto
Reviewed By: kbarton, Meinersbur
Subscribers: hiraditya, llvm-commits
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D71165
2019-12-17 22:10:23 +00:00