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7 Commits

Author SHA1 Message Date
Fangrui Song ac14f7b10c [lit] Delete empty lines at the end of lit.local.cfg NFC 
llvm-svn: 363538
 2019-06-17 09:51:07 +00:00
Pete Couperus 9fd1848823 [ARC] Add more load/store variants. 
On ARC ISA, general format of load instruction is this:

    LD<zz><.x><.aa><.di> a, [b,c]
And general format of store is this:
    ST<zz><.aa><.di> c, [b,s9]
Where:

<zz> is data size field and can be one of
  <empty> (bits 00) - Word (32-bit), default behavior
  B             (bits 01) - Byte
  H             (bits 10) - Half-word (16-bit)

 <.x> is data extend mode:
  <empty> (bit 0) - If size is not Word(32-bit), then data is zero extended
  X       (bit 1) - If size is not Word(32-bit), then data is sign extended

 <.aa> is address write-back mode:
  <empty> (bits 00) - no write-back
  .AW  (bits 01) - Preincrement, base register updated pre memory transaction
  .AB  (bits 10) - Postincrement, base register updated post memory transaction

 <.di> is cache bypass mode:
  <empty> (bit 0) - Cached memory access, default mode
  .DI     (bit 1) - Non-cached data memory access

  This patch adds these load/store instruction variants to the ARC backend.

Patch By Denis Antrushin! <denis@synopsys.com>

Differential Revision: https://reviews.llvm.org/D58980

llvm-svn: 356200
 2019-03-14 20:50:54 +00:00
Tatyana Krasnukha b5f42976ad [ARC] Prevent InstPrinter from crashing on unknown condition codes. 
Summary:
Instruction printer shouldn't crash with assertions due to incorrect input data. llvm_unreachable is not intended for runtime error handling.

Reviewers: petecoup

Reviewed By: petecoup

Differential Revision: https://reviews.llvm.org/D51728

llvm-svn: 341581
 2018-09-06 19:58:26 +00:00
Yan Luo 545a0c2fb0 [ARC] Add LImm support for J/JL 
llvm-svn: 330031
 2018-04-13 15:10:34 +00:00
Pete Couperus b7b6e1da6c [ARC] Add <.f> suffix for F32_GEN4_{DOP|SOP}. 
Add disassembler support for instructions which writeback STATUS32.
https://reviews.llvm.org/D45148

Patch by Yan Luo! (Yan.Luo2@synopsys.com)

llvm-svn: 329404
 2018-04-06 15:43:11 +00:00
Tatyana Krasnukha f665f6a279 [ARC] Add instruction subset for the ARC backend. 
Reviewers: petecoup, kparzysz

Reviewed By: petecoup

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D37983

llvm-svn: 319609
 2017-12-02 05:25:17 +00:00
Pete Couperus 2d1f6d67c5 [ARC] Add ARC backend. 
Add the ARC backend as an experimental target to lib/Target.
Reviewed at: https://reviews.llvm.org/D36331

llvm-svn: 311667
 2017-08-24 15:40:33 +00:00