Commit Graph

369922 Commits

Author SHA1 Message Date
Mehdi Amini 3a4b832b1b Topologically sort the library to link to mlir-cpu-runner which is required with some linkers like BFD (NFC) 2020-10-24 00:35:55 +00:00
Mehdi Amini 035a6b95c3 Fix a few warnings from GCC (NFC) 2020-10-24 00:35:55 +00:00
Walter Erquinigo 48d8af9825 [intel-pt] Disable/Enable tracing to guarantee the trace is correct
As mentioned in the comment inside the code, the Intel documentation
states that the internal CPU buffer is flushed out to RAM only when tracing is
disabled. Otherwise, the buffer on RAM might be stale.

This diff disables tracing when the trace buffer is going to be read. This is a
quite safe operation, as the reading is done when the inferior is paused at a
breakpoint, so we are not losing any packets because there's no code being
executed.

After the reading is finished, tracing is enabled back.

It's a bit hard to write a test for this now, but Greg Clayton and I will
refactor the PT support and writing tests for it will be easier. However
I tested it manually by doing a script that automates
the following flow

```
(lldb) b main
Breakpoint 1: where = a.out`main + 15 at main.cpp:4:7, address = 0x000000000040050f
(lldb) r
Process 3078226 stopped
* thread #1, name = 'a.out', stop reason = breakpoint 1.1
frame #0: 0x000000000040050f a.out`main at main.cpp:4:7
(lldb) processor-trace start
(lldb) b 5
Breakpoint 2: where = a.out`main + 22 at main.cpp:5:12, address = 0x0000000000400516
(lldb) c
Process 3078226 resuming
Process 3078226 stopped
* thread #1, name = 'a.out', stop reason = breakpoint 2.1
frame #0: 0x0000000000400516 a.out`main at main.cpp:5:12
(lldb) processor-trace show-instr-log
thread #1: tid=3078226
0x40050f <+15>: movl $0x0, -0x8(%rbp)

>>> Before, some runs of the script up to this point lead to empty traces

(lldb) b 6
Breakpoint 3: where = a.out`main + 42 at main.cpp:6:14, address = 0x000000000040052a
(lldb) c
Process 3092991 resuming
Process 3092991 stopped
* thread #1, name = 'a.out', stop reason = breakpoint 3.1
frame #0: 0x000000000040052a a.out`main at main.cpp:6:14
(lldb) processor-trace show-instr-log thread #1: tid=3092991
0x40050f <+15>: movl $0x0, -0x8(%rbp)
0x400516 <+22>: movl $0x0, -0xc(%rbp)
0x40051d <+29>: cmpl $0x2710, -0xc(%rbp) ; imm = 0x2710
0x400524 <+36>: jge 0x400546 ; <+70> at main.cpp
0x400524 <+36>: jge 0x400546 ; <+70> at main.cpp

>>> The trace was re-enabled correctly and includes the instruction of the
first reading.
```
Those instructions correspond to these lines
```
3 int main() {
4 int z = 0;
5 for (int i = 0; i < 10000; i++) {
6 z += fun(z)
...
```

Differential Revision: https://reviews.llvm.org/D85241
2020-10-23 16:36:42 -07:00
Richard Smith ccca93b5a2 Don't allow structured binding declarations to decompose a
lambda-expression's captures.

The built-in structured binding rules for classes require that all
fields can be accessed by name, and the fields introduced for lambda
captures are unnamed, so decomposing a capturing lambda is ill-formed.
2020-10-23 16:28:25 -07:00
Krzysztof Parzyszek 1b5baa42bc [Hexagon] Handle selection between HVX vector predicates
Make sure that (select i1 q0 q1) is handled properly.
2020-10-23 18:22:03 -05:00
Max Moroz dc62d5ec97 [libFuzzer] Added -print_full_coverage flag.
-print_full_coverage=1 produces a detailed branch coverage dump when run on a single file.
Uses same infrastructure as -print_coverage flag, but prints all branches (regardless of coverage status) in an easy-to-parse format.
Usage: For internal use with machine learning fuzzing models which require detailed coverage information on seed files to generate mutations.

Differential Revision: https://reviews.llvm.org/D85928
2020-10-23 16:05:54 -07:00
Teresa Johnson eeba325b12 [MemProf] Attempt to debug avr bot failure
Reverts the XFAIL added in b67a2aef8a,
which had no effect.

Adjust the test to make sure all output is dumped to stderr, so that
hopefully I can get a better idea of where/why this is failing.

Remove some redundant checking while here.
2020-10-23 16:00:08 -07:00
Arthur Eubanks baffd052b0 [StructurizeCFG][NewPM] Port -structurizecfg to NPM
This doesn't support -structurizecfg-skip-uniform-regions since that
would require porting LegacyDivergenceAnalysis.

The NPM doesn't support adding a non-analysis pass as a dependency of
another, so I had to add -lowerswitch to some tests or pin them to the
legacy PM.

This is the only RegionPass in tree, so I simply copied the logic for
finding all Regions from the legacy PM's RGManager into
StructurizeCFG::run().

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D89026
2020-10-23 15:54:03 -07:00
Arthur Eubanks ba22c403b2 [Inliner][NPM] Properly pass callee AAResults
Fixes noalias-calls.ll under NPM.

Differential Revision: https://reviews.llvm.org/D89592
2020-10-23 15:37:18 -07:00
Arthur Eubanks 245d71bae5 [test] Simplify pr33641_remove_arg_dbgvalue.ll
This makes it pass under the NPM.
The legacy PM pass ran passes on SCCs in a different order, causing
argpromotion to not trigger on @bar().

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D89889
2020-10-23 15:36:05 -07:00
Keith Smiley 77cbf25953 [llvm-install-name-tool] Add -prepend_rpath option
This diff adds the option -prepend_rpath which inserts an rpath as
the first rpath in the binary.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D89605
2020-10-23 15:01:03 -07:00
Akira Hatanaka 71e1a56de1 [CodeGen] Emit destructor calls to destruct non-trivial C struct
temporaries created by conditional and assignment operators

rdar://problem/64989559

Differential Revision: https://reviews.llvm.org/D83448
2020-10-23 14:46:17 -07:00
Evandro Menezes fe9a7d9627 [RISCV] Use the commercial name for scheduling model (NFC)
Use the commercial name for the scheduling model for the SiFive 7 Series.
2020-10-23 16:33:27 -05:00
Richard Smith cb9b9842d3 PR47954 / DR2126: permit temporary objects that are lifetime-extended by
variables that are usable in constant expressions to themselves be
usable in constant expressions.
2020-10-23 14:29:18 -07:00
Mehdi Amini 6a72635881 Revert "Remove global dialect registration"
This reverts commit b22e2e4c6e.

Investigating broken builds
2020-10-23 21:26:48 +00:00
Cameron McInally a1cc274cb3 [SVE] Lower fixed length VECREDUCE_SEQ_FADD operation
Differential Revision: https://reviews.llvm.org/D89162
2020-10-23 16:24:02 -05:00
Kirsten Lee f98bb414f5 Add a mlir natvis file for debugging with Visual Studio
Differential Revision: https://reviews.llvm.org/D89601
2020-10-23 14:15:01 -07:00
Artur Pilipenko 6ec2c5e402 GC-parseable element atomic memcpy/memmove
This change introduces a GC parseable lowering for element atomic
memcpy/memmove intrinsics. This way runtime can provide an
implementation which can take a safepoint during copy operation.

See "GC-parseable element atomic memcpy/memmove" thread on llvm-dev
for the background and details:
https://groups.google.com/g/llvm-dev/c/NnENHzmX-b8/m/3PyN8Y2pCAAJ

Differential Revision: https://reviews.llvm.org/D88861
2020-10-23 14:06:09 -07:00
Peter Steinfeld b6b589ca84 [flang] An erroneous type bound procedure was causing a call to CHECK()
I added a test to verify that the associated symbol did not have errors before
doing the anaylsis of a call to a component ref along with a test that
triggers the original problem.

Differential Revision: https://reviews.llvm.org/D90074
2020-10-23 13:53:58 -07:00
MaheshRavishankar b6204b995e [mlir][Vector] Introduce UnrollVectorOptions to control vector unrolling.
The current pattern for vector unrolling takes the native shape to
unroll to at pattern instantiation time, but the native shape might
defer based on the types of the operand. Introduce a
UnrollVectorOptions struct which allows for using a function that will
return the native shape based on the operation. Move other options of
unrolling like `filterConstraints` into this struct.

Differential Revision: https://reviews.llvm.org/D89744
2020-10-23 13:52:26 -07:00
Mehdi Amini b22e2e4c6e Remove global dialect registration
This has been deprecated for >1month now and removal was announced in:

https://llvm.discourse.group/t/rfc-revamp-dialect-registration/1559/11

Differential Revision: https://reviews.llvm.org/D86356
2020-10-23 20:41:44 +00:00
Richard Smith 2b7dfdd319 Fix typo in diagnostic name.
No functionality change intended.
2020-10-23 13:21:21 -07:00
Amy Huang 3827effe3a [Asan][Windows] Fix asan stack traces on Windows.
While implementing inline stack traces on Windows I noticed that the stack
traces in many asan tests included an inlined frame that shouldn't be there.

Currently we get the PC and then do a stack unwind and use the PC to
find the beginning of the stack trace.
In the failing tests the first thing in the stack trace is inside an inline
call site that shouldn't be in the stack trace, so replace it with the PC.

Differential Revision: https://reviews.llvm.org/D89996
2020-10-23 13:14:14 -07:00
Michael Liao 9497e2e7d8 Fix shared build. NFC. 2020-10-23 15:53:05 -04:00
Eugene Zhulenev b16f6324db [mlir] Link with pthreads in AsyncRuntime
AsyncRuntime must be explicitly linked with LLVM pthreads

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D89983
2020-10-23 12:52:51 -07:00
Louis Dionne 9f4b888c32 [libc++] NFC: Remove unused includes from the test suite
- <iostream> include from a <chrono> test
- <regex> include from the filesystem tests
2020-10-23 15:51:54 -04:00
Florian Hahn 089c1ccd6d [AArch64] Add vector compare/select cost-model tests. 2020-10-23 20:43:04 +01:00
Jonas Devlieghere 73811d32c7 [lldb] Move copying of files into reproducer out of process
For performance reasons the reproducers don't copy the files captured by
the file collector eagerly, but wait until the reproducer needs to be
generated.

This is a problematic when LLDB crashes and we have to do all this
signal-unsafe work in the signal handler. This patch uses a similar
trick to clang, which has the driver invoke a new cc1 instance to do all
this work out-of-process.

This patch moves the writing of the mapping file as well as copying over
the reproducers into a separate process spawned when lldb crashes.

Differential revision: https://reviews.llvm.org/D89600
2020-10-23 12:33:54 -07:00
Louis Dionne cb9f6c4c8c [libc++] Clean up unused CI files
Those were useful during CI experimentation, but are not used anymore.
2020-10-23 15:21:04 -04:00
Thomas Raoux ea6a60a9a6 [mlir][vector] Add folder for ExtractStridedSliceOp
Add folder for the case where ExtractStridedSliceOp source comes from a chain
of InsertStridedSliceOp. Also add a folder for the trivial case where the
ExtractStridedSliceOp is a no-op.

Differential Revision: https://reviews.llvm.org/D89850
2020-10-23 12:18:09 -07:00
Geoffrey Martin-Noble bfb04aeb85 Unconditionally #include <future>
This unbreaks building with `LLVM_ENABLE_THREADS=0`. Since
https://github.com/llvm/llvm-project/commit/069919c9ba33 usage of
`std::promise` is not guarded by `LLVM_ENABLE_THREADS`, so this header
must be unconditionally included.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D89758
2020-10-23 19:17:37 +00:00
Louis Dionne 2f8dd2687f [libc++] Refactor the run-buildbot script to make it more modular, and run the benchmarks
As a fly-by fix, unbreak the benchmarks on Apple platforms.

Differential Revision: https://reviews.llvm.org/D90043
2020-10-23 15:11:41 -04:00
Thomas Raoux 8c72eea9a0 [mlir][vector] Add folding for ExtractOp with ShapeCastOp source
Differential Revision: https://reviews.llvm.org/D89853
2020-10-23 12:06:18 -07:00
Arthur Eubanks 4b90a253c2 [gn build] Add missing comma 2020-10-23 12:01:23 -07:00
Duncan P. N. Exon Smith cf52a85ddc SourceManager: Simplify by inlining what remains of ComputeLineNumbers, NFC
Use `LineOffsetMapping:get` directly and remove/inline the helper
`ComputeLineNumbers`, simplifying the callers.

Differential Revision: https://reviews.llvm.org/D89922
2020-10-23 14:56:41 -04:00
Nick Desaulniers b7926ce6d7 [IR] add fn attr for no_stack_protector; prevent inlining on mismatch
It's currently ambiguous in IR whether the source language explicitly
did not want a stack a stack protector (in C, via function attribute
no_stack_protector) or doesn't care for any given function.

It's common for code that manipulates the stack via inline assembly or
that has to set up its own stack canary (such as the Linux kernel) would
like to avoid stack protectors in certain functions. In this case, we've
been bitten by numerous bugs where a callee with a stack protector is
inlined into an __attribute__((__no_stack_protector__)) caller, which
generally breaks the caller's assumptions about not having a stack
protector. LTO exacerbates the issue.

While developers can avoid this by putting all no_stack_protector
functions in one translation unit together and compiling those with
-fno-stack-protector, it's generally not very ergonomic or as
ergonomic as a function attribute, and still doesn't work for LTO. See also:
https://lore.kernel.org/linux-pm/20200915172658.1432732-1-rkir@google.com/
https://lore.kernel.org/lkml/20200918201436.2932360-30-samitolvanen@google.com/T/#u

Typically, when inlining a callee into a caller, the caller will be
upgraded in its level of stack protection (see adjustCallerSSPLevel()).
By adding an explicit attribute in the IR when the function attribute is
used in the source language, we can now identify such cases and prevent
inlining.  Block inlining when the callee and caller differ in the case that one
contains `nossp` when the other has `ssp`, `sspstrong`, or `sspreq`.

Fixes pr/47479.

Reviewed By: void

Differential Revision: https://reviews.llvm.org/D87956
2020-10-23 11:55:39 -07:00
Jonas Devlieghere a4459feca4 [lldb] Fix use of undefined type 'lldb_private::UtilityFunction'
We were returning the default constructed unique_pointer from
TypeSystem.h for which the compiler does not have a definition. Move the
implementation into the cpp file.
2020-10-23 11:48:11 -07:00
Xiangling Liao 05bef88eb3 [AIX] Let alloca return 16 bytes alignment
On AIX, to support vector types, which should always be 16 bytes aligned,
we set alloca to return 16 bytes aligned memory space.

Differential Revision: https://reviews.llvm.org/D89910
2020-10-23 14:41:32 -04:00
Stanislav Mekhanoshin 2e64ad9494 [AMDGPU] Fixed isLegalRegOperand() with physregs
This does not change anything at the moment, but needed for
D89170. In that change I am probing a physical SGPR to see if
it is legal. RC is SReg_32, but DRC for scratch instructions
is SReg_32_XEXEC_HI and test fails.

That is sufficient just to check if DRC contains a register
here in case of physreg. Physregs also do not use subregs
so the subreg handling below is irrelevant for these.

Differential Revision: https://reviews.llvm.org/D90064
2020-10-23 11:33:34 -07:00
Hubert Tong 1602c6fd92 [AIX][cmake] Adjust management of `-G` for linking
The change in 0ba9843397 changed the behaviour of the build when
using an XL build compiler because `-G` is not a pure linker option:
it also implies `-shared`. This was accounted for in the base CMake
configuration, so an analysis of the change from 0ba9843397 in
relation to a build using Clang (where `-shared` is introduced by CMake)
would not identify the issue. This patch resolves this particular issue
by adding `-shared` alongside `-Wl,-G`.

At the same time, the investigation reveals that several aspects of the
various build configurations are not operating in the manner originally
intended.

The other issue related to the `-G` linker option in the build is that
the removal of it (to avoid unnecessary use of run-time linking) is not
effective for the build using the Clang compiler. This patch addresses
this by adjusting the regular expressions used to remove the broadly-
applied `-G`.

Finally, the issue of specifying the export list with `-Wl,` instead of
a compiler option is flagged with a FIXME comment.

Reviewed By: daltenty, amyk

Differential Revision: https://reviews.llvm.org/D90041
2020-10-23 14:32:36 -04:00
Teresa Johnson b67a2aef8a [MemProf] XFAIL test on avr until issue can be debugged
For unknown reasons, this test started failing only on the
llvm-avr-linux bot after 5c20d7db9f2791367b9311130eb44afecb16829c:
http://lab.llvm.org:8011/#/builders/112/builds/365

The error message is not helpful, and I have an email out to the bot
owner to help with debugging. XFAIL it on avr for now.
2020-10-23 11:32:11 -07:00
Nikita Popov 1b65a51af8 [BasicAA] Add additional phi cycle test (NFC)
This is a variation of the BatchAA problem that also applies
without BatchAA. We may have a cached result from earlier in
the same query.
2020-10-23 20:31:20 +02:00
Mircea Trofin 819044ad2d [NFC] Use [MC]Register in RegAllocGreedy
This was initiated from the uses of MCRegUnitIterator, so while likely
not exhaustive, it's a step forward.

Differential Revision: https://reviews.llvm.org/D89975
2020-10-23 11:30:53 -07:00
Baptiste Saleil edb27912a3 [PowerPC] Add intrinsics for MMA
This patch adds support for MMA intrinsics.

Authored by: Baptiste Saleil

Reviewed By: #powerpc, bsaleil, amyk

Differential Revision: https://reviews.llvm.org/D89345
2020-10-23 13:16:02 -05:00
Nikita Popov dd887d97ce [PhiValues] Use SetVector to avoid non-determinism
I'm not sure whether this can cause actual non-determinism in the
compiler output, but at least it causes non-determinism in the
statistics collected by BasicAA.

Use SetVector to have a predictable iteration order.
2020-10-23 20:14:02 +02:00
Sean Silva 1253c40727 [mlir] Add FuncOp::eraseResults
I just found I needed this in an upcoming patch, and it seems generally
useful to have.

Differential Revision: https://reviews.llvm.org/D90000
2020-10-23 11:03:42 -07:00
Fangrui Song 9267caebfa [ELF] Don't error on R_PPC64_REL24/R_PPC64_REL24_NOTOC referencing __tls_get_addr for missing R_PPC64_TLSGD/R_PPC64_TLSLD
This partially reverts D85994.

In glibc, elf/dl-sym.c calls the raw `__tls_get_addr` by specifying the
tls_index parameter. Such a call does not have a pairing R_PPC64_TLSGD/R_PPC64_TLSLD.
This is legitimate. Since we cannot distinguish the benign case from cases due
to toolchain issues, we have to be permissive.

Acked by Stefan Pintilie
2020-10-23 10:38:07 -07:00
Mircea Trofin 2b8fb5185e [MLInliner] Disable always inliner in bounds tests
That changes the threshold calculation.
2020-10-23 10:24:51 -07:00
Duncan P. N. Exon Smith 5431c37b55 SourceManager: Make LastLineNoContentCache and ContentCache::SourceLineCache mutable, NFC
Avoid some noisy `const_cast`s by making `ContentCache::SourceLineCache`
and `SourceManager::LastLineNoContentCache` both mutable.

Differential Revision: https://reviews.llvm.org/D89914
2020-10-23 13:22:47 -04:00
Amara Emerson 0f0fd383b4 [AArch64][GlobalISel] Introduce a new post-isel optimization pass.
There are two optimizations here:

1. Consider the following code:
 FCMPSrr %0, %1, implicit-def $nzcv
 %sel1:gpr32 = CSELWr %_, %_, 12, implicit $nzcv
 %sub:gpr32 = SUBSWrr %_, %_, implicit-def $nzcv
 FCMPSrr %0, %1, implicit-def $nzcv
 %sel2:gpr32 = CSELWr %_, %_, 12, implicit $nzcv
This kind of code where we have 2 FCMPs each feeding a CSEL can happen
when we have a single IR fcmp being used by two selects. During selection,
to ensure that there can be no clobbering of nzcv between the fcmp and the
csel, we have to generate an fcmp immediately before each csel is
selected.

However, often we can essentially CSE these together later in MachineCSE.
This doesn't work though if there are unrelated flag-setting instructions
in between the two FCMPs. In this case, the SUBS defines NZCV
but it doesn't have any users, being overwritten by the second FCMP.

Our solution here is to try to convert flag setting operations between
a interval of identical FCMPs, so that CSE will be able to eliminate one.

2. SelectionDAG imported patterns for arithmetic ops currently select the
flag-setting ops for CSE reasons, and add the implicit-def $nzcv operand
to those instructions. However if those impdef operands are not marked as
dead, the peephole optimizations are not able to optimize them into non-flag
setting variants. The optimization here is to find these dead imp-defs and
mark them as such.

This pass is only enabled when optimizations are enabled.

Differential Revision: https://reviews.llvm.org/D89415
2020-10-23 10:18:36 -07:00