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122 Commits

Author SHA1 Message Date
Chris Lattner 55256dbf9b Fix potential problems with unreachable basic blocks. 
Also, while noone's looking, add support for constant expressions.  Wait,
I said not to look!

llvm-svn: 14566
 2004-07-02 05:49:11 +00:00
Misha Brukman b9125f462d Fix indentation to be 2 spaces. 
llvm-svn: 14512
 2004-06-30 22:11:03 +00:00
Misha Brukman 04f07b4589 visitSetCondInst() takes a parameter of type `SetCondInst' 
llvm-svn: 14508
 2004-06-30 21:47:40 +00:00
Brian Gaeke 81f67f60ec Allow saving and restoring of double and float registers. 
Allow copying of float registers.

llvm-svn: 14445
 2004-06-27 22:59:56 +00:00
Brian Gaeke b3d33c7994 Add FITOS, FITOD, and F{ADD,SUB,MUL,DIV}{S,D}. 
llvm-svn: 14444
 2004-06-27 22:53:56 +00:00
Brian Gaeke 187ff172b6 Support printing constant pool indices. 
If we see an "unknown operand", abort so it's easier to fix it.

llvm-svn: 14441
 2004-06-27 22:50:44 +00:00
Brian Gaeke c81b5a5331 Trim whitespace. 
Support cast of ints (and narrower) to float and double.
Support cast double to double (using load and store).
Abort if we see a CallInst or SetCondInst with long/fp args, instead
of producing bad code.
Support add, sub, mul, div of float and double.

llvm-svn: 14440
 2004-06-27 22:47:33 +00:00
Misha Brukman c562342751 * LowercaseString moved to StringExtras.h 
* Wrap long line to 80 cols

llvm-svn: 14382
 2004-06-24 23:38:20 +00:00
Brian Gaeke 27966ba77b Add FSTOD and FDTOS conversion instructions. 
llvm-svn: 14372
 2004-06-24 21:22:09 +00:00
Brian Gaeke 72490c8d86 Support cast float to float, cast double to float, and cast float to double. 
(It's not yet clear how to copy doubles from register to register.)

llvm-svn: 14371
 2004-06-24 21:22:08 +00:00
Brian Gaeke eea4b17cf8 Make the double-fp pseudo registers be "NamedRegs". 
llvm-svn: 14366
 2004-06-24 09:23:21 +00:00
Brian Gaeke 2f6741f4f3 Fix a dyn_cast in copyConstantToRegister which should have been a cast. 
Compactify the code that emits copies of constant ints into registers.

llvm-svn: 14365
 2004-06-24 09:17:47 +00:00
Brian Gaeke c605ae6754 The long integer pseudo-regs are history. So long, we hardly knew ye. 
llvm-svn: 14364
 2004-06-24 08:55:21 +00:00
Brian Gaeke 4ed2826ce5 Use correct add*Imm form in more BuildMI calls. 
Fix bug in emitGEPOperation where we weren't passing MBB, IP to getReg.
(hey, wouldn't a constant expression lowering pass be cool? huh huhuhuh)
Fix bug in emitGEPOperation where we might try to OR a constant into a
register which was too big to fit in the immediate field.
Support and, or, xor of longs.

llvm-svn: 14363
 2004-06-24 08:55:09 +00:00
Brian Gaeke 7777e66704 Rename the load and store opcodes. The non-fp ones only have one 
variant worth worrying about; the fp ones have two.

llvm-svn: 14362
 2004-06-24 07:37:12 +00:00
Brian Gaeke c8e1b5abe8 Rename the load and store opcodes. The non-fp ones only have one 
variant worth worrying about; the fp ones have two.
Add fp stores.

llvm-svn: 14361
 2004-06-24 07:36:59 +00:00
Brian Gaeke 9f455efff1 Rename the load and store opcodes. The non-fp ones only have one 
variant worth worrying about; the fp ones have two.
Stub out the case analysis of int-to-fp casts (no code yet).
I think the number of operands passed to BuildMI for loads was wrong.
Support load and store of float and double.

llvm-svn: 14360
 2004-06-24 07:36:48 +00:00
Brian Gaeke 8863de761d Strange as it may sound, we'll not use LDD/STD to store longs. For reasons of 
representational consistency, we want to address the halves of each 64-bit value
separately.

llvm-svn: 14356
 2004-06-24 06:44:57 +00:00
Brian Gaeke 1e8cc73ea3 Support constant cast expressions. 
llvm-svn: 14355
 2004-06-24 06:33:00 +00:00
Brian Gaeke 5825bdd8b2 Add pseudo-registers and register class for 64-bit integer values. 
llvm-svn: 14332
 2004-06-22 20:14:41 +00:00
Misha Brukman 31f4df6b54 Order #includes as per style guide. 
llvm-svn: 14305
 2004-06-21 21:54:40 +00:00
Chris Lattner bcdadf3765 Move the IntrinsicLowering header into the CodeGen directory, as per PR346 
llvm-svn: 14266
 2004-06-20 07:49:54 +00:00
Brian Gaeke 5b433a5de9 .zero doesn't work in the Solaris assembler. 
llvm-svn: 14231
 2004-06-18 08:59:16 +00:00
Brian Gaeke 4125c92009 Get rid of selects the easy way 
llvm-svn: 14230
 2004-06-18 08:46:15 +00:00
Brian Gaeke 694f7b78d9 Make visitAllocaInst() look more like its X86 counterpart. 
llvm-svn: 14229
 2004-06-18 08:45:52 +00:00
Brian Gaeke fcc30aca1b Mess around with allocation order. In particular, I think we ought to be 
using the local & in regs first because they are not clobbered by calls.

llvm-svn: 14228
 2004-06-18 08:19:08 +00:00
Brian Gaeke b42345811e JMPL has a delay slot. 
llvm-svn: 14227
 2004-06-18 08:18:54 +00:00
Brian Gaeke 7d9af983de Clean up the commented-out F3_3 stuff. 
Replace it with a working class for FP instrs.

llvm-svn: 14226
 2004-06-18 06:28:21 +00:00
Brian Gaeke 75f3738969 Fix jmpl. 
Add some FP moves.

llvm-svn: 14225
 2004-06-18 06:28:10 +00:00
Brian Gaeke 12ee9a1e75 Support printing base+offset pairs where the offset is a register. 
Use this for printing the jmpl indirect-call instruction.

llvm-svn: 14224
 2004-06-18 06:27:59 +00:00
Brian Gaeke 5ebab28a8a Support intrinsic calls (although no particular intrinsics are supported yet). 
Support indirect calls.
Support returning a float value.

llvm-svn: 14223
 2004-06-18 06:27:48 +00:00
Brian Gaeke 51d3c7b05b Add load instructions for floating-point registers. 
llvm-svn: 14217
 2004-06-18 05:19:27 +00:00
Brian Gaeke 21305c6f0c Support alloca instructions. 
Support copying floating-point constants to registers.
Add assertion to visitCallInst to abort if we hit a NULL calledFunction, for now.

llvm-svn: 14216
 2004-06-18 05:19:16 +00:00
Brian Gaeke c37af629b4 Make storeRegToStackSlot slightly shorter. 
Make copyRegToReg return 1 instead of -1.
Edit a comment in emitPrologue().

llvm-svn: 14211
 2004-06-17 22:34:48 +00:00
Brian Gaeke eca9546dc3 Set the isBranch and isTerminator flags on branch instructions correctly. 
Add a FIXME about the (currently unused) JMPL instructions.

llvm-svn: 14210
 2004-06-17 22:34:29 +00:00
Brian Gaeke 63c1d6eda8 Emit stores correctly; don't fail an assertion. 
llvm-svn: 14209
 2004-06-17 22:34:19 +00:00
Brian Gaeke c4ee938f55 Support generating machine instructions for Phi nodes (based on x86, but with 
modifications for 1 LLVM BB --> many MBBs).
Fix store operand order: make it always be Base, Offset, SrcReg (think
"[ Base + Offset ] = SrcReg").
Rewrite visitBranchInst() to be even dumber (but working) -- give up on
the branch fallthrough trick, for the time being.
Make visitSetCondInst() work.

llvm-svn: 14208
 2004-06-17 22:34:08 +00:00
Brian Gaeke a067fb3e6b Recognize more branches. 
llvm-svn: 14207
 2004-06-17 22:33:57 +00:00
Brian Gaeke 2f2b5f5b93 Use addGlobalAddress and addMBB for call & branch targets instead of addPCDisp. 
Abort if we see a PCRelativeDisp MachineOperand, to be safe. This matches
the X86 backend.

llvm-svn: 14202
 2004-06-17 19:39:23 +00:00
Chris Lattner 6b7275996c Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID() 
llvm-svn: 14201
 2004-06-17 18:19:28 +00:00
Brian Gaeke 476c73b241 Fix thinko in visitor... ShiftInsts should currently be delegated 
to visitBinaryOperator.

llvm-svn: 14182
 2004-06-15 21:09:46 +00:00
Brian Gaeke 675c0e9701 I think we'll use the standard lowering passes for now. 
llvm-svn: 14179
 2004-06-15 20:37:12 +00:00
Brian Gaeke 0c8ee30d53 Fix bug generating code for void call instructions: don't call 
getReg() on void value.

llvm-svn: 14178
 2004-06-15 20:06:32 +00:00
Brian Gaeke 065a6cb93a Squash a warning from the Solaris assembler by aligning the stack 
on a double-word boundary instead of a single-word boundary.

llvm-svn: 14177
 2004-06-15 19:53:10 +00:00
Brian Gaeke ad98a9b526 Allow special-casing of operand printing based on opcode. Print 
non-register, non-immed. arguments to SETHI and OR using %hi() and
%lo() respectively.

llvm-svn: 14176
 2004-06-15 19:52:59 +00:00
Brian Gaeke 19fbd28a06 Support constant GEP expressions. 
Support copying long constants to register pairs.
Support copying ConstantPointerNulls and ConstantPointerRefs to registers.

llvm-svn: 14175
 2004-06-15 19:16:07 +00:00
Chris Lattner 63c07bf246 Adjust to new TM interfaces 
llvm-svn: 13949
 2004-06-02 05:47:26 +00:00
Brian Gaeke 1096ba9422 Add support for widening integral casts. 
Flesh out the SetCC support... which currently ends in a little bit
of unfinished code (which is probably completely hilarious) for
generating the condition value splitting the basic block up into 4
blocks, like this (clearly a better API is needed for this!):

       BB
   cond. branch
     /         /          R1=1    R2=0
     \      /
      \    /
    R=phi(R1,R2)

Other minor edits.

llvm-svn: 13423
 2004-05-08 06:36:14 +00:00
Brian Gaeke 91bf7cb79b Add a bunch more branches 
llvm-svn: 13422
 2004-05-08 06:08:29 +00:00
Brian Gaeke 7a66e5fff9 Flesh out GEP support 
llvm-svn: 13421
 2004-05-08 05:27:20 +00:00