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3 Commits

Author SHA1 Message Date
Kazushi (Jam) Marukawa 58b810b579 [VE] Support fixed-point operation instructions in MC layer 
Summary:
Add regression tests of asmparser, mccodeemitter, and disassembler for
fixed-point operation instructions.  In order to support them, we add
MImm parser to asmparser.  Also add a new MPD instruction which is one
of multiply instructions.

Differential Revision: https://reviews.llvm.org/D81207
 2020-06-05 11:56:26 +02:00
Kazushi (Jam) Marukawa ec2e9ce73e [VE] Support I32/F32 registers in assembler parser 
Summary:
Support I32/F32 registers in assembler parser and add regression tests of LD/ST
instructions.

Differential Revision: https://reviews.llvm.org/D80777
 2020-06-02 10:22:45 +02:00
Kazushi (Jam) Marukawa 0e0907fa0e [VE] Implements minimum MC layer for VE (4/4) 
Summary:
This patch includes following items.

 - Adds AsmParser and minimum AsmBackend/ELFObjectWriter/MCCodeEmitter to
   support only LEA instruction in order to reduce the size of this patch.
 - Adds regression test of MC layer for a LEA instruction.
 - Relocations are not supported this time to reduce the size of this patch.

Differential Revision: https://reviews.llvm.org/D79546
 2020-05-29 10:50:16 +02:00