Commit Graph

16 Commits

Author SHA1 Message Date
Nick Lewycky 2f6bddd2b1 Add missing #include for "strlen" which is used inline in this header. Fixes
build under gcc 4.3.

llvm-svn: 71208
2009-05-08 06:22:25 +00:00
Sanjiv Gupta 89e72b9c4a Moved pic16 naming functions to correct place.
No functionality change.

llvm-svn: 71207
2009-05-08 04:50:14 +00:00
Sanjiv Gupta 960ae0660b Emit banksel and movlp instructions.
Split large global data (both initialized and un-initialized) into multiple sections of <= 80 bytes.
Provide routines to manage PIC16 ABI naming conventions.

llvm-svn: 71073
2009-05-06 08:02:01 +00:00
Bill Wendling 026e5d7667 Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.

llvm-svn: 70440
2009-04-29 23:29:43 +00:00
Bill Wendling 084669a1c9 Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.

llvm-svn: 70343
2009-04-29 00:15:41 +00:00
Bill Wendling 56f2987a87 r70270 isn't ready yet. Back this out. Sorry for the noise.
llvm-svn: 70275
2009-04-28 01:04:53 +00:00
Bill Wendling d0ae15946c Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...

llvm-svn: 70270
2009-04-28 00:21:31 +00:00
Evan Cheng 5e5a63cf8f CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
llvm-svn: 67668
2009-03-25 01:47:28 +00:00
Bill Wendling c5437ea429 Overhaul my earlier submission due to feedback. It's a large patch, but most of
them are generic changes.

- Use the "fast" flag that's already being passed into the asm printers instead
  of shoving it into the DwarfWriter.

- Instead of calling "MI->getParent()->getParent()" for every MI, set the
  machine function when calling "runOnMachineFunction" in the asm printers.

llvm-svn: 65379
2009-02-24 08:30:20 +00:00
Sanjiv Gupta f737337707 Implement LowerOperationWrapper for legalizer.
Also a few signed comparison fixes.

llvm-svn: 62665
2009-01-21 05:44:05 +00:00
Sanjiv Gupta 45da8b779c Checking in conditionals, function call, arrays and libcalls implementation.
llvm-svn: 62174
2009-01-13 19:18:47 +00:00
Dan Gohman 906152a20f Tidy up #includes, deleting a bunch of unnecessary #includes.
llvm-svn: 61715
2009-01-05 17:59:02 +00:00
Sanjiv Gupta 2ae21ee517 Added a more function PIC16 backend. However to get this working a patch in
ExpandIntegerOperand (LegalizeIntegerTypes.cpp) is needed which is yet to be reworked and submitted. 

llvm-svn: 59617
2008-11-19 11:00:54 +00:00
Owen Anderson 9371964f47 Use raw_ostream throughout the AsmPrinter.
llvm-svn: 55092
2008-08-21 00:14:44 +00:00
Sanjiv Gupta 1f8c9ef4cc Fixed the file description header at the top to remove the developer name.
llvm-svn: 51094
2008-05-14 06:50:01 +00:00
Sanjiv Gupta 4394c2376c Adding files for Microchip's PIC16 target.
A brief description about PIC16:
===============================
PIC16 is an 8-bit microcontroller with only one 8-bit register which is the 
accumulator. All arithmetic/load/store operations are 8-bit only.
The architecture has two address spaces: program and data. The program memory 
is divided into 2K pages and the data memory is divided into banks of 128 byte, with only 80 usable bytes, resulting in an non-contiguous data memory. 

It supports direct data memory access (by specifying the address as part of the instruction) and indirect data and program memory access (in an unorthodox fashion which utilize a 16 bit pointer register). 

Two classes of registers exist: (8-bit class which is only one
accumulator) (16-bit class, which contains one or more 16 bit
pointer(s))

llvm-svn: 51027
2008-05-13 09:02:57 +00:00