Commit Graph

252827 Commits

Author SHA1 Message Date
Eugene Zelenko 3943d2b0d7 [SystemZ] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 292983
2017-01-24 22:10:43 +00:00
Matt Arsenault 7aad8fd8f4 Enable FeatureFlatForGlobal on Volcanic Islands
This switches to the workaround that HSA defaults to
for the mesa path.

This should be applied to the 4.0 branch.

Patch by Vedran Miletić <vedran@miletic.net>

llvm-svn: 292982
2017-01-24 22:02:15 +00:00
Kuba Mracek e4c1dd2c08 [tsan] Enable ignore_noninstrumented_modules=1 on Darwin by default
TSan recently got the "ignore_noninstrumented_modules" flag, which disables tracking of read and writes that come from noninstrumented modules (via interceptors). This is a way of suppressing false positives coming from system libraries and other noninstrumented code. This patch turns this on by default on Darwin, where it's supposed to replace the previous solution, "ignore_interceptors_accesses", which disables tracking in *all* interceptors. The new approach should re-enable TSan's ability to find races via interceptors on Darwin.

Differential Revision: https://reviews.llvm.org/D29041

llvm-svn: 292981
2017-01-24 21:37:50 +00:00
Rui Ueyama 8981f3aacf Add a file comment to SyntheticSections.h.
llvm-svn: 292980
2017-01-24 21:35:25 +00:00
Dehao Chen a5eb1689dc Explicitly promote indirect calls before sample profile annotation.
Summary: In iterative sample pgo where profile is collected from PGOed binary, we may see indirect call targets promoted and inlined in the profile. Before profile annotation, we need to make this happen in order to annotate correctly on IR. This patch explicitly promotes these indirect calls and inlines them before profile annotation.

Reviewers: xur, davidxl

Reviewed By: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29040

llvm-svn: 292979
2017-01-24 21:05:51 +00:00
Richard Smith 6536f6058d Strengthen test from r292632 to also check we get the mangling correct for this case.
llvm-svn: 292978
2017-01-24 21:03:48 +00:00
Saleem Abdulrasool 85824ee618 Demangle: correct demangling for CV-qualified functions
When demangling a CV-qualified function type with a final reference type
parameter, we would treat the reference type parameter as a r-value ref
accidentally.  This would result in the improper decoration of the
function type itself.

Resolves PR31741!

llvm-svn: 292976
2017-01-24 20:04:58 +00:00
Saleem Abdulrasool 25ee0a62ac Demangle: use named values for CV qualifiers
Rather than hard-coding magic values of 1, 2, 4 (bit-field), use an enum
to name the values.  NFC.

llvm-svn: 292975
2017-01-24 20:04:56 +00:00
Ivan Krasin 34e89ad0a4 Revert [AMDGPU][mc][tests][NFC] Add coverage/smoke tests for Gfx7 and Gfx8.
Reason: broke ASAN bots with a global buffer overflow.
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/2291

Each test contains 20-30K test cases but takes only several (from 4 to 10)
seconds to complete on average machine. The tests cover the majority of
AMDGPU Gfx7/Gfx8 instructions, including many dark corners, and intended
to quickly find out if something is broken.

llvm-svn: 292974
2017-01-24 19:58:59 +00:00
Saleem Abdulrasool f5d26bb142 cxa_demangle: fix rvalue ref check
When checking if the type is a r-value ref, we would not do a complete
check.  This would result in us treating a trailing parameter reference
`&)` as a r-value ref, and improperly inject the cv qualifier on the
type.  We now correctly demangle the type `KFvRmE` as a constant
function rather than a constant reference.

Fixes PR31741!

llvm-svn: 292973
2017-01-24 19:57:05 +00:00
Peter Collingbourne 65cb42c1ce IRGen: Factor out function CodeGenAction::loadModule. NFCI.
llvm-svn: 292972
2017-01-24 19:55:38 +00:00
Daniel Berlin 390dfde0f3 Remove the load hoisting code of MLSM, it is completely subsumed by GVNHoist
Summary:
GVNHoist performs all the optimizations that MLSM does to loads, in a
more general way, and in a faster time bound (MLSM is N^3 in most
cases, N^4 in a few edge cases).

This disables the load portion.

Note that the way ld_hoist_st_sink.ll is written makes one think that
the loads should be moved to the while.preheader block, but

1. Neither MLSM nor GVNHoist do it (they both move them to identical places).

2. MLSM couldn't possibly do it anyway, as the while.preheader block
is not the head of the diamond, while.body is.  (GVNHoist could do it
if it was legal).

3. At a glance, it's not legal anyway because the in-loop load
conflict with the in-loop store, so the loads must stay in-loop.

I am happy to update the test to use update_test_checks so that
checking is tighter, just was going to do it as a followup.

Note that i can find no particular benefit to the store portion on any
real testcase/benchmark i have (even size-wise).  If we really still
want it, i am happy to commit to writing a targeted store sinker, just
taking the code from the MemorySSA port of MergedLoadStoreMotion
(which is N^2 worst case, and N most of the time).

We can do what it does in a much better time bound.

We also should be both hoisting and sinking stores, not just sinking
them, anyway, since whether we should hoist or sink to merge depends
basically on luck of the draw of where the blockers are placed.

Nonetheless, i have left it alone for now.

Reviewers: chandlerc, davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29079

llvm-svn: 292971
2017-01-24 19:55:36 +00:00
Peter Collingbourne 47d2364a51 IRGen: Factor out function clang::FindThinLTOModule. NFCI.
llvm-svn: 292970
2017-01-24 19:54:37 +00:00
Marshall Clow 86e7eae3a5 Add a test to make sure that implicit conversion from error_code to bool will fail
llvm-svn: 292969
2017-01-24 19:44:55 +00:00
Richard Smith 081ad4d3e5 [docs] Add TableGen-based generator for command line argument documentation,
and generate documentation for all (non-hidden) options supported by the
'clang' driver.

llvm-svn: 292968
2017-01-24 19:39:46 +00:00
Marshall Clow 1ee7bf6313 Update status for LWG2733
llvm-svn: 292967
2017-01-24 19:37:09 +00:00
Changpeng Fang c85abbd955 AMDGPU/SI: Give up in promote alloca when a pointer may be captured.
Differential Revision:
  http://reviews.llvm.org/D28970

Reviewer:
  Matt

llvm-svn: 292966
2017-01-24 19:06:28 +00:00
Saleem Abdulrasool c38cd326fc Demangle: avoid butchering parameter type
When demangling a CV-qualified function type with a final parameter with
a reference type, we would insert the CV qualification on the parameter
rather than the function, and in the process adjust the insertion point
by one extra, splitting the type name.  This avoids doing so, even
though the attribution is still incorrect.

llvm-svn: 292965
2017-01-24 18:52:19 +00:00
Mehdi Amini 3406bb6748 Fix test/Driver/embed-bitcode.c on non-Darwin host by setting the target explicitly
llvm-svn: 292964
2017-01-24 18:49:49 +00:00
Saleem Abdulrasool 0c44db8f0a cxa_demangle: avoid butchering the last parameter type
Fix an off-by-one case which would destroy the final parameter in a
CV-qualified function type with a reference.  We still get the CV
qualification incorrect, but at least we do not clobber the type name
any longer.

Partially fixes PR31741.

llvm-svn: 292963
2017-01-24 18:42:56 +00:00
Marshall Clow 0d1b5ce4f9 Implement LWG2733: [fund.ts.v2] gcd / lcm and bool. We already did tbis for C++17, so replicate the changes in experimental.
llvm-svn: 292962
2017-01-24 18:15:48 +00:00
Mehdi Amini 04e1a0a171 Forward -bitcode_process_mode to ld64 in marker-only mode
Reviewers: steven_wu

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D29066

llvm-svn: 292961
2017-01-24 18:15:21 +00:00
Mehdi Amini 6683e22c25 Split isUsingLTO() outside of embedBitcodeInObject() and embedBitcodeMarkerOnly().
Summary: These accessors maps directly to the command line option.

Reviewers: steven_wu

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D29065

llvm-svn: 292960
2017-01-24 18:12:25 +00:00
Chad Rosier 8e11fbd15d [AArch64] Fix typo. NFC.
llvm-svn: 292959
2017-01-24 18:08:10 +00:00
Marshall Clow 77dd30b557 Mark LWG2736 as complete. No code changes, but we have more tests now
llvm-svn: 292958
2017-01-24 18:03:32 +00:00
Amaury Sechet d90f5f6698 Use InstCombine's builder in foldSelectCttzCtlz instead of creating a new one.
Summary: As per title. This will add the instructiions we are interested in in the worklist.

Reviewers: mehdi_amini, majnemer, andreadb

Differential Revision: https://reviews.llvm.org/D29081

llvm-svn: 292957
2017-01-24 17:48:25 +00:00
Stanislav Mekhanoshin 22a56f2f5a [AMDGPU] Add VGPR copies post regalloc fix pass
Regalloc creates COPY instructions which do not formally use VALU.
That results in v_mov instructions displaced after exec mask modification.
One pass which do it is SIOptimizeExecMasking, but potentially it can be
done by other passes too.

This patch adds a pass immediately after regalloc to add implicit exec
use operand to all VGPR copy instructions.

Differential Revision: https://reviews.llvm.org/D28874

llvm-svn: 292956
2017-01-24 17:46:17 +00:00
Reid Kleckner 310c3d3d26 Fix pc_array bounds check to use elements instead of bytes
pc_array_size and kPcArrayMaxSize appear to be measured in elements, not
bytes, so we shouldn't multiply idx by sizeof(uptr) in this bounds
check.  32-bit Chrome was tripping this assertion because it has 64
million coverage points. I don't think it's worth adding a test that has
that many coverage points.

llvm-svn: 292955
2017-01-24 17:45:35 +00:00
Evandro Menezes 7784cacd91 [AArch64] Rename 'no-quad-ldst-pairs' to 'slow-paired-128'
In order to follow the pattern of the existing 'slow-misaligned-128store'
option, rename the option 'no-quad-ldst-pairs' to 'slow-paired-128'.

llvm-svn: 292954
2017-01-24 17:34:31 +00:00
Chris Bieneman bef847c3ae [Lanai] Rename LanaiInstPrinter library to LanaiAsmPrinter
Summary:
    This is in keeping with LLVM convention. The classes are InstPrinters, but the library is ${target}AsmPrinter.

This patch is in response to bryant pointing out to me that Lanai was the only backend deviating from convention here. Thanks!

Reviewers: jpienaar, bryant

Subscribers: mgorny, jgosnell, llvm-commits

Differential Revision: https://reviews.llvm.org/D29043

llvm-svn: 292953
2017-01-24 17:27:01 +00:00
Sanjay Patel 562272536a [InstSimplify] try to eliminate icmp Pred (add nsw X, C1), C2
I was surprised to see that we're missing icmp folds based on 'add nsw' in InstCombine, 
but we should handle the InstSimplify cases first because that could make the InstCombine
code simpler.

Here are Alive-based proofs for the logic:

Name: add_neg_constant
Pre: C1 < 0 && (C2 > ((1<<(width(C1)-1)) + C1))
%a = add nsw i7 %x, C1
%b = icmp sgt %a, C2
  =>
%b = false

Name: add_pos_constant
Pre: C1 > 0 && (C2 < ((1<<(width(C1)-1)) + C1 - 1))
%a = add nsw i6 %x, C1
%b = icmp slt %a, C2
  =>
%b = false

Name: nuw
Pre: C1 u>= C2
%a = add nuw i11 %x, C1
%b = icmp ult %a, C2
  =>
%b = false

Differential Revision: https://reviews.llvm.org/D29053

llvm-svn: 292952
2017-01-24 17:03:24 +00:00
Simon Pilgrim 5bdb95c078 [X86][AVX2] Regenerate test.
llvm-svn: 292950
2017-01-24 16:58:22 +00:00
Reid Kleckner 11cf053bd1 [CodeView] Fix off-by-one error in def range gap emission
Also fixes a much worse bug where we emitted the wrong gap size for the
def range uncovered by the test for this issue.

Fixes PR31726.

llvm-svn: 292949
2017-01-24 16:57:55 +00:00
Simon Pilgrim 1b80a14685 [X86][AVX2] Removed FIXME comment and regenerated test.
The comment talked about replacing vpmovzxwd+vpslld+vpsrad with vpmovsxwd - which isn't valid as we're sign extending a <8 x i1> bool vector not an all/nobits <8 x i16>

llvm-svn: 292948
2017-01-24 16:56:23 +00:00
Simon Pilgrim fa6afd1bc6 [X86][AVX2] Cleaned up test triple and regenerated tests.
llvm-svn: 292946
2017-01-24 16:53:09 +00:00
Bill Seurer f7e822534e [powerpc] deactivate ThreadedMallocStressTest asan test on powerpc64
This has not reliably worked on powerpc since r279664.  Re-enable this
once the problem is tracked down and fixed.

llvm-svn: 292945
2017-01-24 16:51:16 +00:00
Geoff Berry 92a286ae5a [SelectionDAG] Handle inverted conditions when splitting into multiple branches.
Summary:
When conditional branches with complex conditions are split into
multiple branches in SelectionDAGBuilder::FindMergedConditions, also
handle inverted conditions.  These may sometimes appear without having
been optimized by InstCombine when CodeGenPrepare decides to sink and
duplicate cmp instructions, causing them to have only one use.  This
problem can be increased by e.g. GVNHoist hiding more cmps from
InstCombine by combining equivalent cmps from different blocks.

For example codegen X & !(Y | Z) as:
    jmp_if_X TmpBB
    jmp FBB
  TmpBB:
    jmp_if_notY Tmp2BB
    jmp FBB
  Tmp2BB:
    jmp_if_notZ TBB
    jmp FBB

Reviewers: bogner, MatzeB, qcolombet

Subscribers: llvm-commits, hiraditya, mcrosier, sebpop

Differential Revision: https://reviews.llvm.org/D28380

llvm-svn: 292944
2017-01-24 16:36:07 +00:00
Marshall Clow f56e3cdd5d A couple more tests for constexpr stuff in string_view. No changes other than test code.
llvm-svn: 292943
2017-01-24 16:28:02 +00:00
Alex Lorenz 9111cc217d Revert "r292904 - [lit] Allow boolean expressions in REQUIRES and XFAIL
and UNSUPPORTED"

After r292904 llvm-lit fails to emit the test results in the XML format for
Apple's internal buildbots.

rdar://30164800

llvm-svn: 292942
2017-01-24 16:17:04 +00:00
Simon Pilgrim 893d2119ee [X86][AVX512] Remove unused argument from PMOVX tablegen patterns. NFCI.
Seems to be a copy+paste legacy from the AVX2 patterns.

llvm-svn: 292941
2017-01-24 16:16:29 +00:00
George Rimar 3a934abe48 [ELF] - Fixed crash after incrementing end iterator.
Next code crashed under MSVS2015 for me:
this->OutSec->Info = this->Info = 1 + It - Symbols.begin();

Because It was end() and addition of 1 is not allowed. 
vector implementation catched and failed that inside:

_Myiter& operator+=(difference_type _Off)
{	// increment by integer
 #if _ITERATOR_DEBUG_LEVEL == 2
if (this->_Getcont() == 0
	|| this->_Ptr + _Off < ((_Myvec *)this->_Getcont())->_Myfirst
	|| ((_Myvec *)this->_Getcont())->_Mylast < this->_Ptr + _Off)
   {	// report error
	_DEBUG_ERROR("vector iterator + offset out of range");
	_SCL_SECURE_OUT_OF_RANGE;

llvm-svn: 292940
2017-01-24 16:07:18 +00:00
Pavel Labath 68de04e2d2 Fix android build for r292935 (personality.h)
It turns out things are not as simple as I hoped. sys/personality.h
exists on all androids but it does not define the required symbols on
all platform levels.

Add a compile check for platform level to compile against both new and
old android headers.

llvm-svn: 292939
2017-01-24 15:35:53 +00:00
Gabor Horvath 3ac2ad7d6c [clang-tidy] Don't modernize-raw-string-literal if replacement is longer.
Fixes PR30964. The old behavior can be achieved using a setting.

Patch by: Andras Leitereg!

Differential Revision: https://reviews.llvm.org/D28667

llvm-svn: 292938
2017-01-24 15:18:11 +00:00
Ed Maste 31f018032f FreeBSD ARM support for software single step
Implementation of software single step for FreeBSD on ARM. The code is
largely based on the Linux implementation of the same functionality.

Patch by Dmitry Mikulin!

Differential Revision:	https://reviews.llvm.org/D25756

llvm-svn: 292937
2017-01-24 14:34:49 +00:00
Pavel Labath b699c548c6 android-mips: define PTRACE_GETREGSET in headers don't do it
PTRACE_GETREGSET is only defined on mips only since api level 21. Define
it ourselves, so we can compile with older platform headers.

llvm-svn: 292936
2017-01-24 14:27:51 +00:00
Pavel Labath e9862b607e include linux/personality.h on android
sys/personality.h is present only since android platform level 21. The
linux/ version is present everywhere.

llvm-svn: 292935
2017-01-24 14:24:31 +00:00
Amaury Sechet 5da456e6a1 Fix formating in foldSelectCttzCtlz. NFC
llvm-svn: 292934
2017-01-24 14:22:27 +00:00
Jonas Paulsson d9ae93ac9e Improve comment for ISD::EXTRACT_VECTOR_ELT
The comment in ISDOpcodes.h for EXTRACT_VECTOR_ELT now explains that the high
bits are undefined if the result is extended.

Review: Hal Finkel
llvm-svn: 292933
2017-01-24 14:21:29 +00:00
Alex Lorenz 638dbc3036 [CodeCompletion] Ensure that ObjC root class completes instance
methods from protocols and categories as well

Code completion results for class methods already include instance methods
from Objective-C root classes. This commit ensures that the results also include
instance methods from protocols that the root class implements and root class
categories as well.

rdar://28012953

Differential Revision: https://reviews.llvm.org/D27257

llvm-svn: 292932
2017-01-24 14:15:08 +00:00
Pavel Labath b8ad01559f Include termios.h for definition of struct winsize
On android API level 9 the header does not get included transitively.
Include it directly.

As far as I can see, all non-windows platforms should have this header.
If that turns out to be incorrect, we can add some ifdefs around that.

llvm-svn: 292931
2017-01-24 14:05:23 +00:00