Commit Graph

1222 Commits

Author SHA1 Message Date
Reid Kleckner b04cb9ab7a [MS] Add support for __ud2 and __int2c MSVC intrinsics
This was requested in PR31958 and elsewhere.

llvm-svn: 297057
2017-03-06 19:43:16 +00:00
Oren Ben Simhon 259b091669 [X86] DAZ Macros Relocation
The DAZ feature introduces the denormal zero support for x86.
Currently the definitions are located under SSE3 header, however there are some SSE2 targets that support the feature as well.

Differential Revision: https://reviews.llvm.org/D30194

llvm-svn: 296296
2017-02-26 11:58:15 +00:00
Simon Pilgrim a81d45a1ba [X86][XOP] Fix type conversion warning in vpcmov generic implementations.
llvm-svn: 295584
2017-02-18 23:47:34 +00:00
Craig Topper 117892098a [X86] Replace XOP vpcmov builtins with native vector logical operations.
llvm-svn: 295570
2017-02-18 21:15:30 +00:00
Ekaterina Romanova ff266f5236 Added doxygen comments to smmintrin.h's intrinsics.
Note: The doxygen comments are automatically generated based on Sony's intrinsic
s document.

I got an OK from Eric Christopher to commit doxygen comments without prior code
review upstream.

llvm-svn: 295404
2017-02-17 02:49:50 +00:00
Anastasia Stulova 58984e7087 [OpenCL] Correct ndrange_t implementation
Removed ndrange_t as Clang builtin type and added
as a struct type in the OpenCL header.

Use type name to do the Sema checking in enqueue_kernel
and modify IR generation accordingly.

Review: D28058

Patch by Dmitry Borisenkov!  
 

llvm-svn: 295311
2017-02-16 12:27:47 +00:00
Craig Topper f0d1147fae [AVX-512] Replace 512-bit masked packss/packus builtins and replace with new unmasked builtins.
These new unmasked builtins will enable us to easily support optimizing these builtins in InstCombine in the backend.

llvm-svn: 295291
2017-02-16 06:32:07 +00:00
Reid Kleckner 2a02c2e331 Fix some warnings in intrin.h
llvm-svn: 295082
2017-02-14 18:38:19 +00:00
Reid Kleckner 04f9f91da6 [MS] Implement the __fastfail intrinsic as a builtin
__fastfail terminates the process immediately with a special system
call. It does not run any process shutdown code or exception recovery
logic.

Fixes PR31854

llvm-svn: 294606
2017-02-09 18:31:06 +00:00
Craig Topper 4574226c3f [X86] Clzero flag addition and inclusion under znver1
1. Adds the command line flag for clzero.
2. Includes the clzero flag under znver1.
3. Defines the macro for clzero.
4. Adds a new file which has the intrinsic definition for clzero instruction.

Patch by Ganesh Gopalasubramanian with some additional tests from me.

Differential revision: https://reviews.llvm.org/D29386

llvm-svn: 294559
2017-02-09 06:10:14 +00:00
Ekaterina Romanova ae7b82eaf8 Doxygen comments for prfchwintrin.h
Added doxygen comments to prfchwintrin.h's intrinsics. 

Note: The doxygen comments are automatically generated based on Sony's intrinsic
s document.

I got an OK from Eric Christopher to commit doxygen comments without prior code
review upstream.

llvm-svn: 293745
2017-02-01 07:37:40 +00:00
Anastasia Stulova d1f390ef99 [OpenCL] Diagnose write_only image3d when extension is disabled
Prior to OpenCL 2.0, image3d_t can only be used with the write_only
access qualifier when the cl_khr_3d_image_writes extension is enabled,
see e.g. OpenCL 1.1 s6.8b.

Require the extension for write_only image3d_t types and guard uses of
write_only image3d_t in the OpenCL header.

Patch by Sven van Haastregt!

Review: https://reviews.llvm.org/D28860
llvm-svn: 293050
2017-01-25 12:18:50 +00:00
Paul Robinson a363d14538 Guard __gnuc_va_list typedef.
Differential Revision: http://reviews.llvm.org/D28620

llvm-svn: 292819
2017-01-23 19:09:21 +00:00
Tim Shen 867be0d14c [Altivec] Change vec_sl to a << (b % (sizeof(a) * 8))
For a << b (as original vec_sl does), if b >= sizeof(a) * 8, the
behavior is undefined. However, Power instructions do define the
behavior, which is equivalent to a << (b % (sizeof(a) * 8)).

This patch changes altivec.h to use a << (b % (sizeof(a) * 8)), to
ensure the consistent semantic of the instructions. Then it combines
the generated multiple instructions back to a single shift.

This patch handles left shift only. Right shift, on the other hand, is
more complicated, considering arithematic/logical right shift.

Differential Revision: https://reviews.llvm.org/D28037

llvm-svn: 292659
2017-01-20 22:05:33 +00:00
Craig Topper 367c86ddbe [AVX-512] Replace subvector broadcast builtins with shufflevectors and selects.
Verified that the backend codegens this equally well.

llvm-svn: 292329
2017-01-18 02:17:10 +00:00
Ekaterina Romanova 2e041c9c20 [DOXYGEN] Documentation for the newly added x86 intrinsics.
Added doxygen comments for the newly added intrinsics in avxintrin.h, namely _mm256_cvtsd_f64, _mm256_cvtsi256_si32 and _mm256_cvtss_f32 

Added doxygen comments for the new intrinsics in emmintrin.h, namely _mm_loadu_si64 and _mm_load_sd.

Explicit parameter names were added for _mm_clflush and _mm_setcsr 

The rest of the changes are editorial, removing trailing spaces at the end of the lines.

Differential Revision: https://reviews.llvm.org/D28503

llvm-svn: 291876
2017-01-13 01:14:08 +00:00
Tony Jiang 974e4c7899 [PowerPC] Fix the wrong implementation of builtin vec_rlnm.
llvm-svn: 291702
2017-01-11 20:59:42 +00:00
Sean Fertile 96d9e0ec05 Add vec_insert4b and vec_extract4b functions to altivec.h
Add builtins for the functions and custom codegen mapping the builtins to their
corresponding intrinsics and handling the endian related swapping.

https://reviews.llvm.org/D26546

llvm-svn: 291179
2017-01-05 21:43:30 +00:00
Justin Lebar b8f7a3b8b1 [CUDA] Rename keywords used in macro so they don't conflict with MSVC.
Summary:
MSVC seems to use "__in" and "__out" for its own purposes, so we have to
pick different names in this macro.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D28325

llvm-svn: 291138
2017-01-05 16:54:11 +00:00
Justin Lebar 11d5116904 [CUDA] Don't define functions that the CUDA headers themselves define on Windows.
Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D28324

llvm-svn: 291137
2017-01-05 16:53:55 +00:00
Justin Lebar 1863d611f8 [Windows] Remove functions in intrin.h that are defined in Builtin.def.
Summary:
These duplicate declarations cause a problem for CUDA compiles on
Windows.  All implicitly-defined functions are host+device, and this
applies to the declarations in Builtin.def.  But then when we see the
declarations in intrin.h, they have no attributes, so are host-only
functions.  This is an error.

(A better fix might be to make these builtins host-only, but that is a
much bigger change.)

Reviewers: rnk

Subscribers: cfe-commits, echristo

Differential Revision: https://reviews.llvm.org/D28317

llvm-svn: 291128
2017-01-05 16:51:37 +00:00
Artem Belevich 60f25f70c8 [CUDA] Pre-include sm_60 and sm_61 headers.
CUDA-8.0 comes with new headers which nvcc pre-includes via cuda_runtime.h
Clang now makes them available as well.

Differential Revision: https://reviews.llvm.org/D28301

llvm-svn: 290982
2017-01-04 18:39:29 +00:00
Ekaterina Romanova c9ed514632 [DOXYGEN] Improved doxygen comments for xmmintrin.h intrinsics.
Added \n commands to insert a line breaks where necessary, since one long line of documentation is nearly unreadable.
Formatted comments to fit into 80 chars.
In some cases added \a command in front of the parameter names to display them in italics.

llvm-svn: 290619
2016-12-27 18:53:29 +00:00
Craig Topper 70536f4e47 [AVX-512] Replace masked 512-bit pmuldq and pmuludq builtins with the newly added unmasked versions and selects.
llvm-svn: 290580
2016-12-27 04:04:57 +00:00
Craig Topper 32866ab800 Revert r290574 "foo"
This was supposed to be merged with another commit with a real commit message. Sorry.

llvm-svn: 290579
2016-12-27 04:03:29 +00:00
Craig Topper c5ab78d4c3 Revert r290575 "[AVX-512] Replace masked 512-bit pmuldq and pmuludq builtins with the newly added unmasked versions and selects."
I failed to merge this with r290574.

llvm-svn: 290578
2016-12-27 04:03:25 +00:00
Craig Topper 6ad5bcc8ac [AVX-512] Replace masked 512-bit pmuldq and pmuludq builtins with the newly added unmasked versions and selects.
llvm-svn: 290575
2016-12-27 03:46:16 +00:00
Craig Topper 39b9e32493 foo
llvm-svn: 290574
2016-12-27 03:46:13 +00:00
Ekaterina Romanova dffe45b3e6 [DOXYGEN] Improved doxygen comments for x86 intrinsics.
Improved doxygen comments for the following intrinsics headers:  __wmmintrin_pclmul.h, bmiintrin.h, emmintrin.h, f16cintrin.h, immintrin.h, mmintrin.h, pmmintrin.h, tmmintrin.h

Added \n commands to insert a line breaks where necessary, since one long line of documentation is nearly unreadable.
Formatted comments to fit into 80 chars.
In some cases added \a command in front of the parameter names to display them in italics.

llvm-svn: 290561
2016-12-27 00:49:38 +00:00
Marina Yatsina c42fd03bf8 [inline-asm]No error for conflict between inputs\outputs and clobber list
According to extended asm syntax, a case where the clobber list includes a variable from the inputs or outputs should be an error - conflict.
for example:

const long double a = 0.0;
int main()
{

char b;
double t1 = a;
__asm__ ("fucompp": "=a" (b) : "u" (t1), "t" (t1) : "cc", "st", "st(1)");

return 0;
}

This should conflict with the output - t1 which is st, and st which is st aswell.
The patch fixes it.

Commit on behald of Ziv Izhar.

Differential Revision: https://reviews.llvm.org/D15075

llvm-svn: 290539
2016-12-26 12:23:42 +00:00
Ekaterina Romanova 16166a4d71 [DOXYGEN] Improved doxygen comments for tmmintrin.h intrinsics.
Added \n commands to insert a line breaks where necessary to make the documentation more readable. 
Formatted comments to fit into 80 chars.

llvm-svn: 290458
2016-12-23 23:36:26 +00:00
Ekaterina Romanova 6de0cd870b [DOXYGEN] Improved doxygen comments for tmmintrin.h intrinsics.
Tagged parameter names with \a doxygen command to display parameters in italics.
Added \n commands to insert a line break to make the documentation more readable. 
Formatted comments to fit into 80 chars.

llvm-svn: 290455
2016-12-23 22:47:16 +00:00
Yaxun Liu 5b74665a41 Recommit r289979 [OpenCL] Allow disabling types and declarations associated with extensions
Fixed undefined behavior due to cast integer to bool in initializer list.

llvm-svn: 290056
2016-12-18 05:18:55 +00:00
Yaxun Liu 35f6d66b0d Revert r289979 due to regressions
llvm-svn: 289991
2016-12-16 21:23:55 +00:00
Yaxun Liu 2e8331cab6 [OpenCL] Allow disabling types and declarations associated with extensions
Added a map to associate types and declarations with extensions.

Refactored existing diagnostic for disabled types associated with extensions and extended it to declarations for generic situation.

Fixed some bugs for types associated with extensions.

Allow users to use pragma to declare types and functions for supported extensions, e.g.

#pragma OPENCL EXTENSION the_new_extension_name : begin
// declare types and functions associated with the extension here
#pragma OPENCL EXTENSION the_new_extension_name : end

Differential Revision: https://reviews.llvm.org/D21698

llvm-svn: 289979
2016-12-16 19:22:08 +00:00
Bruno Cardoso Lopes 88458c31e7 Revert "[Headers] Add #include_next for tgmath.h on Darwin"
Reverts r289181: it's currently breaking modules using simd.h in
10.12 SDK.

This reverts commit 6e73e3464e96a4e00492c24aa790d36e1adb5702.

llvm-svn: 289487
2016-12-12 23:06:58 +00:00
Craig Topper 678b07fe3c [AVX-512] Remove masking from 512-bit vpermil builtins. The backend now has versions without masking so wrap it with select.
This will allow the backend to constant fold these to generic shuffle vectors like 128-bit and 256-bit without having to working about handling masking.

llvm-svn: 289351
2016-12-11 01:26:52 +00:00
Craig Topper cdd3603c04 [AVX-512] Remove masking from 512-bit pshufb builtin. The backend now has a version without masking so wrap it with select.
This will allow the backend to constant fold these to generic shuffle vectors like 128-bit and 256-bit without having to working about handling masking.

llvm-svn: 289345
2016-12-10 23:09:52 +00:00
Craig Topper 5391c98341 [AVX-512] Remove 128/256-bit masked vpermilvar builtins and replace with select and the avx unmasked builtins.
llvm-svn: 289338
2016-12-10 20:27:39 +00:00
Ekaterina Romanova 0c1c3bbc78 [DOXYGEN] Improved doxygen comments for x86 intrinsics headers.
Tagged instruction names with <c> INSTR_NAME </c> to display them in typewriter font.

In the past, \c command was used, unfortunately it applied to only one word. 
<c> .. </c> has the same meaning, but applies to all words in between the tags.

llvm-svn: 289249
2016-12-09 18:35:50 +00:00
Bruno Cardoso Lopes 052e6ddf27 [Headers] Add #include_next for tgmath.h on Darwin
Allow darwin to provide additional definitions and implementation
specifc values for tgmath.h on Apple platforms.

rdar://problem/19019845

llvm-svn: 289181
2016-12-09 03:30:46 +00:00
Ekaterina Romanova 08da283295 [DOXYGEN] Improved doxygen comments for xmmintrin.h intrinsics.
Tagged parameter names with \a doxygen command to display parameters in italics.
Formatted comments to fit into 80 chars.

llvm-svn: 289159
2016-12-08 23:58:39 +00:00
Ekaterina Romanova 3494a597e9 [DOXYGEN] Improved doxygen comments.
Improved doxygen comments for fxsrintrin.h and mmintrin.h intrinsics by taagging parameter names with \a doxygen command to display parameters in italics.

Formatted comments to fit into 80 chars.

llvm-svn: 289154
2016-12-08 23:32:07 +00:00
Ekaterina Romanova 797b0ebf2d [DOXYGEN] Improved doxygen comments for emmintrin.h intrinsics.
Tagged parameter names with \a doxygen command to display parameters in italics.
Formatted comments to fit into 80 chars.

llvm-svn: 289116
2016-12-08 22:10:51 +00:00
Ekaterina Romanova a8fde7ce8b [DOXYGEN] Improved doxygen comments.
Improved doxygen comments for __wmmintrin_pclmul.h and ammintrin.h intrinsics by taagging parameter names with \a doxygen command to display parameters in italics.

Formatted comments to fit into 80 chars.

llvm-svn: 289083
2016-12-08 17:57:23 +00:00
Ekaterina Romanova d6042197db [DOXYGEN] Improved doxygen comments for avxintrin.h intrinsics.
Tagged parameter names with \a doxygen command to display them in italics.
Formatted comments to fit into 80 chars.

llvm-svn: 289022
2016-12-08 04:09:17 +00:00
Bruno Cardoso Lopes d93779da15 [Headers] Enable #include_next<float.h> on Darwin
Allows darwin targets to provide additional definitions and
implementation specifc values for float.h

rdar://problem/21961491

llvm-svn: 289018
2016-12-08 02:13:56 +00:00
Ekaterina Romanova 4c77e8940e [DOXYGEN] Updated instruction names corresponding to avxintrin.h intrinsics.
Documentation for some of the avxintrin.h's intrinsics errorneously said that
non VEX-prefixed instructions could be generated. This was fixed.

I tried several different solutions to achieve pretty printing of unordered lists (nested and non-nested) in param sections in doxygen. 

llvm-svn: 287990
2016-11-26 19:38:19 +00:00
Ehsan Amiri 85f5bfcf0d [PPC] support for arithmetic builtins in the FE
(commit again after fixing the buildbot failures)
This adds various overloads of the following builtins to altivec.h:

    vec_neg
    vec_nabs
    vec_adde
    vec_addec
    vec_sube
    vec_subec
    vec_subc

Note that for vec_sub builtins on 32 bit integers, the semantics is similar to
what ISA describes for instructions like vsubecuq that work on quadwords: the
first operand is added to the one's complement of the second operand. (As
opposed to two's complement which I expected).

llvm-svn: 287872
2016-11-24 12:40:04 +00:00
Ehsan Amiri 9cce1ee88c [PPC] revert r287795
A test that passed locally is failing on one of the build bots.

llvm-svn: 287796
2016-11-23 18:55:17 +00:00
Ehsan Amiri 9b91cfa0b0 [PPC] support for arithmetic builtins in the FE
(commit again after fixing the buildbot failures)
This adds various overloads of the following builtins to altivec.h:

    vec_neg
    vec_nabs
    vec_adde
    vec_addec
    vec_sube
    vec_subec
    vec_subc

Note that for vec_sub builtins on 32 bit integers, the semantics is similar to
what ISA describes for instructions like vsubecuq that work on quadwords: the
first operand is added to the one's complement of the second operand. (As
opposed to two's complement which I expected).

llvm-svn: 287795
2016-11-23 18:36:29 +00:00
Ehsan Amiri ac10595b0d [PPC] Reverting r287772
Due to buildbot failure, I revert. Will recommit after investigation.

llvm-svn: 287775
2016-11-23 16:56:03 +00:00
Ehsan Amiri 5ea1054dab [PPC] support for arithmetic builtins in the FE
This adds various overloads of the following builtins to altivec.h:

    vec_neg
    vec_nabs
    vec_adde
    vec_addec
    vec_sube
    vec_subec
    vec_subc

Note that for vec_sub builtins on 32 bit integers, the semantics is similar to
what ISA describes for instructions like vsubecuq that work on quadwords: the
first operand is added to the one's complement of the second operand. (As
opposed to two's complement which I expected).

llvm-svn: 287772
2016-11-23 16:32:05 +00:00
Craig Topper 6aefe00ccf [X86] Replace valignd/q builtins with appropriate __builtin_shufflevector.
llvm-svn: 287733
2016-11-23 01:47:12 +00:00
Ekaterina Romanova bf667b21ac Add doxygen comments to immintrin.h's intrinsics.
The doxygen comments are automatically generated based on Sony's intrinsics docu
ment.

I got an OK from Eric Christopher to commit doxygen comments without prior code
review upstream. This patch was internally reviewed by Charles Li.

llvm-svn: 287483
2016-11-20 08:35:05 +00:00
Ekaterina Romanova 0a70076121 Doxygen comments for avxintrin.h.
Added doxygen comments to avxintrin.h's intrinsics. As of now, all the intrinsics in this file that were documented by Sony's intrinsics guide should have corresponding doxygen comments.

Note: The doxygen comments are automatically generated based on Sony's intrinsic
s document.

I got an OK from Eric Christopher to commit doxygen comments without prior code
review upstream.

Reviewed by Wolfgang Pieb.

llvm-svn: 287436
2016-11-19 04:59:08 +00:00
Ekaterina Romanova 06b1914cb7 Add doxygen comments for lzcntintrin.h's intrinsics.
The doxygen comments are automatically generated based on Sony's intrinsics document.

I got an OK from Eric Christopher to commit doxygen comments without prior code
review upstream. This patch was internally reviewed by Charles Li.

llvm-svn: 287317
2016-11-18 06:26:01 +00:00
Craig Topper 37bf5c6a3f [AVX-512] Replace masked 16-bit element variable shift builtins with new unmasked versions and selects.
llvm-svn: 287313
2016-11-18 05:04:51 +00:00
Ekaterina Romanova 53088dd44d Add doxygen comments to fxsrintrin.h's intrinsics.
The doxygen comments are automatically generated based on Sony's intrinsics document.

I got an OK from Eric Christopher to commit doxygen comments without prior code
review upstream. This patch was internally reviewed by Paul Robinson and Charles Li.

llvm-svn: 287295
2016-11-18 01:42:01 +00:00
Justin Lebar 50fe985349 [CUDA] Wrapper header changes necessary to support MacOS.
Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D26780

llvm-svn: 287288
2016-11-18 00:41:35 +00:00
Ekaterina Romanova 2174b6fe72 Minor changes in x86 intrinsics headers; NFC
I made several changes for consistency with the rest of x86 instrinsics header files. Some of these changes help to render doxygen comments better.

1. avxintrin.h –  Moved the opening bracket on a separate line for several 
                  intrinsics (for consistency with the rest of the intrinsics).

2. emmintrin.h -  Moved the doxygen comment next to the body of the function;
               -  Added braces after extern "C"  even though there is only 
                  one declaration each time

3. xmmintrin.h -  Moved the doxygen comment next to the body of the function;
               -  Added intrinsic prototypes for a couple of macro definitions
                  into the doxygen comment;
               -  Added braces after extern "C"  even though there is only one
                  declaration each time

4. ammintrin.h –  Removed extra line between the doxygen comment and the body
                  of the functions (for consistency with the rest of the files).

Desk reviewed by Paul Robinson.

llvm-svn: 287278
2016-11-17 23:02:00 +00:00
Simon Pilgrim 698528d83b [X86][AVX512] Replace lossless i32/u32 to f64 conversion intrinsics with generic IR
Both the (V)CVTDQ2PD (i32 to f64) and (V)CVTUDQ2PD (u32 to f64) conversion instructions are lossless and can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics without affecting final codegen.

This patch removes the clang builtins and their use in the headers - a future patch will deal with removing the llvm intrinsics.

This is an extension patch to D20528 which dealt with the equivalent sse/avx cases.

Differential Revision: https://reviews.llvm.org/D26686

llvm-svn: 287088
2016-11-16 09:27:40 +00:00
Zaara Syeda c1d2952388 vector load store with length (left justified) clang portion
llvm-svn: 286994
2016-11-15 18:04:13 +00:00
Zaara Syeda 56fa12c5a3 test commmit
llvm-svn: 286977
2016-11-15 15:57:33 +00:00
Tony Jiang 6a49aad177 [PowerPC] Implement BE VSX load/store builtins - clang portion.
This patch implements all the overloads for vec_xl_be and vec_xst_be. On BE,
they behaves exactly the same with vec_xl and vec_xst, therefore they are
simply implemented by defining a matching macro. On LE, they are implemented
by defining new builtins and intrinsics. For int/float/long long/double, it
is just a load (lxvw4x/lxvd2x) or store(stxvw4x/stxvd2x). For char/char/short,
we also need some extra shuffling before or after call the builtins to get the
desired BE order. For int128, simply call vec_xl or vec_xst.

llvm-svn: 286971
2016-11-15 14:30:56 +00:00
Sean Fertile a9548937d6 [PPC] altivec.h functions for converting half precision to single precision.
Adds 2 vector functions for converting from a vector of unsigned short to a
vector of float. One converts the low 4 halfwords and one converts the high
4 halfwords.

Differential Revision: https://reviews.llvm.org/D26534

llvm-svn: 286863
2016-11-14 18:47:15 +00:00
Sean Fertile 193430fe51 [PPC] add extract sig/exp test data class for vec float and vec double.
Add vector extract exponent/significand functions to altivec.h, as well as
 functions (and related constants) to test the data class of vector float
 and vector double.

 Differential Revision: https://reviews.llvm.org/D26271

llvm-svn: 286830
2016-11-14 14:43:27 +00:00
Craig Topper 5e0709d60b [AVX-512] Replace masked dword and qword variable shift builtins with unmasked builtins and a select.
This is part of a set of changes to allow InstCombine in the backend to optimize variable shifts without having to know about masking.

llvm-svn: 286757
2016-11-13 07:26:34 +00:00
Craig Topper d7e5b21914 [X86] Remove extra escaped new lines in intrinsic headers left over from an earlier conversion away from a macro. NFC
llvm-svn: 286756
2016-11-13 07:26:31 +00:00
Craig Topper 298aa12b63 [AVX-512] Add returns to shift intrinsics that converted from macros in r286714.
llvm-svn: 286738
2016-11-13 00:35:01 +00:00
Craig Topper 2c8f49e67b [AVX-512] Use scalar vfmsub/vfnmsub mask3 intrinsics instead of inverting the mask argument of a vfmadd intrinsic.
Summary: Inverting the mask argument does not reflect the intended semantics of the intrinsic.

Reviewers: igorb, delena

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D26019

llvm-svn: 286733
2016-11-12 23:24:34 +00:00
Craig Topper 1a44193afd [AVX-512] Convert the rest of the masked shift by immediate and by single element builtins over to the newly added unmasked builtins and a select.
This should also fix PR30691 since the new builtins are handled like the legacy builtins in the backend.

llvm-svn: 286714
2016-11-12 07:16:59 +00:00
Nemanja Ivanovic 4de0011b5c [PowerPC] Implement remaining permute builtins in altivec.h - Clang portion
This patch corresponds to review:
https://reviews.llvm.org/D26479

It adds the remaining vector permute/rotate builtins to altivec.h.

llvm-svn: 286650
2016-11-11 22:34:44 +00:00
Nemanja Ivanovic 4079fc8188 [PowerPC] Add vector conversion builtins to altivec.h - clang portion
This patch corresponds to review:
https://reviews.llvm.org/D26308

It adds a number of vector type conversion builtins to altivec.h.

llvm-svn: 286627
2016-11-11 19:56:17 +00:00
Tony Jiang 7723f97d6a [PowerPC] Implement plain VSX load/store builtins.
Implement all the different 24 overloads for vec_xl and vec_xst.

llvm-svn: 286455
2016-11-10 14:39:56 +00:00
Ekaterina Romanova 64adc38e51 Doxygen comments for avxintrin.h.
Added doxygen comments to avxintrin.h's intrinsics. As of now, around 75% of the
intrinsics in this file are documented here. The patches for the other 25% will be se
nt out later.

Removed extra spaces in emmitrin.h.

Note: The doxygen comments are automatically generated based on Sony's intrinsics document.

I got an OK from Eric Christopher to commit doxygen comments without prior code
review upstream.

llvm-svn: 286336
2016-11-09 03:58:30 +00:00
Ayman Musa e60a41ca28 [X86][AVX512][Clang] Add support for mask_{move|store|load}_s{s/d} and int2mask/mask2int intrinsics.
Differential Revision: https://reviews.llvm.org/D26021

llvm-svn: 286229
2016-11-08 12:00:30 +00:00
Tony Jiang c6ddd7221c [PowerPC] Implement remaining vector comparison builtins.
vector bool char vec_cmpeq (vector bool char, vector bool char);
vector bool int vec_cmpeq (vector bool int, vector bool int);
vector bool long long vec_cmpeq (vector bool long long, vector bool long lon
vector bool short vec_cmpeq (vector bool short, vector bool short);

llvm-svn: 286205
2016-11-08 04:15:45 +00:00
Yaxun Liu 7d07ae7c85 [OpenCL] Mark group functions as convergent in opencl-c.h
Certain OpenCL builtin functions are supposed to be executed by all threads in a work group or sub group. Such functions should not be made divergent during transformation. It makes sense to mark them with convergent attribute.

The adding of convergent attribute is based on Ettore Speziale's work and the original proposal and patch can be found at https://www.mail-archive.com/cfe-commits@lists.llvm.org/msg22271.html.

Differential Revision: https://reviews.llvm.org/D25343

llvm-svn: 285725
2016-11-01 18:45:32 +00:00
Nemanja Ivanovic 05ce4ca0dd [PowerPC] Implement vector shift builtins - clang portion
This patch corresponds to review https://reviews.llvm.org/D26092.
Committing on behalf of Tony Jiang.

llvm-svn: 285694
2016-11-01 14:46:20 +00:00
Nemanja Ivanovic 251f6dd93d [PPC] Add vec_absd functions to altivec.h
This patch corresponds to review https://reviews.llvm.org/D26073.
Committing on behalf of Sean Fertile.

llvm-svn: 285679
2016-11-01 08:39:56 +00:00
Craig Topper 08bf53ffda [AVX-512] Remove masked vector insert builtins and replace with native shufflevectors and selects.
Unfortunately, the backend currently doesn't fold masks into the instructions correctly when they come from these shufflevectors. I'll work on that in a future commit.

llvm-svn: 285667
2016-11-01 05:47:56 +00:00
Craig Topper 350729627a [AVX-512] Use selectd instead of selectps for _mm256_mask_extracti32x4_epi32.
llvm-svn: 285545
2016-10-31 05:49:11 +00:00
Craig Topper 93ffabd28d [AVX-512] Remove masked vector extract builtins and replace with native shufflevectors and selects.
Unfortunately, the backend currently doesn't fold masks into the instructions correctly when they come from these shufflevectors. I'll work on that in a future commit.

llvm-svn: 285540
2016-10-31 04:30:56 +00:00
Craig Topper 66b2fd1209 [AVX-512] Remove many of the masked 128/256-bit shift builtins and replace them with unmasked builtins and selects.
llvm-svn: 285539
2016-10-31 04:30:51 +00:00
Michael Zuckerman d343697f1e Fixing "type" issue for (epi32)
and replaceing hardcoded inf with clang builtin inf "__builtin_inff()" for float ({max|min}_{pd|ps})

llvm-svn: 285519
2016-10-30 14:54:05 +00:00
Craig Topper 312ff9d19d [AVX-512] Remove masked 128/256-bit builtins for vpmaddwd and vpmaddubsw. Replace with unmasked builtins and select.
llvm-svn: 285516
2016-10-30 07:11:34 +00:00
Craig Topper 4caf76bee2 [AVX-512] Remove 128/256-bit masked pmulhrsw/pmulhuw/pmulhw builtins and use unmasked builtins and select instead.
llvm-svn: 285505
2016-10-29 19:02:14 +00:00
Craig Topper 2eadf1b67e [AVX-512] Remove masked 128/256-bit sqrt builtins and replace them with unmasked builtins and a select.
llvm-svn: 285504
2016-10-29 19:02:10 +00:00
Craig Topper 09e94007be [AVX-512] Remove masked 128/256-bit pmuludq/pmuldq builtins and replace them with unmasked builtins and a select.
llvm-svn: 285503
2016-10-29 19:02:07 +00:00
Craig Topper 160ca8420d [AVX-512] Remove masked 128/256-bit floating point max/min builtins. Use unmasked builtins with select instead.
llvm-svn: 285502
2016-10-29 19:02:03 +00:00
Michael Zuckerman 25eb420233 [X86][AVX512][Clang][Intrinsics][reduce] Adding missing reduce (max|min) intrinsics to Clang .
After LGTM and Check-all 

Vector-reduction arithmetic accepts vectors as inputs and produces 
scalars as outputs.This class of vector operation forms the basis 
of many scientific computations. In vector-reduction arithmetic, 
the evaluation off is independent of the order of the input elements of V.

Reviewer: 1. craig.topper 
          2. igorb

Differential Revision: https://reviews.llvm.org/D25988

llvm-svn: 285493
2016-10-29 10:29:20 +00:00
Nemanja Ivanovic 931bc548e6 [PPC] add float and double overloads for vec_orc and vec_nand in altivec.h
This patch corresponds to review https://reviews.llvm.org/D25950.
Committing on behalf of Sean Fertile.

llvm-svn: 285439
2016-10-28 20:04:53 +00:00
Nemanja Ivanovic 4f69f924df Implement vector count leading/trailing bytes with zero lsb and vector parity
builtins - clang portion

This patch corresponds to review: https://reviews.llvm.org/D26002
Committing on behalf of Zaara Syeda.

llvm-svn: 285436
2016-10-28 19:49:03 +00:00
Michael Zuckerman edd99eb07a 1. Fixing small types issue (PD|PS) (reduce) .
2. Cosmetic changes

llvm-svn: 285405
2016-10-28 15:16:03 +00:00
Anastasia Stulova 7c30533362 [OpenCL] Diagnose variadic arguments
OpenCL disallows using variadic arguments (s6.9.e and s6.12.5 OpenCL v2.0)
apart from some exceptions:
- printf
- enqueue_kernel

This change adds error diagnostic for variadic functions but accepts printf
and any compiler internal function (which should cover __enqueue_kernel_XXX cases).

It also unifies diagnostic with block prototype and adds missing uncaught cases for blocks.

llvm-svn: 285395
2016-10-28 12:59:39 +00:00
Nemanja Ivanovic 09dd423a7d [PPC] add vector byte reverse functions to altivec.h
This patch corresponds to review https://reviews.llvm.org/D25915.
Committing on behalf of Sean Fertile.

llvm-svn: 285268
2016-10-27 06:23:57 +00:00
Justin Lebar ebeeab87a1 [CUDA] Move device placement new definitions into a wrapper header.
Previously, these were always included -- after this change, you have to
 #include <new>, which is consistent with how things ought to work.

llvm-svn: 285251
2016-10-26 22:13:26 +00:00
Justin Lebar 6f5ec7ee88 [CUDA] Switch cuda_wrappers/complex to use a proper include guard instead of #pragma once.
This is consistent with the rest of our internal headers.

llvm-svn: 285250
2016-10-26 22:13:20 +00:00
Nemanja Ivanovic 3de0a385c9 [PowerPC] Implement vector_insert_exp builtins - clang portion
This patch corresponds to review https://reviews.llvm.org/D25956.
Committing on behalf of Zaara Syeda.

llvm-svn: 285229
2016-10-26 19:27:11 +00:00