3434575704
(or (and (shl A, #shamt), mask), B) => ARMbfi B, A, ~mask where lsb(mask) == #shamt. rdar://8752056
...
llvm-svn: 121606
2010-12-11 04:11:38 +00:00
92da705261
Add named timer groups for the different stages of register allocation.
...
llvm-svn: 121604
2010-12-11 00:19:56 +00:00
8de03d222f
Move MRI into RegAllocBase. Clean up debug output a bit.
...
llvm-svn: 121599
2010-12-10 23:49:00 +00:00
aecdd871da
Add FIXME
...
llvm-svn: 121598
2010-12-10 23:41:10 +00:00
bb8610635f
Remove extraneous close parenthesis.
...
Fix build breakage.
llvm-svn: 121596
2010-12-10 23:14:35 +00:00
07a95f8f06
Move variable that's unused in an NDEBUG build inside the DEBUG() macro, fixing
...
lib/CodeGen/RegAllocGreedy.cpp:233: error: unused variable 'TRC' [-Wunused-variable]
llvm-svn: 121594
2010-12-10 23:05:10 +00:00
235c276442
Attempt to get Thumb2 branch fixups working properly.
...
llvm-svn: 121593
2010-12-10 23:02:28 +00:00
adecb5e82c
Force the greedy register allocator to always use the inline spiller.
...
Soon, RegAllocGreedy will start splitting live ranges, and then deferred
spilling won't work anyway.
llvm-svn: 121591
2010-12-10 22:54:44 +00:00
276445f3b8
Rip out live range splitting support from the inline spiller.
...
The spiller should only spill. The register allocator will drive live range
splitting, it has the needed information about register pressure and
interferences.
llvm-svn: 121590
2010-12-10 22:54:40 +00:00
7cdd232895
Fix merge error in my last fix to Thumb2 vldr fixups.
...
llvm-svn: 121588
2010-12-10 22:53:48 +00:00
4743d75640
Fixups for Thumb2 vldr's need to have the effective PC aligned as well.
...
llvm-svn: 121587
2010-12-10 22:46:47 +00:00
006ab13b59
The MCFixupKindInfo table needs to be in the order that the enums were
...
declared. Add a note specifying this and spruce up the list a bit.
llvm-svn: 121586
2010-12-10 22:37:19 +00:00
b538a22762
Provide the necessary post-encoder hook for Thumb2 encodings of VMOV and friends.
...
llvm-svn: 121585
2010-12-10 22:32:08 +00:00
4d7432ebf1
Use AllocationOrder in RegAllocGreedy, fix a bug in the hint calculation.
...
llvm-svn: 121584
2010-12-10 22:21:05 +00:00
9375d27460
Add float patterns for Neon vld1-lane/dup and vst1-lane operations.
...
llvm-svn: 121583
2010-12-10 22:13:32 +00:00
e1d3322111
Remove unused arguments.
...
llvm-svn: 121582
2010-12-10 22:13:24 +00:00
b0fa127f60
Fix encoding of Thumb1 LDRB and STRB.
...
llvm-svn: 121581
2010-12-10 22:11:13 +00:00
c4a0c29edb
Trailing whitespace.
...
llvm-svn: 121580
2010-12-10 21:57:34 +00:00
68cb7e3552
Fix Thumb2 encodings of STREX and LDREX.
...
llvm-svn: 121579
2010-12-10 21:52:38 +00:00
39de62348f
Revert r121520, which may have introduced miscompilations.
...
llvm-svn: 121573
2010-12-10 21:48:28 +00:00
fc17b5be78
Correct encoding of rotation immediate for Thumb2 instructions. rdar://8755999
...
llvm-svn: 121525
2010-12-10 21:24:18 +00:00
e69f724935
Fix encoding of 'U' bit for Thumb2 STRD/LDRD instructions. rdar://8755726
...
llvm-svn: 121524
2010-12-10 21:05:07 +00:00
e991a6ee5a
More trivial cleanup. No need to define the EncoderMethod property type. Can
...
just assign to it.
llvm-svn: 121523
2010-12-10 20:53:44 +00:00
95bd6b7b62
Tidy up.
...
llvm-svn: 121522
2010-12-10 20:51:35 +00:00
c4669edf2c
Trailing whitespace.
...
llvm-svn: 121521
2010-12-10 20:47:29 +00:00
041f74e762
Implement PartialAlias checking in BasicAA.
...
llvm-svn: 121520
2010-12-10 20:47:03 +00:00
1c6196228a
Fix miscompilation caused by trivial logic error in the reassignVReg()
...
interference check.
llvm-svn: 121519
2010-12-10 20:45:04 +00:00
704e7c2332
Minimally update this code to handle PartialAlias.
...
llvm-svn: 121518
2010-12-10 20:14:49 +00:00
201acdb6db
Use PartialAlias to do better noalias lint checking.
...
llvm-svn: 121514
2010-12-10 20:04:06 +00:00
4431e31df0
Teach AliasAnalysisCounter about PartialAlias.
...
llvm-svn: 121513
2010-12-10 19:53:05 +00:00
105d60a5ef
Teach AliasAnalysisEvaluator about PartialAlias.
...
llvm-svn: 121512
2010-12-10 19:52:40 +00:00
fb0a3754f5
Update this code to handle PartialAlias as MayAlias.
...
llvm-svn: 121508
2010-12-10 19:40:47 +00:00
d29b38c893
Fix some invalid alignments for Neon vld-dup and vld/st-lane instructions.
...
Alignments smaller than the total size of the memory being loaded or stored,
unless the alignment is 8 bytes, are not allowed. Add tests for this, too.
llvm-svn: 121506
2010-12-10 19:37:42 +00:00
bdb7ed16c1
Teach isCSRestore() that ARM/Thumb2 functions will use post-modify LDR
...
instructions to restore a single register rather than an LDM instruction.
rdar://8754999
llvm-svn: 121498
2010-12-10 18:41:15 +00:00
0c67e01e5f
Add an AllocationOrder class that can iterate over the allocatable physical
...
registers for a given virtual register.
Reserved registers are filtered from the allocation order, and any valid hint is
returned as the first suggestion.
For target dependent hints, a number of arcane target hooks are invoked.
llvm-svn: 121497
2010-12-10 18:36:02 +00:00
e119da1146
Thumb unconditional branch binary encoding. rdar://8754994
...
llvm-svn: 121496
2010-12-10 18:21:33 +00:00
78485ad65e
Thumb conditional branch binary encodings. rdar://8745367
...
llvm-svn: 121493
2010-12-10 17:13:40 +00:00
0a017a6db2
Fixed version of 121434 with no new memory leaks.
...
llvm-svn: 121471
2010-12-10 07:39:47 +00:00
7bfb872d3d
Mach-O: Tweak field name.
...
llvm-svn: 121465
2010-12-10 06:19:39 +00:00
c837077903
Fix cmake build.
...
llvm-svn: 121462
2010-12-10 04:28:37 +00:00
a945a34c73
Revert my previous patch to make the valgrind bots happy.
...
llvm-svn: 121461
2010-12-10 04:01:09 +00:00
99db9f2f70
lib/Target/CMakeLists.txt: Add missing lib/Target/TargetAsmInfo.cpp, following up to r121434.
...
llvm-svn: 121454
2010-12-10 02:15:24 +00:00
c92136ffb6
Fix the leak from r121401 of the Operands erased in the list but not deleted.
...
llvm-svn: 121450
2010-12-10 01:41:56 +00:00
a98b5419fa
Add some missing predicates.
...
llvm-svn: 121445
2010-12-10 00:54:26 +00:00
8b08f5232b
Formalize the notion that AVX and SSE are non-overlapping extensions from the compiler's point of view. Per email discussion, we either want to always use VEX-prefixed instructions or never use them, and are taking "HasAVX" to mean "Always use VEX". Passing -mattr=-avx,+sse42 should serve to restore legacy SSE support when desirable.
...
llvm-svn: 121439
2010-12-10 00:26:57 +00:00
56eb741237
Initial support for the cfi directives. This is just enough to get
...
f:
.cfi_startproc
nop
.cfi_endproc
assembled (on ELF).
llvm-svn: 121434
2010-12-09 23:48:29 +00:00
d66e65df03
Use const references.
...
llvm-svn: 121426
2010-12-09 23:08:35 +00:00
0c4838bab7
Thumb ldr reg+imm offsets were encoded incorrectly. The scaling factor of the
...
t_addrmode_s# address modes is used for ASM printing, not for encoding.
<rdar://problem/8745375>
llvm-svn: 121417
2010-12-09 21:49:07 +00:00
073901c836
Add support for AVX to materialize +0.0 when doing scalar FP.
...
llvm-svn: 121415
2010-12-09 21:43:51 +00:00
cb4d8f2e74
Use the new IsAligned fixup flag to improve fixup encodings for Thumb2 branches. This is still not perfect,
...
but it gets many more of them correct than it did previously.
llvm-svn: 121414
2010-12-09 21:34:47 +00:00
d2ea97cbef
Initial support for nested CALLSEQ_START/CALLSEQ_END constructs in LegalizeDAG.
...
Necessary for byval support on ARM. Radar 7662569.
llvm-svn: 121412
2010-12-09 21:25:20 +00:00
3413807913
Remember to filter out reserved rergisters from the allocation order.
...
llvm-svn: 121411
2010-12-09 21:20:46 +00:00
4c2fadbc18
Add a forgotten initializer for CheckedFirstInterference.
...
llvm-svn: 121410
2010-12-09 21:20:44 +00:00
3ef19d9d48
Fix an issue in some Thumb fixups, where the effective PC address needs to be 4-byte aligned when calculating
...
the offset. Add a new fixup flag to represent this, and use it for the one fixups that I have a testcase for needing
this. It's quite likely that the other Thumb fixups will need this too, and to have their fixup encoding logic
adjusted accordingly.
llvm-svn: 121408
2010-12-09 20:27:52 +00:00
68b27eb9d1
Rename CB/CBZ specific fixup accordingly.
...
llvm-svn: 121404
2010-12-09 19:50:12 +00:00
3ebe3defe3
Add assert to catch an attempt to emit .byte 256
...
llvm-svn: 121402
2010-12-09 19:26:21 +00:00
3164a346e6
Add support for parsing ARM arithmetic instructions that update or don't update
...
the condition codes. Where the ones that do have an 's' suffix and the ones
that don't don't have the suffix. The trick is if MatchInstructionImpl() fails
we try again after adding a CCOut operand with the correct value and removing
the 's' if present. Four simple test cases added for now, lots more to come.
llvm-svn: 121401
2010-12-09 19:19:43 +00:00
62b68112da
Rename the encoder method for t_cbtarget to match.
...
llvm-svn: 121399
2010-12-09 19:04:53 +00:00
529c7e8d1f
Thumb needs a few different encoding schemes for branch targets. Rename
...
t_brtarget to be more specific.
llvm-svn: 121398
2010-12-09 19:01:46 +00:00
5fccad84a3
ARM stm/ldm instructions require more than one register in the register list.
...
Otherwise, a plain str/ldr should be used instead. Make sure we account for
that in prologue/epilogue code generation.
rdar://8745460
llvm-svn: 121391
2010-12-09 18:31:13 +00:00
ccef09888c
Added register reassignment prototype to RAGreedy. It's a simple
...
heuristic to reshuffle register assignments when we can't find an
available reg.
llvm-svn: 121388
2010-12-09 18:15:21 +00:00
ae7de7e2f9
Support/Windows/PathV2: Fix header comment.
...
llvm-svn: 121383
2010-12-09 17:37:42 +00:00
db97c0b520
Fix whitespace.
...
llvm-svn: 121382
2010-12-09 17:37:32 +00:00
751e9aafa9
Support: Move c_str from SmallVector back to SmallString and add a free standing
...
templated c_str in Windows.h to replace it.
llvm-svn: 121381
2010-12-09 17:37:18 +00:00
730f51ad96
Support/FileSystem: Change file_status predicate functions that cannot fail to
...
return their result instead of an error_code. Also add some missing predicate
functions.
llvm-svn: 121380
2010-12-09 17:37:02 +00:00
7b6fef82d4
Support/MemoryBuffer: Replace all uses of std::string *ErrMsg with error_code &ec. And fix clients.
...
llvm-svn: 121379
2010-12-09 17:36:48 +00:00
d47180e45e
Add ROTR and ROTRV mips32 instructions. Patch by Akira Hatanaka
...
llvm-svn: 121377
2010-12-09 17:32:30 +00:00
fde21cfa64
Fix delay slot filler for non mips1 targets. Patch by Akira Hatanaka
...
llvm-svn: 121376
2010-12-09 17:31:11 +00:00
b5e52df6dd
Dont' feed ILA two inputs - it takes just one.
...
llvm-svn: 121372
2010-12-09 16:17:31 +00:00
23f8671e05
tidy up.
...
llvm-svn: 121371
2010-12-09 16:15:41 +00:00
c0b669f5c0
80 columns.
...
llvm-svn: 121370
2010-12-09 16:14:46 +00:00
bc4457e317
enhance memcpyopt to zap memcpy's that have the same src/dst.
...
llvm-svn: 121362
2010-12-09 07:45:45 +00:00
fd51c52ef6
fix PR8753, eliminating a case where we'd infinitely make a
...
substitution because it doesn't actually change the IR. Patch by
Jakub Staszak!
llvm-svn: 121361
2010-12-09 07:39:50 +00:00
a8aaaee379
Rewrite the darwin tlv support to use a chain and return to copying
...
the output to the correct register. Fixes a hidden problem uncovered
by the last patch where we'd try to DAG combine our MVT::Other node
oddly.
llvm-svn: 121358
2010-12-09 06:25:53 +00:00
c7ed4dc932
Take the first step towards making LVI non-recursive: get rid of the LVIQuery abstraction.
...
llvm-svn: 121357
2010-12-09 06:14:58 +00:00
d9e8eac235
80-col fixups.
...
llvm-svn: 121356
2010-12-09 04:48:06 +00:00
4c196543f5
Reworking the stack layout generated by the MBlaze backend.
...
llvm-svn: 121355
2010-12-09 03:42:04 +00:00
817b7cd7b8
Fix encoding of the immediate operands on post-indexed LDR and friends.
...
llvm-svn: 121354
2010-12-09 02:56:12 +00:00
a32986e899
Really check that the bits that will become zero are actually already zero
...
before eliminating the operation that zeros them. This fixes rdar://8739316.
llvm-svn: 121353
2010-12-09 02:52:17 +00:00
2a2e65c452
Fix up some comments.
...
llvm-svn: 121351
2010-12-09 01:57:45 +00:00
3e6ee1db3e
Fix Thumb2 fixups for ldr.
...
llvm-svn: 121350
2010-12-09 01:51:07 +00:00
6233189713
Add a textual message to the assert.
...
llvm-svn: 121349
2010-12-09 01:23:51 +00:00
ed40288eb4
Add a sanity check assert() for t2ADD/SUBrSPi instructions that they really are
...
referencing the stack pointer as they say they are.
llvm-svn: 121347
2010-12-09 01:22:19 +00:00
bd30afe4c2
When using multiple instructions to reference a frame index, make sure to
...
update the opcode when necessary as well as the source register.
llvm-svn: 121346
2010-12-09 01:22:13 +00:00
0b2630c500
The add/sub SP instructions are really pseudos. The assembler should ignore
...
them.
llvm-svn: 121345
2010-12-09 01:21:27 +00:00
e6dc3c899e
IntervalMap iterators are heavyweight, so avoid copying them around and use
...
references instead.
Similarly, IntervalMap::begin() is almost as expensive as find(), so use find(x)
instead of begin().advanceTo(x);
This makes RegAllocBasic run another 5% faster.
llvm-svn: 121344
2010-12-09 01:06:52 +00:00
eb369f84ec
Remove unused variables
...
llvm-svn: 121343
2010-12-09 01:04:43 +00:00
14e41271b7
Fix typo in Thumb2 branch fixup.
...
llvm-svn: 121342
2010-12-09 01:02:09 +00:00
8783074091
Stop confusing people, it's not really a chain, or a tumor.
...
llvm-svn: 121340
2010-12-09 00:57:19 +00:00
f75412dec7
Remove extraneous semicolon.
...
llvm-svn: 121338
2010-12-09 00:51:54 +00:00
c4d333f02a
Attempt to make the bit-twiddling readable resulted in the binary value being
...
overwritten.
llvm-svn: 121337
2010-12-09 00:44:33 +00:00
3392bfc8f3
The BLX instruction is encoded differently than the BL, because why not? In
...
particular, the immediate has 20-bits of value instead of 21. And bit 0 is '0'
always. Going through the BL fixup encoding was trashing the "bit 0 is '0'"
invariant.
Attempt to get the encoding at slightly more correct with this.
llvm-svn: 121336
2010-12-09 00:39:08 +00:00
d84970ae8b
Remove extraneous copy from DAG conversion for darwin tls. This was
...
popping up at O0 when it wasn't folded and the fast allocator would
complain.
llvm-svn: 121330
2010-12-09 00:27:58 +00:00
302d5fd0d8
Fix Thumb2 BCC encoding and fixups.
...
llvm-svn: 121329
2010-12-09 00:27:41 +00:00
c2dc95ae00
Add rsp to the uses for the same reason as 32-bit.
...
llvm-svn: 121328
2010-12-09 00:26:41 +00:00
c26da9005b
DW_FORM_data1 may not provide sufficient room for vtable index, use _udata instead.
...
This fixes radar 8730409.
llvm-svn: 121323
2010-12-09 00:10:40 +00:00
87bc591fc5
Allow a slash, '/', as a prefix separator for X86. rdar://8741045
...
llvm-svn: 121320
2010-12-08 23:57:59 +00:00
8c5f0c3115
Properly deal with empty intervals when checking for interference.
...
llvm-svn: 121319
2010-12-08 23:51:35 +00:00
e296ee830a
Style nit and whitespace cleanup
...
llvm-svn: 121317
2010-12-08 23:35:25 +00:00
9672c9a793
Clean up the add/sub w/ SP source reg instructions in Thumb2 a bit. Add a FIXME
...
for more thorough cleanup.
llvm-svn: 121315
2010-12-08 23:30:19 +00:00
a5c666654e
Fix T2TwoRegImm and use it for t2ADDrSPi12 and friends.
...
llvm-svn: 121314
2010-12-08 23:24:29 +00:00
ba8b6d9a1c
Removed dead comment.
...
llvm-svn: 121313
2010-12-08 23:19:44 +00:00
c79c5f6e8c
ARM/MC/ELF TPsoft is now a proper pseudo inst.
...
Added test to check bl __aeabi_read_tp gets emitted properly for ELF/ASM
as well as ELF/OBJ (including fixup)
Also added support for ELF::R_ARM_TLS_IE32
llvm-svn: 121312
2010-12-08 23:14:44 +00:00
e829c674bb
T2TwoRegImm isn't right for t2SUBrSPi12. Use T2I instead.
...
llvm-svn: 121311
2010-12-08 23:13:01 +00:00
fd0e4c0fe9
Add operand encoding for Thumb2 subw SP + imm. rdar://8745434
...
llvm-svn: 121310
2010-12-08 23:12:09 +00:00
51937f9963
Add operand encoding for Thumb2 addw Rn + imm. rdar://8745434
...
llvm-svn: 121309
2010-12-08 23:04:16 +00:00
a7d6aa902a
Support the "target" encodings for the CB[N]Z instructions.
...
llvm-svn: 121308
2010-12-08 23:01:43 +00:00
7f3e9150d0
Fix an obvious cut-n-paste error.
...
llvm-svn: 121307
2010-12-08 23:01:18 +00:00
eaa650a945
Implement very primitive hinting support in RegAllocGreedy.
...
The hint is simply tried first and then forgotten if it couldn't be allocated
immediately.
llvm-svn: 121306
2010-12-08 22:57:16 +00:00
663e4ce357
Add operand encoding for Thumb2 addw SP + imm. rdar://8745434
...
llvm-svn: 121305
2010-12-08 22:50:19 +00:00
47e3cc54f8
Parameterize opcode encoding bits for Thumb2 extended precision integer
...
multiply instructions.
llvm-svn: 121301
2010-12-08 22:38:41 +00:00
c3b0b10708
Fix operand encoding for Thumb2 extended precision multiplies. rdar://8745555
...
llvm-svn: 121297
2010-12-08 22:29:28 +00:00
e0df786c98
Store (priority,regnum) pairs in the priority queue instead of providing an
...
abstract priority queue interface in subclasses that want to override the
priority calculations.
Subclasses must provide a getPriority() implementation instead.
This approach requires less code as long as priorities are expressable as simple
floats, and it avoids the dangers of defining potentially expensive priority
comparison functions.
It also should speed up priority_queue operations since they no longer have to
chase pointers when comparing registers. This is not measurable, though.
Preferably, we shouldn't use floats to guide code generation. The use of floats
here is derived from the use of floats for spill weights. Spill weights have a
dynamic range that doesn't lend itself easily to a fixpoint implementation.
When someone invents a stable spill weight representation, it can be reused for
allocation priorities.
llvm-svn: 121294
2010-12-08 22:22:41 +00:00
1b93e7b4ed
Reword comment slightly.
...
llvm-svn: 121293
2010-12-08 22:21:42 +00:00
572e56dfb2
Simplify T2 operand assignment notation a bit. No need to specify a bit range
...
for the source field when it's the whole thing that's being referenced.
llvm-svn: 121291
2010-12-08 22:10:43 +00:00
8817135cb9
Use type's file info while describing inheritance relationship.
...
llvm-svn: 121289
2010-12-08 21:46:37 +00:00
66a8bf57ea
Fix comment.
...
llvm-svn: 121285
2010-12-08 21:35:09 +00:00
310916a22d
Trim includes.
...
llvm-svn: 121283
2010-12-08 21:12:00 +00:00
b68c6231e9
Add support to create debug info for functions and methods.
...
llvm-svn: 121281
2010-12-08 20:42:44 +00:00
3c68561453
Tweak ARM fixup value adjustments for Thumb to better handle the half-word
...
ordering of thumb mode.
llvm-svn: 121280
2010-12-08 20:32:07 +00:00
81c3c87717
Add support to create class type.
...
llvm-svn: 121279
2010-12-08 20:18:20 +00:00
00067fb147
Generalize PostRAHazardRecognizer so it can be used in any pass for
...
both forward and backward scheduling. Rename it to
ScoreboardHazardRecognizer (Scoreboard is one word). Remove integer
division from the scoreboard's critical path.
llvm-svn: 121274
2010-12-08 20:04:29 +00:00
dae32fd206
Improve comment.
...
llvm-svn: 121272
2010-12-08 19:31:11 +00:00
d18f98b969
Add initializer.
...
llvm-svn: 121262
2010-12-08 15:36:45 +00:00
9d54ae6332
Add comments.
...
llvm-svn: 121238
2010-12-08 06:29:02 +00:00
b8812a1c15
Stub out RegAllocGreedy.
...
This new register allocator is initially identical to RegAllocBasic, but it will
receive all of the tricks that RegAllocBasic won't get.
RegAllocGreedy will eventually replace linear scan.
llvm-svn: 121234
2010-12-08 03:26:16 +00:00
8a6449c46e
Add support for loading from a constant pool.
...
llvm-svn: 121226
2010-12-08 01:57:09 +00:00
89ea4f27a8
Add support to create vector, array, enums etc...
...
llvm-svn: 121224
2010-12-08 01:50:15 +00:00
87055ed6f4
Let target asm backends see assembler flags as they go by. Use that to handle
...
thumb vs. arm mode differences in WriteNopData().
llvm-svn: 121219
2010-12-08 01:16:55 +00:00
5885e99405
Move RABasic::addMBBLiveIns to the base class, it is generally useful.
...
Minor optimization to the use of IntervalMap iterators. They are fairly
heavyweight, so prefer SI.valid() over SI != end().
llvm-svn: 121217
2010-12-08 01:06:06 +00:00
72ce453c73
Simplify the byte reordering logic slightly.
...
llvm-svn: 121216
2010-12-08 00:21:33 +00:00
0f7142d808
VLDR fixups need special handling under Thumb. While the encoding is the same,
...
the order of the bytes in the data stream is flipped around.
llvm-svn: 121215
2010-12-08 00:18:36 +00:00
dd261afdd9
Global variable does not need linkage name.
...
llvm-svn: 121212
2010-12-08 00:06:22 +00:00
63f83cd861
Add support to create local variable's debug info.
...
llvm-svn: 121211
2010-12-07 23:58:00 +00:00
6624f47272
Layout each section independently. With the testcase in PR8711:
...
before:
4 assembler - Number of assembler layout and relaxation steps
78563 assembler - Number of emitted assembler fragments
8693904 assembler - Number of emitted object file bytes
271223 assembler - Number of evaluated fixups
330771677 assembler - Number of fragment layouts
5958 assembler - Number of relaxed instructions
2508361 mcexpr - Number of MCExpr evaluations
real 0m26.123s
user 0m25.694s
sys 0m0.388s
after:
4 assembler - Number of assembler layout and relaxation steps
78563 assembler - Number of emitted assembler fragments
8693904 assembler - Number of emitted object file bytes
271223 assembler - Number of evaluated fixups
231507 assembler - Number of fragment layouts
5958 assembler - Number of relaxed instructions
2508361 mcexpr - Number of MCExpr evaluations
real 0m2.500s
user 0m2.113s
sys 0m0.273s
And yes, the outputs are identical :-)
llvm-svn: 121207
2010-12-07 23:32:26 +00:00
56de7c2773
Fix a warning about a variable which is only used in an assertion.
...
llvm-svn: 121206
2010-12-07 23:26:21 +00:00
746660fc7b
Add support to create variables, structs etc.. using DIBuilder.
...
This is still work in progress.
llvm-svn: 121205
2010-12-07 23:25:47 +00:00
db357d71f1
Switch LiveIntervalUnion from std::set to IntervalMap.
...
This speeds up RegAllocBasic by 20%, not counting releaseMemory which becomes
way faster.
llvm-svn: 121201
2010-12-07 23:18:47 +00:00
f09c44c7ab
Cleanup in the Darwin end. No functionality change.
...
llvm-svn: 121198
2010-12-07 23:11:00 +00:00
775ead3293
Fix a bad prologue / epilogue codegen bug where the compiler would emit illegal
...
vpush instructions to save / restore VFP / NEON registers like this:
vpush {d8,d10,d11}
vpop {d8,d10,d11}
vpush and vpop do not allow gaps in the register list.
rdar://8728956
llvm-svn: 121197
2010-12-07 23:08:38 +00:00
721724e643
A bit of cleanup: early exit ApplyFixup and cache the Fixup offset. No
...
functionality change.
llvm-svn: 121195
2010-12-07 23:05:20 +00:00
49bcd6ff85
Binary encoding for ARM tLDRspi and tSTRspi.
...
llvm-svn: 121186
2010-12-07 21:50:47 +00:00
cf096a431a
Fix Thumb2 encoding of the S bit.
...
llvm-svn: 121182
2010-12-07 20:50:15 +00:00
327cf8ee5f
Refactor the ARM CMPz* patterns to just use the normal CMP instructions when
...
possible. They were duplicates for everything exception the source pattern
before.
llvm-svn: 121179
2010-12-07 20:41:06 +00:00
de75ab9a09
Code clean up; no functionality change.
...
llvm-svn: 121176
2010-12-07 20:11:46 +00:00
c27c956966
Code clean up; no functionality change.
...
llvm-svn: 121172
2010-12-07 19:59:34 +00:00
f844b3b227
Remove the code from Function::dropAllReferences which replaced
...
uses of the function's blocks with undef. This code isn't needed,
because BasicBlock's destructor handles such uses. Also, undef isn't
correct, since blockaddresses may still be used for comparisons
with null.
llvm-svn: 121170
2010-12-07 19:56:51 +00:00
b9bfd0945a
Remove target specific node MipsISD::CMov, which is not used because all conditional moves are directly matched using tablegen patterns. If there's a need in the future, we can introduce it again
...
llvm-svn: 121164
2010-12-07 19:04:14 +00:00
f0c6e3780d
Match a pattern generated by a dag combiner opt where:
...
(select (load (load tga0)) (load tga1)) => (load (select (load tga0) tga1))
Thanks to Akira for pointing that.
llvm-svn: 121163
2010-12-07 19:00:20 +00:00
fb207c1cb9
Simplify assertion.
...
llvm-svn: 121162
2010-12-07 18:51:27 +00:00
8b5defbd5d
Support: Remove Alarm. It is unused (via local grep and google code search).
...
llvm-svn: 121160
2010-12-07 18:41:59 +00:00
a68282caa8
Support/PathV2: Remove const from bool return types.
...
llvm-svn: 121157
2010-12-07 18:12:07 +00:00
6e517d658e
Encode the literal field for tCMPzi instruction.
...
llvm-svn: 121153
2010-12-07 17:48:24 +00:00
e78d3b38de
Fix absolute recording of differences of symbols in two sections. Reduced from ctor_dtor_count-2.cpp.
...
llvm-svn: 121152
2010-12-07 17:12:32 +00:00
f616b218c8
Support/PathV2: Change most functions in the path namespace to return their work
...
via their return value instead of an out parameter.
llvm-svn: 121149
2010-12-07 17:04:04 +00:00
82ebae7631
build: Go back to dropping __eprintf reference when building with Clang, see
...
comment.
llvm-svn: 121146
2010-12-07 16:29:44 +00:00
cfa9a893df
Add parens to pacify gcc.
...
llvm-svn: 121142
2010-12-07 15:50:35 +00:00
d2f4b09e10
Remove some dead code from the jump threading pass.
...
The last uses of these functions were removed in r113852 when LazyValueInfo was permanently enabled and removed the need for them.
llvm-svn: 121133
2010-12-07 13:08:07 +00:00
583abbc4df
PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and
...
zextOrTrunc(), and APSInt methods extend(), extOrTrunc() and new method
trunc(), to be const and to return a new value instead of modifying the
object in place.
llvm-svn: 121120
2010-12-07 08:25:19 +00:00
10e1b56e2c
Don't leak the mutex when loading dynamic libraries.
...
llvm-svn: 121119
2010-12-07 07:56:20 +00:00
bdbe5a712d
Fix relocations with weak definitions.
...
llvm-svn: 121114
2010-12-07 05:57:28 +00:00
0d71c4f564
reapply r121100 with a tweak to constant fold ConstExprs with TargetData
...
(if available) as we go so that we get simple constantexprs not insane ones.
This fixes the failure of clang/test/CodeGenCXX/virtual-base-ctor.cpp
that the previous iteration of this patch had.
llvm-svn: 121111
2010-12-07 04:33:29 +00:00
bfea3c739d
Support/PathV2: Cleanup separator handling.
...
llvm-svn: 121110
2010-12-07 03:57:48 +00:00
1e090f0b8f
Support/PathV2: Remove the error_code return type from all functions in the path
...
namespace. None of them return anything except for success anyway. These will be
converted to returning their result soon.
llvm-svn: 121109
2010-12-07 03:57:37 +00:00
92903a3339
Support/PathV2: Move make_absolute from path to fs.
...
llvm-svn: 121108
2010-12-07 03:57:17 +00:00
2eabaae459
Fix pcrel relocations that cross sections.
...
llvm-svn: 121107
2010-12-07 03:50:14 +00:00
547cc6f0a5
lib/Target/X86/X86MCAsmInfo.cpp: [PR8741] On Win64, specify explicit PrivateGlobalPrefix as ".L".
...
Or, global symbols @Lxxxx might be treated as temporal symbol by MCSymbol.
llvm-svn: 121103
2010-12-07 02:43:45 +00:00
f10dcfb9fb
Temporarily revert r121100 as it's causing clang to fail
...
CodeGenCXX/virtual-base-ctor.cpp.
llvm-svn: 121102
2010-12-07 02:41:11 +00:00
287f4366c1
fix PR8710 - teach global opt that some constantexprs are too complex to
...
put in a global variable's initializer.
llvm-svn: 121100
2010-12-07 01:59:32 +00:00
436dae5cf3
Remove unused member.
...
llvm-svn: 121098
2010-12-07 01:32:45 +00:00
f27da4e578
Support/Unix/PathV2: Return the real error from realpath instead of any error
...
that close or unlink set.
llvm-svn: 121094
2010-12-07 01:23:39 +00:00
e5755beb47
Support/Unix/PathV2: Use 0770 instead of 0700 when creating a directory. Also use
...
the standard macros instead of octal notation.
llvm-svn: 121093
2010-12-07 01:23:29 +00:00
98c7a114de
Support/PathV2: Use SmallVector::clear instead of set_size.
...
llvm-svn: 121092
2010-12-07 01:23:19 +00:00
5529c57cfe
Support/PathV2: Clarify and correct documentation.
...
llvm-svn: 121091
2010-12-07 01:23:08 +00:00
20daa28344
Support/PathV2: Move current_path from path to fs and fix the Unix implementation.
...
Unix bug spotted by Dan Gohman.
llvm-svn: 121090
2010-12-07 01:22:31 +00:00
a2421ec705
Fix a crash reduced from gcc produced assembly.
...
llvm-svn: 121085
2010-12-07 01:09:54 +00:00
99ea8a3510
Second attempt at converting Thumb2's LDRpci, including updating the gazillion places that need to know about it.
...
llvm-svn: 121082
2010-12-07 00:45:21 +00:00
93e3cf0ebd
Sorry for such a large commit. The summary is that only MachO cares about the
...
actuall addresses in a .o file, so it is better to let the MachO writer compute
it.
This is good for two reasons. First, areas that shouldn't care about
addresses now don't have access to it. Second, the layout of each section
is independent. I should use this in a subsequent commit to speed it up.
Most of the patch is just removing the section address computation. The two
interesting parts are the change on how we handle padding in the end
of sections and how MachO can get the address of a-b when a and b are in
different sections.
Since now the expression evaluation normally doesn't know the section address,
it will think that a-b needs relocation and let the MachO writer know. Once
it has computed the section addresses, it calls back the expression evaluation
with the section addresses to resolve these expressions.
The remaining problem is the handling of padding. Currently it will create
a special alignment fragment at the end. Since that fragment doesn't update
the alignment of the section, it needs the real address to be computed.
Since now the layout will not compute a-b with a and b in different sections,
the only effect that the special alignment fragment has is update the
address size of the section. This can also be done by the MachO writer.
llvm-svn: 121076
2010-12-07 00:27:36 +00:00
9e1994698d
Add fixup for Thumb1 BL/BLX instructions.
...
llvm-svn: 121072
2010-12-06 23:57:07 +00:00
d9df6eaa9c
Implement jump threading of 'indirectbr' by keeping track of whether we're looking for ConstantInt*s or BlockAddress*s.
...
llvm-svn: 121066
2010-12-06 23:36:56 +00:00
bca5b25721
Undefined value in reg 0 may need a marker to identify end of source range.
...
This will be used to truncate live range of DBG_VALUE instruction by register allocator and friends.
llvm-svn: 121061
2010-12-06 22:48:22 +00:00
c24048a718
If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.
...
llvm-svn: 121059
2010-12-06 22:39:26 +00:00
1055f72b97
Use references to simplify the code a bit.
...
llvm-svn: 121050
2010-12-06 22:30:54 +00:00
dba03b050f
Adding bug fix that was suppose to be part of 121044.
...
patch contributed by Jack Whitham!
llvm-svn: 121049
2010-12-06 22:19:28 +00:00
8da34b6c35
Fixed reversed operands for IDIV and CMP instructions in MBlaze backend.
...
Use BRAD instead of BRD for indirect branches in MBlaze backend.
patch contributed by Jack Whitham!
llvm-svn: 121044
2010-12-06 22:06:49 +00:00
495c2bb9a6
Refactor ELFObjectWriter.
...
+ ARM/X86/MBlaze now share a common RecordRelocation
+ ARM/X86/MBlaze arch specific routines are limited to GetRelocType()
llvm-svn: 121043
2010-12-06 21:57:34 +00:00
7ff0ba41bd
replace a linear scan with a symtab lookup, reduce indentation.
...
No functionality change.
llvm-svn: 121042
2010-12-06 21:53:07 +00:00
e134b08daa
use getSymbolOffset.
...
llvm-svn: 121041
2010-12-06 21:51:55 +00:00
4dc53e37d9
Use a stronger predicate here, pointed out by Duncan
...
llvm-svn: 121040
2010-12-06 21:48:10 +00:00
ca335e38cf
add some DEBUG statements.
...
llvm-svn: 121038
2010-12-06 21:13:51 +00:00
6ce9b60811
Fix a 16-bit immediate value detection bug in the MBlaze delay slot filler.
...
Address more hazards in the MBlaze delay slot filler.
patch contributed by Jack Whitham!
llvm-svn: 121037
2010-12-06 21:11:01 +00:00
408344017e
Another use of getSymbolOffset.
...
llvm-svn: 121034
2010-12-06 19:55:05 +00:00
0f30fec0bd
Remove the instruction fragment to data fragment lowering since it was causing
...
freed data to be read. I will open a bug to track it being reenabled.
llvm-svn: 121028
2010-12-06 19:08:48 +00:00
c1ee8e35d2
Revert r121021, which broke the buildbots.
...
llvm-svn: 121026
2010-12-06 18:57:40 +00:00
67f13b19b5
Trailing whitespace.
...
llvm-svn: 121024
2010-12-06 18:47:44 +00:00
bb4a76fc95
Improve handling of Thumb2 PC-relative loads by converting LDRpci (and friends) to Pseudos.
...
llvm-svn: 121021
2010-12-06 18:35:51 +00:00
968c927201
Encode the register operand of ARM CondCode operands correctly. ARM::CPSR if
...
the instruction is predicated, reg0 otherwise.
llvm-svn: 121020
2010-12-06 18:30:57 +00:00
0bfb4d5043
The ARM AsmMatcher needs to know that the CCOut operand is a register value,
...
not an immediate. It stores either ARM::CPSR or reg0.
llvm-svn: 121018
2010-12-06 18:21:12 +00:00
44bbe36de6
Second try at making direct object emission produce the same results
...
as llc + llvm-mc. This time ELF is not changed and I tested that llvm-gcc
bootstrap on darwin10 using darwin9's assembler and linker.
llvm-svn: 121006
2010-12-06 17:27:56 +00:00
dee3062373
Revert previous two patches while I try to find out how to make both
...
linux and darwin assemblers happy :-(
llvm-svn: 121004
2010-12-06 15:35:15 +00:00
34a06a0802
Add an EmitAbsValue helper method and use it in cases where we want to be sure
...
that no relocations are used (on MochO).
Fixes llc producing different output from llc + llvm-mc.
llvm-svn: 121000
2010-12-06 14:53:14 +00:00
fb212de06d
Fix PR8735, a really terrible problem in the inliner's "alloca merging"
...
optimization.
Consider:
static void foo() {
A = alloca
...
}
static void bar() {
B = alloca
...
call foo();
}
void main() {
bar()
}
The inliner proceeds bottom up, but lets pretend it decides not to inline foo
into bar. When it gets to main, it inlines bar into main(), and says "hey, I
just inlined an alloca "B" into main, lets remember that. Then it keeps going
and finds that it now contains a call to foo. It decides to inline foo into
main, and says "hey, foo has an alloca A, and I have an alloca B from another
inlined call site, lets reuse it". The problem with this of course, is that
the lifetime of A and B are nested, not disjoint.
Unfortunately I can't create a reasonable testcase for this: the one in the
PR is both huge and extremely sensitive, because you minor tweaks end up
causing foo to get inlined into bar too early. We already have tests for the
basic alloca merging optimization and this does not break them.
llvm-svn: 120995
2010-12-06 07:52:42 +00:00
cd3af96a8f
improve comment
...
llvm-svn: 120994
2010-12-06 07:43:04 +00:00
5b6a865f2e
improve -debug output and comments a little.
...
llvm-svn: 120993
2010-12-06 07:38:40 +00:00
0d025b6b42
Support/Windows: Make MinGW happy.
...
llvm-svn: 120991
2010-12-06 06:02:07 +00:00
7ecd94cc0b
Support/FileSystem: Add directory_iterator implementation.
...
llvm-svn: 120989
2010-12-06 04:28:42 +00:00
95e4ac16a5
Support/PathV2: Fix append to not add a slash to empty or root paths.
...
llvm-svn: 120988
2010-12-06 04:28:23 +00:00
39c4621f42
Support/Windows: Add ScopedHandle and move some clients over to it.
...
llvm-svn: 120987
2010-12-06 04:28:13 +00:00
9f2af628a6
ptx: add shift instructions
...
llvm-svn: 120982
2010-12-06 04:00:03 +00:00
baf2f3b3eb
Remove the getAddress getter, initialize Ordinal in the constructor and use
...
that on the ELF writer to detect a section we created.
llvm-svn: 120981
2010-12-06 03:48:09 +00:00
46e40188f7
Simplify a bit.
...
llvm-svn: 120980
2010-12-06 03:36:43 +00:00
45790b82af
Use getSymbolOffset on the COFF writer.
...
llvm-svn: 120979
2010-12-06 03:24:04 +00:00
ac60adb38d
Don't use PadSectionToAlignment on windows.
...
llvm-svn: 120978
2010-12-06 03:03:44 +00:00
e7284c3671
Add a getSymbolOffset method and use it in the ELF writer.
...
llvm-svn: 120977
2010-12-06 02:57:26 +00:00
94fbdf3814
Fix PR8728, a miscompilation I recently introduced. When optimizing
...
memcpy's like:
memcpy(A, B)
memcpy(A, C)
we cannot delete the first memcpy as dead if A and C might be aliases.
If so, we actually get:
memcpy(A, B)
memcpy(A, A)
which is not correct to transform into:
memcpy(A, A)
This patch was heavily influenced by Jakub Staszak's patch in PR8728, thanks
Jakub!
llvm-svn: 120974
2010-12-06 01:48:06 +00:00
abd6d2742a
Eliminate unneeded #include's.
...
llvm-svn: 120971
2010-12-05 23:41:43 +00:00
70fbbf534b
ARM/CMakeLists.txt: Add missing MLxExpansionPass.cpp since r120960.
...
llvm-svn: 120966
2010-12-05 23:08:57 +00:00
12f4d615ab
Code clean up.
...
llvm-svn: 120965
2010-12-05 23:03:45 +00:00
b8a662f0d1
Remove an unused variable.
...
llvm-svn: 120964
2010-12-05 23:03:35 +00:00
c7223a3e37
Some cleanup before I start committing some incremental progress on
...
StrongPHIElimination.
llvm-svn: 120961
2010-12-05 22:34:08 +00:00
62c7b5bf76
Making use of VFP / NEON floating point multiply-accumulate / subtraction is
...
difficult on current ARM implementations for a few reasons.
1. Even though a single vmla has latency that is one cycle shorter than a pair
of vmul + vadd, a RAW hazard during the first (4? on Cortex-a8) can cause
additional pipeline stall. So it's frequently better to single codegen
vmul + vadd.
2. A vmla folowed by a vmul, vmadd, or vsub causes the second fp instruction to
stall for 4 cycles. We need to schedule them apart.
3. A vmla followed vmla is a special case. Obvious issuing back to back RAW
vmla + vmla is very bad. But this isn't ideal either:
vmul
vadd
vmla
Instead, we want to expand the second vmla:
vmla
vmul
vadd
Even with the 4 cycle vmul stall, the second sequence is still 2 cycles
faster.
Up to now, isel simply avoid codegen'ing fp vmla / vmls. This works well enough
but it isn't the optimial solution. This patch attempts to make it possible to
use vmla / vmls in cases where it is profitable.
A. Add missing isel predicates which cause vmla to be codegen'ed.
B. Make sure the fmul in (fadd (fmul)) has a single use. We don't want to
compute a fmul and a fmla.
C. Add additional isel checks for vmla, avoid cases where vmla is feeding into
fp instructions (except for the #3 exceptional case).
D. Add ARM hazard recognizer to model the vmla / vmls hazards.
E. Add a special pre-regalloc case to expand vmla / vmls when it's likely the
vmla / vmls will trigger one of the special hazards.
Work in progress, only A+B are enabled.
llvm-svn: 120960
2010-12-05 22:04:16 +00:00
a3fb8cb3d4
Remove the PHIElimination.h header, as it is no longer needed.
...
llvm-svn: 120959
2010-12-05 21:39:42 +00:00
16ebe77be0
Fix PR 4170 by having ExtractValueInst::getIndexedType() reject out-of-bounds indexing.
...
Also add asserts that the indices are valid in InsertValueInst::init(). ExtractValueInst already asserts when constructed with invalid indices.
llvm-svn: 120956
2010-12-05 20:50:26 +00:00
6766c420a2
I forgot to actually remove the FindCopyInsertPoint() declaration from
...
PHIElimination.h.
llvm-svn: 120953
2010-12-05 19:58:57 +00:00
8d1695589c
Remove the SplitCriticalEdge() method declaration from PHIElimination.h. At one
...
time, this method existed, but now PHIElimination uses the method of the same
name on MachineBasicBlock.
llvm-svn: 120952
2010-12-05 19:54:23 +00:00
da592a9e41
Move the FindCopyInsertPoint method of PHIElimination to a new standalone
...
function so that it can be shared with StrongPHIElimination.
llvm-svn: 120951
2010-12-05 19:51:05 +00:00
76244867cf
Refactor jump threading.
...
Should have no functional change other than the order of two transformations that are mutually-exclusive and the exact formatting of debug output.
Internally, it now stores the ConstantInt*s as Constant*s, and actual undef values instead of nulls.
llvm-svn: 120946
2010-12-05 19:06:41 +00:00
5e75ef4a8e
Remove trailing whitespace.
...
llvm-svn: 120945
2010-12-05 19:02:47 +00:00
8fb69ee805
Teach SimplifyCFG to turn
...
(indirectbr (select cond, blockaddress(@fn, BlockA),
blockaddress(@fn, BlockB)))
into
(br cond, BlockA, BlockB).
llvm-svn: 120943
2010-12-05 18:29:03 +00:00
6886171792
Teach X86ISelLowering that the second result of X86ISD::UMUL is a flags
...
result. This allows us to compile:
void *test12(long count) {
return new int[count];
}
into:
test12:
movl $4, %ecx
movq %rdi, %rax
mulq %rcx
movq $-1, %rdi
cmovnoq %rax, %rdi
jmp __Znam ## TAILCALL
instead of:
test12:
movl $4, %ecx
movq %rdi, %rax
mulq %rcx
seto %cl
testb %cl, %cl
movq $-1, %rdi
cmoveq %rax, %rdi
jmp __Znam
Of course it would be even better if the regalloc inverted the cmov to 'cmovoq',
which would eliminate the need for the 'movq %rdi, %rax'.
llvm-svn: 120936
2010-12-05 07:49:54 +00:00
364bb0a081
it turns out that when ".with.overflow" intrinsics were added to the X86
...
backend that they were all implemented except umul. This one fell back
to the default implementation that did a hi/lo multiply and compared the
top. Fix this to check the overflow flag that the 'mul' instruction
sets, so we can avoid an explicit test. Now we compile:
void *func(long count) {
return new int[count];
}
into:
__Z4funcl: ## @_Z4funcl
movl $4, %ecx ## encoding: [0xb9,0x04,0x00,0x00,0x00]
movq %rdi, %rax ## encoding: [0x48,0x89,0xf8]
mulq %rcx ## encoding: [0x48,0xf7,0xe1]
seto %cl ## encoding: [0x0f,0x90,0xc1]
testb %cl, %cl ## encoding: [0x84,0xc9]
movq $-1, %rdi ## encoding: [0x48,0xc7,0xc7,0xff,0xff,0xff,0xff]
cmoveq %rax, %rdi ## encoding: [0x48,0x0f,0x44,0xf8]
jmp __Znam ## TAILCALL
instead of:
__Z4funcl: ## @_Z4funcl
movl $4, %ecx ## encoding: [0xb9,0x04,0x00,0x00,0x00]
movq %rdi, %rax ## encoding: [0x48,0x89,0xf8]
mulq %rcx ## encoding: [0x48,0xf7,0xe1]
testq %rdx, %rdx ## encoding: [0x48,0x85,0xd2]
movq $-1, %rdi ## encoding: [0x48,0xc7,0xc7,0xff,0xff,0xff,0xff]
cmoveq %rax, %rdi ## encoding: [0x48,0x0f,0x44,0xf8]
jmp __Znam ## TAILCALL
Other than the silly seto+test, this is using the o bit directly, so it's going in the right
direction.
llvm-svn: 120935
2010-12-05 07:30:36 +00:00
116580a11c
generalize the previous check to handle -1 on either side of the
...
select, inserting a not to compensate. Add a missing isZero check
that I lost somehow.
This improves codegen of:
void *func(long count) {
return new int[count];
}
from:
__Z4funcl: ## @_Z4funcl
movl $4, %ecx ## encoding: [0xb9,0x04,0x00,0x00,0x00]
movq %rdi, %rax ## encoding: [0x48,0x89,0xf8]
mulq %rcx ## encoding: [0x48,0xf7,0xe1]
testq %rdx, %rdx ## encoding: [0x48,0x85,0xd2]
movq $-1, %rdi ## encoding: [0x48,0xc7,0xc7,0xff,0xff,0xff,0xff]
cmoveq %rax, %rdi ## encoding: [0x48,0x0f,0x44,0xf8]
jmp __Znam ## TAILCALL
## encoding: [0xeb,A]
to:
__Z4funcl: ## @_Z4funcl
movl $4, %ecx ## encoding: [0xb9,0x04,0x00,0x00,0x00]
movq %rdi, %rax ## encoding: [0x48,0x89,0xf8]
mulq %rcx ## encoding: [0x48,0xf7,0xe1]
cmpq $1, %rdx ## encoding: [0x48,0x83,0xfa,0x01]
sbbq %rdi, %rdi ## encoding: [0x48,0x19,0xff]
notq %rdi ## encoding: [0x48,0xf7,0xd7]
orq %rax, %rdi ## encoding: [0x48,0x09,0xc7]
jmp __Znam ## TAILCALL
## encoding: [0xeb,A]
llvm-svn: 120932
2010-12-05 02:00:51 +00:00
342e6ea5f9
Improve an integer select optimization in two ways:
...
1. generalize
(select (x == 0), -1, 0) -> (sign_bit (x - 1))
to:
(select (x == 0), -1, y) -> (sign_bit (x - 1)) | y
2. Handle the identical pattern that happens with !=:
(select (x != 0), y, -1) -> (sign_bit (x - 1)) | y
cmov is often high latency and can't fold immediates or
memory operands. For example for (x == 0) ? -1 : 1, before
we got:
< testb %sil, %sil
< movl $-1, %ecx
< movl $1, %eax
< cmovel %ecx, %eax
now we get:
> cmpb $1, %sil
> sbbl %eax, %eax
> orl $1, %eax
llvm-svn: 120929
2010-12-05 01:23:24 +00:00
2bce78e8fc
Initialize HasPOPCNT.
...
llvm-svn: 120923
2010-12-04 23:57:24 +00:00
8867390cf2
Once the layout is done we don't need to keep updating which fragments are
...
valid. Addresses will not change.
llvm-svn: 120921
2010-12-04 22:47:22 +00:00
99e026dbca
Remember the contents of leb and dwarfline fragments when relaxing. This avoids
...
having to evaluate the expression again when writing.
llvm-svn: 120920
2010-12-04 21:58:52 +00:00
fbd47dcc55
Remove PHIElimination's private copy of SkipPHIsAndLabels.
...
llvm-svn: 120918
2010-12-04 20:40:15 +00:00
2f489236ab
Add patterns for the x86 popcnt instruction.
...
- Also adds a new POPCNT subtarget feature that is currently enabled if the target
supports SSE4.2 (nehalem) or SSE4A (barcelona).
llvm-svn: 120917
2010-12-04 20:32:23 +00:00
3336f748a5
Silence 'may be used uninitialized in this function' warnings. Static analysis
...
may determine that they cannot be used uninitialized. But that might be a bit
too much for the compiler to determine.
llvm-svn: 120916
2010-12-04 20:20:34 +00:00
66a1f86f7a
Support/PathV2: Remove redundant calls to make_error_code.
...
llvm-svn: 120913
2010-12-04 18:45:32 +00:00
f1a04edb42
APInt: microoptimize a few methods.
...
llvm-svn: 120912
2010-12-04 18:05:36 +00:00
31920b0a2a
Remove unneeded zero arrays.
...
llvm-svn: 120910
2010-12-04 15:28:22 +00:00
6f88fcb16b
Apparently APFloat::getZero doesn't like PPCDoubleDoubles.
...
llvm-svn: 120909
2010-12-04 14:43:08 +00:00
8ceebfaa04
Simplify code. No functionality change.
...
llvm-svn: 120907
2010-12-04 14:22:24 +00:00
ed854baad5
The Thumb tADDrSPi instruction is not valid when the destination is SP.
...
Check for that and try narrowing it to tADDspi instead. Radar 8724703.
llvm-svn: 120892
2010-12-04 04:40:19 +00:00
1c8ac8f027
There are two reasons why we might want to use
...
foo = a - b
.long foo
instead of just
.long a - b
First, on darwin9 64 bits the assembler produces the wrong result. Second,
if "a" is the end of the section all darwin assemblers (9, 10 and mc) will not
consider a - b to be a constant but will if the dummy foo is created.
Split how we handle these cases. The first one is something MC should take care
of. The second one has to be handled by the caller.
llvm-svn: 120889
2010-12-04 03:21:47 +00:00
db5576a185
Support/FileSystem: Add status implementation.
...
llvm-svn: 120870
2010-12-04 00:32:40 +00:00
962fbc42b5
Support/Windows/FileSystem: Fix MinGW warnings.
...
llvm-svn: 120868
2010-12-04 00:32:14 +00:00
818ab4aad4
Support/FileSystem: Add file_size implementation.
...
llvm-svn: 120867
2010-12-04 00:31:48 +00:00
1048e75fb9
Next step: Only pad debug_line when the target is darwin. Add a FIXME to avoid
...
doing that if the target is darwin10 or newer.
This fixes
*) Direct object emission was producing objects without the workaround on
darwin9.
*) Assembly printing was producing objects with the workaround on linux.
llvm-svn: 120866
2010-12-04 00:31:13 +00:00
Evan Cheng