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4 Commits

Author SHA1 Message Date
Matt Arsenault 6c2e200d38 AMDGPU: Fix typo 
llvm-svn: 252116
 2015-11-05 01:03:08 +00:00
Matt Arsenault e66621b306 AMDGPU: Add s_dcache_* instructions 
llvm-svn: 248533
 2015-09-24 19:52:27 +00:00
Tom Stellard 70580f83cc AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops 
Summary:
The MUBUF addr64 bit has been removed on VI, so we must use FLAT
instructions when the pointer is stored in VGPRs.

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11067

llvm-svn: 242673
 2015-07-20 14:28:41 +00:00
Tom Stellard 45bb48ea19 R600 -> AMDGPU rename 
llvm-svn: 239657
 2015-06-13 03:28:10 +00:00