maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
233,939 Commits 23 Branches 0 Tags 2.2 GiB
Commit Graph

29 Commits

Author SHA1 Message Date
Craig Topper a54c21e742 [AVX512] Use native IR for mask pcmpeq/pcmpgt intrinsics. 
llvm-svn: 272787
 2016-06-15 14:06:34 +00:00
Chandler Carruth c41e081f71 Fix this test to handle NDEBUG builds which don't have a name for the 
basic block.

llvm-svn: 272456
 2016-06-11 06:32:56 +00:00
Craig Topper 68738332b8 [AVX512] Implement 512-bit and masked shufflelo and shufflehi intrinsics directly with __builtin_shufflevector and __builtin_ia32_select. Also improve the formatting of the AVX2 version. 
llvm-svn: 272452
 2016-06-11 03:31:13 +00:00
Igor Breger aadb876200 [AVX512] Emit select instruction instead of using x86 specific instrinsics. 
This will allow us to remove the x86 instrinics from the backend.

Differential Revision: http://reviews.llvm.org/D21060

llvm-svn: 272141
 2016-06-08 13:59:20 +00:00
Craig Topper f51cc07719 [AVX512] Convert masked palignr builtins directly to native IR similar to the other palignr builtins, but with a select to handle masking. 
llvm-svn: 271873
 2016-06-06 06:13:01 +00:00
Craig Topper 4b060e31c9 [AVX512] Convert masked load builtins to generic masked load intrinsics instead of the x86 specific ones. 
This will allow the x86 intrinsics to be removed from the backend.

llvm-svn: 271253
 2016-05-31 06:58:07 +00:00
Craig Topper 6e891fbdd2 [AVX512] Emit generic masked store instrinsics instead of using x86 specific intrinsics. 
This will allow us to remove the x86 instrinics from the backend.

llvm-svn: 271246
 2016-05-31 01:50:10 +00:00
Michael Zuckerman e871785eb6 [Clang][avx512][Builtin] Adding intrinsics for cvtw2mask{128|256|512} instruction set 
Differential Revision: http://reviews.llvm.org/D19766

llvm-svn: 268385
 2016-05-03 14:12:23 +00:00
Michael Zuckerman de8d3753d3 [clang][AVX512][Builtin] Adding intrinsics for the SAD instruction set. 
Differential Revision: http://reviews.llvm.org/D19591

llvm-svn: 267942
 2016-04-28 21:21:08 +00:00
Michael Zuckerman 533e065bdc [Clang][BuiltIn][AVX512] Adding intrinsics fot align{d|q} and palignr instruction set 
Differential Revision: http://reviews.llvm.org/D19588

llvm-svn: 267876
 2016-04-28 12:47:30 +00:00
Michael Zuckerman 8938e836c4 [Clang][AVX512][BuiltIn] Adding support to intrinsics of VPERMD and VPERMW instruction set 
Differential Revision: http://reviews.llvm.org/D19195

llvm-svn: 267380
 2016-04-25 05:32:35 +00:00
Michael Zuckerman c2b6128a8f [Clang][AVX512][Builtin] Adding support for VBROADCAST and VPBROADCASTB/W/D/Q instruction set 
Differential Revision: http://reviews.llvm.org/D19012

llvm-svn: 266195
 2016-04-13 12:58:01 +00:00
Michael Zuckerman 074edd7c1e [Clang][AVX512][Builtin] Adding supporting to intrinsics of cvt{b|d|q}2mask{128|256|512} and cvtmask2{b|d|q}{128|256|512} instruction set. 
Differential Revision: http://reviews.llvm.org/D19009

llvm-svn: 266188
 2016-04-13 10:49:37 +00:00
Michael Zuckerman 07525091e6 [Clang][AVX512][BuiltIn] Adding avx512 ( ptest{n}m{b|w}{128|256|512} ) builtin to clang 
Differential Revision: http://reviews.llvm.org/D18924

llvm-svn: 265928
 2016-04-11 10:22:07 +00:00
Michael Zuckerman fa7ccc5bcf [Clang][AVX512][BuiltIn] Adding avx512 ( store ) builtin to clang 
Differential Revision: http://reviews.llvm.org/D18925

llvm-svn: 265895
 2016-04-10 10:51:04 +00:00
Michael Zuckerman def78750b7 [CLANG][avx512][BUILTIN] Adding fixupimm{pd|ps|sd|ss} 
getexp{sd|ss} getmant{sd|ss} kunpck{di|si} loada{pd|ps} loaddqu{di|hi|qi|si} max{sd|ss} min{sd|ss} kmov16 builtins to clang


Differential Revision: http://reviews.llvm.org/D18215

llvm-svn: 264574
 2016-03-28 12:23:09 +00:00
Michael Zuckerman 56de012b41 Fixing a checkfile error in avx512vlbw-builtins.c 
Differential Revision: http://reviews.llvm.org/D17814

llvm-svn: 262611
 2016-03-03 12:17:50 +00:00
Michael Zuckerman 1ad03e7f01 [CLANG][AVX512][BUILTIN] movdqu{qi|hi} {128|256|512} 
Differential Revision: http://reviews.llvm.org/D17814

llvm-svn: 262609
 2016-03-03 11:34:52 +00:00
Michael Zuckerman 431b0e18b4 [CLANG] [AVX512] [BUILTIN] Adding PSLL{V|W|Wi}{128|256|512} builtin 
Differential Revision: http://reviews.llvm.org/D17685

llvm-svn: 262177
 2016-02-28 07:39:34 +00:00
Michael Zuckerman 7a33dce4ef [CLANG] [AVX512] [BUILTIN] Adding pmovzx{b|d|w}{w|d|q}{128|256|512} builtin to clang 
Differential Revision: http://reviews.llvm.org/D16961

llvm-svn: 261471
 2016-02-21 14:00:11 +00:00
Michael Zuckerman 7cdb72f7ea [CLANG] [AVX512] [BUILTIN] Adding pmovsx{b|d|w}{w|d|q}{128|256|512} builtin to clang 
Differential Revision: http://reviews.llvm.org/D16955

llvm-svn: 261196
 2016-02-18 09:09:34 +00:00
Eric Christopher cd875efa78 Canonicalize some of the x86 builtin tests and either remove or comment 
about optimization options.

llvm-svn: 250271
 2015-10-14 05:40:21 +00:00
Chandler Carruth cbe6411401 Fix the SSE4 byte sign extension in a cleaner way, and more thoroughly 
test that our intrinsics behave the same under -fsigned-char and
-funsigned-char.

This further testing uncovered that AVX-2 has a broken cmpgt for 8-bit
elements, and has for a long time. This is fixed in the same way as
SSE4 handles the case.

The other ISA extensions currently work correctly because they use
specific instruction intrinsics. As soon as they are rewritten in terms
of generic IR, they will need to add these special casts. I've added the
necessary testing to catch this however, so we shouldn't have to chase
it down again.

I considered changing the core typedef to be signed, but that seems like
a bad idea. Notably, it would be an ABI break if anyone is reaching into
the innards of the intrinsic headers and passing __v16qi on an API
boundary. I can't be completely confident that this wouldn't happen due
to a macro expanding in a lambda, etc., so it seems much better to leave
it alone. It also matches GCC's behavior exactly.

A fun side note is that for both GCC and Clang, -funsigned-char really
does change the semantics of __v16qi. To observe this, consider:

  % cat x.cc
  #include <smmintrin.h>
  #include <iostream>

  int main() {
    __v16qi a = { 1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
    __v16qi b = _mm_set1_epi8(-1);
    std::cout << (int)(a / b)[0] << ", " << (int)(a / b)[1] << '\n';
  }
  % clang++ -o x x.cc && ./x
  -1, 1
  % clang++ -funsigned-char -o x x.cc && ./x
  0, 1

However, while this may be surprising, both Clang and GCC agree.

Differential Revision: http://reviews.llvm.org/D13324

llvm-svn: 249097
 2015-10-01 23:40:12 +00:00
Asaf Badouh c68e347c25 [X86][AVX512VLBW] add pack, cvt, mulhi and madd intrinsics 
Differential Revision: http://reviews.llvm.org/D11642

llvm-svn: 243867
 2015-08-03 07:51:00 +00:00
Asaf Badouh 1626545667 [x86] add 2 bit to ObjCOrBuiltinID and new intrinsics 
add 2 bit to ObjCOrBuiltinID (changed from 11bits to 13bits), see discussion in
Add new intrinsics support that already covered by the BE.
All the intrinsics are covered by tests

Differential Revision: http://reviews.llvm.org/D10893

llvm-svn: 242144
 2015-07-14 14:02:45 +00:00
Elena Demikhovsky 23fccde1b1 AVX-512: Changed CC parameter in "cmp" intrinsic 
from i8 to i32 according to the Intel Spec

llvm-svn: 236980
 2015-05-11 09:03:41 +00:00
Elena Demikhovsky 35dc8c0944 AVX-512: added intrinsics for KNL and SKX 
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 235986
 2015-04-28 13:28:01 +00:00
Craig Topper 335e218760 [X86] Add intrinsics for AVX512 128 and 256 bit integer comparison of word and byte vectors. 
llvm-svn: 227186
 2015-01-27 09:16:29 +00:00
Robert Khasanov b9f3a911c9 [AVX512] Added VPCMPEQ intrinisics to headers. 
Added tests.

Patch by Maxim Blumenthal <maxim.blumenthal@intel.com>

llvm-svn: 219319
 2014-10-08 17:18:13 +00:00