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Commit Graph

Author	SHA1	Message	Date
Quentin Colombet	739614839f	[X86] Fix the AllRegs AVX calling convention. We used to list registers that were not in the AVX space. In other words, we were pushing registers that the ISA cannot encode (YMM16-YMM31). This is part of llvm.org/PR27481. llvm-svn: 268983	2016-05-09 22:37:05 +00:00
Amjad Aboud	719325fe11	Disallow generating vzeroupper before return instruction (iret) in interrupt handler function. This resolves https://llvm.org/bugs/show_bug.cgi?id=26412 Differential Revision: http://reviews.llvm.org/D17542 llvm-svn: 262319	2016-03-01 11:32:03 +00:00

Author

SHA1

Message

Date

Quentin Colombet

739614839f

[X86] Fix the AllRegs AVX calling convention.

We used to list registers that were not in the AVX space. In other
words, we were pushing registers that the ISA cannot encode
(YMM16-YMM31).

This is part of llvm.org/PR27481.

llvm-svn: 268983

2016-05-09 22:37:05 +00:00

Amjad Aboud

719325fe11

Disallow generating vzeroupper before return instruction (iret) in interrupt handler function.

This resolves https://llvm.org/bugs/show_bug.cgi?id=26412

Differential Revision: http://reviews.llvm.org/D17542

llvm-svn: 262319

2016-03-01 11:32:03 +00:00

2 Commits