dfc277f350
Enabling 3DNow! prefetch instruction for a few AMD processors: bobcat, jaguar,
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bulldozer and piledriver. Support for the instruction itself seems to have
already been added in r178040.
Differential Revision: http://llvm-reviews.chandlerc.com/D1933
llvm-svn: 192828
2013-10-16 19:04:11 +00:00
dd9891f22d
Attempt to fix llvm-ppc64-linux2 buildbot failure by adding
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-march=x86 to SLM test.
llvm-svn: 190958
2013-09-18 21:39:33 +00:00
457daddc9b
Verify that llvm can generate the prefetchw instruction when the CPU is
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Atom Silvermont.
Patch by Sriram Murali.
llvm-svn: 190957
2013-09-18 21:08:09 +00:00
4a44e556cc
Fix PRFCHW test on non-x86 builds
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- 'prefetch' intrinsics are only lowered when SSE is available. On non-X86
builds, 'generic' CPU is used and stops lowering any prefetch intrinsics.
llvm-svn: 178046
2013-03-26 18:15:45 +00:00
5173ee03af
Add PREFETCHW codegen support
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- Add 'PRFCHW' feature defined in AVX2 ISA extension
llvm-svn: 178040
2013-03-26 17:47:11 +00:00
3294538546
Add test for r146163.
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llvm-svn: 146167
2011-12-08 19:21:39 +00:00
dc9ff3a4b1
Add one more argument to the prefetch intrinsic to indicate whether it's a data
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or instruction cache access. Update the targets to match it and also teach
autoupgrade.
llvm-svn: 132976
2011-06-14 04:58:37 +00:00
c9242c577e
Prefetch has a MemOperand now. FileCheckize a test.
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This finishes up 8460971.
llvm-svn: 119848
2010-11-19 21:49:38 +00:00
40503396da
Eliminate more uses of llvm-as and llvm-dis.
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llvm-svn: 81290
2009-09-08 23:54:48 +00:00
1b095b443c
Convert several tests to use temporary files instead of redundantly
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executing the test commands.
llvm-svn: 52163
2008-06-10 00:36:41 +00:00
65aada6e8f
There is no "-mattr=+sse1" flag; fix test for non-x86 hosts.
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llvm-svn: 48156
2008-03-10 17:13:37 +00:00
95cf661534
Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.
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llvm-svn: 48042
2008-03-08 00:58:38 +00:00
Yunzhong Gao