Commit Graph

220 Commits

Author SHA1 Message Date
Yaron Keren 556b21aa10 Remove and forbid raw_svector_ostream::flush() calls.
After r244870 flush() will only compare two null pointers and return,
doing nothing but wasting run time. The call is not required any more
as the stream and its SmallString are always in sync.

Thanks to David Blaikie for reviewing.

llvm-svn: 244928
2015-08-13 18:12:56 +00:00
David Blaikie 4ab57cd9ab Fix memory leaks by avoiding extra manual dynamic allocation
Improvement to r244212.

llvm-svn: 244252
2015-08-06 19:23:33 +00:00
Yaron Keren 6501e399ce Plug memory leaks in AsmWriterEmitter::EmitPrintAliasInstruction.
llvm-svn: 244212
2015-08-06 13:18:59 +00:00
Benjamin Kramer f5e2fc474d Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial types
If the type isn't trivially moveable emplace can skip a potentially
expensive move. It also saves a couple of characters.


Call sites were found with the ASTMatcher + some semi-automated cleanup.

memberCallExpr(
    argumentCountIs(1), callee(methodDecl(hasName("push_back"))),
    on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))),
    hasArgument(0, bindTemporaryExpr(
                       hasType(recordDecl(hasNonTrivialDestructor())),
                       has(constructExpr()))),
    unless(isInTemplateInstantiation()))

No functional change intended.

llvm-svn: 238602
2015-05-29 19:43:39 +00:00
Akira Hatanaka b46d0234a6 [MCInstPrinter] Enable MCInstPrinter to change its behavior based on the
per-function subtarget.

Currently, code-gen passes the default or generic subtarget to the constructors
of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which
enables some targets (AArch64, ARM, and X86) to change their instprinter's
behavior based on the subtarget feature bits. Since the backend can now use
different subtargets for each function, instprinter has to be changed to use the
per-function subtarget rather than the default subtarget.

This patch takes the first step towards enabling instprinter to change its
behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to
AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the
various print methods table-gen auto-generates. 

I will follow up with changes to instprinters of AArch64, ARM, and X86.

llvm-svn: 233411
2015-03-27 20:36:02 +00:00
Yaron Keren 09fb7c6e7a Teach raw_ostream to accept SmallString.
Saves adding .str() call to any raw_ostream << SmallString usage
and a small step towards making .str() consistent in the ADTs by
removing one of the SmallString::str() use cases, discussion at

http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20141013/240026.html

I'll update the Phabricator patch http://reviews.llvm.org/D6372
for review of the Twine SmallString support, it's more complex
than this one.

llvm-svn: 231763
2015-03-10 07:33:23 +00:00
Alexander Kornienko 8c0809c7f8 Replace size method call of containers to empty method where appropriate
This patch was generated by a clang tidy checker that is being open sourced.
The documentation of that checker is the following:

/// The emptiness of a container should be checked using the empty method
/// instead of the size method. It is not guaranteed that size is a
/// constant-time function, and it is generally more efficient and also shows
/// clearer intent to use empty. Furthermore some containers may implement the
/// empty method but not implement the size method. Using empty whenever
/// possible makes it easier to switch to another container in the future.

Patch by Gábor Horváth!

llvm-svn: 226161
2015-01-15 11:41:30 +00:00
Evgeny Astigeevich b42003d2bf On behalf of Matthew Wahab:
An instruction alias defined with InstAlias and an optional operand in the
middle of the AsmString field, "..${a} <operands>", would get the final
"}" printed in the instruction disassembly. This wouldn't happen if the optional
operand appeared as the last item in the AsmString which is how the current
backends avoided the problem.

There don't appear to be any tests for this part of Tablegen but it passes the
pre-commit tests. Manually tested the change by enabling the generic alias
printer in the ARM backend and checking the output.

Differential Revision: http://reviews.llvm.org/D6529

llvm-svn: 224348
2014-12-16 18:16:17 +00:00
David Blaikie 9b613dba94 Remove indirection of vector<T*> in favor of deque<T>
llvm-svn: 222958
2014-11-29 18:13:39 +00:00
Craig Topper 03ec801126 Use range-based for loops.
llvm-svn: 222782
2014-11-25 20:11:31 +00:00
Craig Topper 135999c35c Remove dead code.
llvm-svn: 222781
2014-11-25 20:11:29 +00:00
Craig Topper 356387843a Remove unused MaxSize variable.
llvm-svn: 222780
2014-11-25 20:11:27 +00:00
Craig Topper 1f3873613c Move a vector instead of copying it.
llvm-svn: 222779
2014-11-25 20:11:25 +00:00
Craig Topper a4ff6ae766 Replace a comment that says 'unreachable' with llvm_unreachable in TableGen AsmWriter output.
llvm-svn: 222650
2014-11-24 14:09:52 +00:00
Craig Topper ba6d83e64b Detect best type for some static index tables instead of just using uint32_t to reduce total data size.
llvm-svn: 222643
2014-11-24 02:08:35 +00:00
Reid Kleckner 132c40fdbb TableGen: Add 'static' to a large array to avoid a huge stack allocation
Speculative fix for a -Wframe-larger-than warning from gcc.  Clang will
implicitly promote such constant arrays to globals, so in theory it
won't hit this.

llvm-svn: 213298
2014-07-17 19:43:40 +00:00
Artyom Skrobov 6c8682e2e9 Condition codes AL and NV are invalid in the aliases that use
inverted condition codes (CINC, CINV, CNEG, CSET, and CSETM).

Matching aliases based on "immediate classes", when disassembling,
wasn't previously supported, hence adding MCOperandPredicate
into class Operand, and implementing the support for it
in AsmWriterEmitter.

The parsing for those aliases was already custom, so just adding
the missing condition into AArch64AsmParser::parseCondCode.

llvm-svn: 210528
2014-06-10 13:11:35 +00:00
Artyom Skrobov af3c20f83a Refactoring in AsmWriterEmitter::EmitPrintAliasInstruction()
llvm-svn: 210527
2014-06-10 12:47:23 +00:00
Tim Northover 9a24f88a37 TableGen: convert InstAlias's Emit bit to an int.
When multiple aliases overlap, the correct string to print can often be
determined purely by considering the InstAlias declarations in some particular
order. This allows the user to specify that order manually when desired,
without resorting to hacking around with the default lexicographical order on
Record instantiation, which is error-prone and ugly.

I was also mistaken about "add w2, w3, w4" being the same as "add w2, w3, w4,
uxtw". That's only true if Rn is the stack pointer.

llvm-svn: 209199
2014-05-20 09:17:16 +00:00
Tim Northover 5896b066e6 TableGen: fix operand counting for aliases
TableGen has a fairly dubious heuristic to decide whether an alias should be
printed: does the alias have lest operands than the real instruction. This is
bad enough (particularly with no way to override it), but it should at least be
calculated consistently for both strings.

This patch implements that logic: first get the *correct* string for the
variant, in the same way as the Matcher, without guessing; then count the
number of whitespace chars.

There are basically 4 changes this brings about after the previous
commits; all of these appear to be good, so I have changed the tests:

+ ARM64: we print "neg X, Y" instead of "sub X, xzr, Y".
+ ARM64: we skip implicit "uxtx" and "uxtw" modifiers.
+ Sparc: we print "mov A, B" instead of "or %g0, A, B".
+ Sparc: we print "fcmpX A, B" instead of "fcmpX %fcc0, A, B"

llvm-svn: 208969
2014-05-16 09:42:04 +00:00
Tim Northover 60091cfeb9 TableGen: use correct MIOperand when printing aliases
Previously, TableGen assumed that every aliased operand consumed precisely 1
MachineInstr slot (this was reasonable because until a couple of days ago,
nothing more complicated was eligible for printing).

This allows a couple more ARM64 aliases to print so we can remove the special
code.

On the X86 side, I've gone for explicit AT&T size specifiers as the default, so
turned off a few of the aliases that would have just started printing.

llvm-svn: 208880
2014-05-15 13:36:01 +00:00
Tim Northover d8d65a69cf TableGen/ARM64: print aliases even if they have syntax variants.
To get at least one use of the change (and some actual tests) in with its
commit, I've enabled the AArch64 & ARM64 NEON mov aliases.

llvm-svn: 208867
2014-05-15 11:16:32 +00:00
Alp Toker beaca19c7c Fix typos
llvm-svn: 208839
2014-05-15 01:52:21 +00:00
Aaron Ballman e58a570989 Teach the table generator to not generate switch statements containing only a default label with no cases. This solves some warnings with MSVC.
No functional changes intended.

llvm-svn: 208694
2014-05-13 12:52:35 +00:00
Tim Northover 0ee9e7ed7a TableGen: strengthen assert
llvm-svn: 208679
2014-05-13 09:37:41 +00:00
Jay Foad b359051d9e Fix gcc -Wparentheses warning.
llvm-svn: 208675
2014-05-13 08:26:53 +00:00
Tim Northover ee20caaf82 TableGen: use PrintMethods to print more aliases
llvm-svn: 208607
2014-05-12 18:04:06 +00:00
Benjamin Kramer d59664f4f7 raw_ostream: Forward declare OpenFlags and include FileSystem.h only where necessary.
llvm-svn: 207593
2014-04-29 23:26:49 +00:00
Chandler Carruth e96dd8975f [Modules] Make Support/Debug.h modular. This requires it to not change
behavior based on other files defining DEBUG_TYPE, which means it cannot
define DEBUG_TYPE at all. This is actually better IMO as it forces folks
to define relevant DEBUG_TYPEs for their files. However, it requires all
files that currently use DEBUG(...) to define a DEBUG_TYPE if they don't
already. I've updated all such files in LLVM and will do the same for
other upstream projects.

This still leaves one important change in how LLVM uses the DEBUG_TYPE
macro going forward: we need to only define the macro *after* header
files have been #include-ed. Previously, this wasn't possible because
Debug.h required the macro to be pre-defined. This commit removes that.
By defining DEBUG_TYPE after the includes two things are fixed:

- Header files that need to provide a DEBUG_TYPE for some inline code
  can do so by defining the macro before their inline code and undef-ing
  it afterward so the macro does not escape.

- We no longer have rampant ODR violations due to including headers with
  different DEBUG_TYPE definitions. This may be mostly an academic
  violation today, but with modules these types of violations are easy
  to check for and potentially very relevant.

Where necessary to suppor headers with DEBUG_TYPE, I have moved the
definitions below the includes in this commit. I plan to move the rest
of the DEBUG_TYPE macros in LLVM in subsequent commits; this one is big
enough.

The comments in Debug.h, which were hilariously out of date already,
have been updated to reflect the recommended practice going forward.

llvm-svn: 206822
2014-04-21 22:55:11 +00:00
Nuno Lopes 9ced19abe8 remove some dead code
lib/Analysis/IPA/InlineCost.cpp         |   18 ------------------
 lib/Analysis/RegionPass.cpp             |    1 -
 lib/Analysis/TypeBasedAliasAnalysis.cpp |    1 -
 lib/Transforms/Scalar/LoopUnswitch.cpp  |   21 ---------------------
 lib/Transforms/Utils/LCSSA.cpp          |    2 --
 lib/Transforms/Utils/LoopSimplify.cpp   |    6 ------
 utils/TableGen/AsmWriterEmitter.cpp     |   13 -------------
 utils/TableGen/DFAPacketizerEmitter.cpp |    7 -------
 utils/TableGen/IntrinsicEmitter.cpp     |    2 --
 9 files changed, 71 deletions(-)

llvm-svn: 206506
2014-04-17 22:26:44 +00:00
Craig Topper 2406477179 [C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr.
llvm-svn: 206254
2014-04-15 07:20:03 +00:00
Benjamin Kramer 48e7e85d29 tblgen: Twinify PrintFatalError.
No functionality change.

llvm-svn: 205110
2014-03-29 17:17:15 +00:00
Tim Northover 4e55afed7e TableGen: don't save a StringRef to a local std::string.
This caused a failure in some Windows builds.

llvm-svn: 205109
2014-03-29 16:59:27 +00:00
Rafael Espindola b1f25f1b93 Replace PROLOG_LABEL with a new CFI_INSTRUCTION.
The old system was fairly convoluted:
* A temporary label was created.
* A single PROLOG_LABEL was created with it.
* A few MCCFIInstructions were created with the same label.

The semantics were that the cfi instructions were mapped to the PROLOG_LABEL
via the temporary label. The output position was that of the PROLOG_LABEL.
The temporary label itself was used only for doing the mapping.

The new CFI_INSTRUCTION has a 1:1 mapping to MCCFIInstructions and points to
one by holding an index into the CFI instructions of this function.

I did consider removing MMI.getFrameInstructions completelly and having
CFI_INSTRUCTION own a MCCFIInstruction, but MCCFIInstructions have non
trivial constructors and destructors and are somewhat big, so the this setup
is probably better.

The net result is that we don't create temporary labels that are never used.

llvm-svn: 203204
2014-03-07 06:08:31 +00:00
Craig Topper 4c6129af32 Get rid of a vector copy by just making a pointer out of the reference returned by getInstructionsByEnumValue instead of assigning it to a new vector.
llvm-svn: 200828
2014-02-05 07:56:49 +00:00
Roman Divacky 9dc6df5744 Constant propagate MachineInstrClassName.
llvm-svn: 198969
2014-01-10 22:59:49 +00:00
Rafael Espindola f581314932 All backends use MC now.
llvm-svn: 198959
2014-01-10 21:49:27 +00:00
Rafael Espindola 53c2b1ea59 Remove dead code.
llvm-svn: 196066
2013-12-02 05:10:04 +00:00
Ahmed Bougacha bd2140018b TableGen: Refactor AsmWriterEmitter to keep AsmWriterInsts.
These used to be referenced by the CGI->AWI map (in AsmWriterEmitter), but
stored in a vector local to EmitPrintInstruction. Move the vector to
AsmWriterEmitter too.

llvm-svn: 193525
2013-10-28 18:07:17 +00:00
Rafael Espindola 44fee4e0eb Remove several unused variables.
Patch by Alp Toker.

llvm-svn: 191757
2013-10-01 13:32:03 +00:00
Benjamin Kramer 17c17bce2a llvm-tblgen: Mangle operand replacements into the strings in printAliasInstr.
Cuts down the bloat in the AArch64 asm writer a bit.

llvm-svn: 190527
2013-09-11 15:42:16 +00:00
Jack Carter 9c1a027fe8 This patch that sets the EmitAlias flag in td files
and enables the instruction printer to print aliased 
instructions. 

Due to usage of RegisterOperands a change in common 
code (utils/TableGen/AsmWriterEmitter.cpp) is required 
to get the correct register value if it is a RegisterOperand.

Contributer: Vladimir Medic
 
llvm-svn: 174358
2013-02-05 08:32:10 +00:00
Tim Northover ab7689ecee Check whether MCInst operand isImm before calling getImm.
When processing possible aliases, TableGen assumes that if an operand *can* be
an immediate, then it always *will* be. This is incorrect for the AArch64
backend. This patch inserts a check in the generated code to make sure isImm is
true first.

llvm-svn: 171972
2013-01-09 13:32:04 +00:00
Joerg Sonnenberger 635debe85b Remove exception handling usage from tblgen.
Most places can use PrintFatalError as the unwinding mechanism was not
used for anything other than printing the error. The single exception
was CodeGenDAGPatterns.cpp, where intermediate errors during type
resolution were ignored to simplify incremental platform development.
This use is replaced by an error flag in TreePattern and bailout earlier
in various places if it is set. 

llvm-svn: 166712
2012-10-25 20:33:17 +00:00
Sean Silva 88eb8dd4ed tblgen: Use semantically correct RTTI functions.
Also, some minor cleanup.

llvm-svn: 165647
2012-10-10 20:24:47 +00:00
Sean Silva fb509ed156 tblgen: Mechanically move dynamic_cast<> to dyn_cast<>.
Some of these dyn_cast<>'s would be better phrased as isa<> or cast<>.
That will happen in a future patch.

There are also two dyn_cast_or_null<>'s slipped in instead of
dyn_cast<>'s, since they were causing crashes with just dyn_cast<>.

llvm-svn: 165646
2012-10-10 20:24:43 +00:00
Craig Topper f8f0a23ce7 Revert r163878 as it breaks on targets with alternate register names. Such targets do not exist in the main tree so this was not noticed.
llvm-svn: 163959
2012-09-15 01:22:42 +00:00
Craig Topper 06cec4ceac Allow the second opcode info table to be 8, 16, or 32-bits as needed to represent additional fragments. This recovers some space on ATT X86 syntax and PowerPC which only need 40-bits instead of 48-bits. This also increases ARM to 64-bits to fully encode all of its operands.
llvm-svn: 163880
2012-09-14 08:33:11 +00:00
Craig Topper 805e39beab Reduce size of register name index tables by using uint16_t for all in tree targets. If more than 16-bits are needed for any out of tree targets, code will detect and use uint32_t instead.
llvm-svn: 163878
2012-09-14 06:37:49 +00:00
Manman Ren 4d9ae56a45 AsmWriterEmitter: OpInfo2 should be unsigned 16-bit.
Fix an issue in r163814.

llvm-svn: 163837
2012-09-13 20:47:48 +00:00