Commit Graph

405003 Commits

Author SHA1 Message Date
Balazs Benics 35ff3a0095 [analyzer][NFC] Make the API of CallDescription safer slightly
The new //deleted// constructor overload makes sure that no implicit
conversion from `0` would happen to `ArrayRef<const char*>`.

Also adds nodiscard to the `CallDescriptionMap::lookup()`
2021-11-17 15:55:35 +01:00
Zarko Todorovski 8924ba3bf8 [NFC][clang] Inclusive terms: replace uses of blacklist in clang/test/
Replace filenames, variable names, check prefixes uses of blacklist with ignore list.

Reviewed By: jkorous

Differential Revision: https://reviews.llvm.org/D113211
2021-11-17 09:43:02 -05:00
Christian Kühnel ec4a2c9565 [NFC][clangd] cleanup llvm-else-after-return findings
Cleanup of clang-tidy findings: removing "else" after a return statement
to improve readability of the code.

This patch was created by applying the clang-tidy fixes automatically.

Differential Revision: https://reviews.llvm.org/D113892
2021-11-17 14:37:03 +00:00
Haojian Wu 4ea066acc9 [clangd] Fix assertion crashes on unmatched NOLINTBEGIN comments.
The overload shouldSuppressDiagnostic seems unnecessary, and it is only
used in clangd.

This patch removes it and use the real one (suppression diagnostics are
discarded in clangd at the moment).

Fixes https://github.com/clangd/clangd/issues/929

Differential Revision: https://reviews.llvm.org/D113999
2021-11-17 15:31:38 +01:00
Dmitry Vyukov bdabf3c38a asan: don't use thread user_id
asan does not use user_id for anything,
so don't pass it to ThreadCreate.
Passing a random uninitialized field of AsanThread
as user_id does not make much sense anyway.

Depends on D113921.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D113922
2021-11-17 14:49:33 +01:00
Dmitry Vyukov d1f72f02d0 memprof: don't use thread user_id
memprof does not use user_id for anything,
so don't pass it to ThreadCreate.
Passing a random field of MemprofThread as user_id
does not make much sense anyway.

Depends on D113920.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D113921
2021-11-17 14:49:25 +01:00
Dmitry Vyukov 033b94ab52 lsan: remove pthread_detach/join interceptors
They don't seem to do anything useful in lsan.
They are needed only if a tools needs to execute
some custom logic during detach/join, or if it uses
thread registry quarantine. Lsan does none of this.
And if a tool cares then it would also need to intercept
pthread_tryjoin_np and pthread_timedjoin_np, otherwise
it will mess thread states.
Fwiw, asan does not intercept these functions either.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D113920
2021-11-17 14:49:15 +01:00
Dmitry Vyukov a7c57c4ec8 tsan: don't consider debug calls as calls
Tsan pass does 2 optimizations based on presence of calls:
1. Don't emit function entry/exit callbacks if there are no calls
and no memory accesses.
2. Combine read/write of the same variable if there are no
intervening calls.
However, all debug info is represented as CallInst as well
and thus effectively disables these optimizations.
Don't consider debug info calls as calls.

Reviewed By: glider, melver

Differential Revision: https://reviews.llvm.org/D114079
2021-11-17 14:42:16 +01:00
Yitzhak Mandelbaum 2b4948448f Add a clang-transformer tutorial
Differential Revision: https://reviews.llvm.org/D114011
2021-11-17 13:40:46 +00:00
Mirko Brkusanin f2d402e58b [NFC][AMDGPU][GlobalISel] Fix some legalizer tests
Instructions being tested were accidentally left dead.
2021-11-17 14:25:15 +01:00
Mirko Brkusanin db6bc2ab51 [AMDGPU][GlobalISel] Fold G_FNEG above when users cannot fold mods
If possible fold fneg into instruction above if users cannot fold mods and we
know it will decrease instruction count.
Follows same logic as SDAG combiner in choosing opportunities to combine.

Differential Revision: https://reviews.llvm.org/D112827
2021-11-17 14:25:13 +01:00
Aaron Ballman 3874277f41 Improve docs & test for #pragma clang attribute's any clause; NFC
There was some confusion during the discussion of a patch as to whether
`any` can be used to blast an attribute with no subject list onto
basically everything in a program by not specifying a subrule. This
patch adds documentation and tests to make it clear that this situation
is not supported and will be diagnosed.
2021-11-17 08:24:26 -05:00
David Sherwood 8d77555b12 [Analysis] Ensure getTypeLegalizationCost returns a simple VT for TypeScalarizeScalableVector
When getTypeConversion returns TypeScalarizeScalableVector we were
sometimes returning a non-simple type from getTypeLegalizationCost.
However, many callers depend upon this being a simple type and will
crash if not. This patch changes getTypeLegalizationCost to ensure
that we always a return sensible simple VT. If the vector type
contains unusual integer types, e.g. <vscale x 2 x i3>, then we just
set the type to MVT::i64 as a reasonable default.

A test has been added here that demonstrates the vectoriser can
correctly calculate the cost of vectorising a "zext i3 to i64"
instruction with a VF=vscale x 1:

  Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll

Differential Revision: https://reviews.llvm.org/D113777
2021-11-17 13:11:58 +00:00
Jay Foad aeedbd39a3 [AMDGPU] Generate test checks for mad_64_32.ll
Differential Revision: https://reviews.llvm.org/D113985
2021-11-17 12:44:16 +00:00
Simon Pilgrim 5fedbd5b18 [DAG] SimplifyDemandedVectorElts - zero_extend_vector_inreg(and(x,c)) -> and(x,c')
If we've only demanded the 0'th element, and it comes from a (one-use) AND, try to convert the zero_extend_vector_inreg into a mask and constant fold it with the AND.
2021-11-17 12:41:48 +00:00
Valentin Clement 964536cf04
[fir] !fir.tdesc type conversion
Add !fir.tdesc type conversion.
!fir.tdesc is converted to a llvm.ptr<i8>.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D113769

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
2021-11-17 13:31:14 +01:00
David Sherwood 670dd40244 [Analysis] Fix getNumberOfParts to return 0 when the answer is unknown
When asking how many parts are required for a scalable vector type
there are occasions when it cannot be computed. For example, <vscale x 1 x i3>
is one such vector for AArch64+SVE because at the moment no matter how we
promote the i3 type we never end up with a legal vector. This means
that getTypeConversion returns TypeScalarizeScalableVector as the
LegalizeKind, and then getTypeLegalizationCost returns an invalid cost.
This then causes BasicTTImpl::getNumberOfParts to dereference an invalid
cost, which triggers an assert. This patch changes getNumberOfParts to
return 0 for such cases, since the definition of getNumberOfParts in
TargetTransformInfo.h states that we can use a return value of 0 to represent
an unknown answer.

Currently, LoopVectorize.cpp is the only place where we need to check for
0 as a return value, because all other instances will not currently
ask for the number of parts for <vscale x 1 x iX> types.

In addition, I have changed the target-independent interface for
getNumberOfParts to return 1 and assume there is a single register
that can fit the type. The loop vectoriser has lots of tests that are
target-independent and they relied upon the 0 value to mean the
answer is known and that we are not scalarising the vector.

I have added tests here that show we correctly return an invalid cost
for VF=vscale x 1 when the loop contains unusual types such as i7:

  Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll

Differential Revision: https://reviews.llvm.org/D113772
2021-11-17 12:07:09 +00:00
Jeremy Morse 1dc0e47cb9 [DebugInfo][NFC] Force some tests to not use instruction-referencing
There are various tests that need to be adjusted to test the right
thing with instruction referencing -- usually because the internal
representation of variables is different, sometimes that location lists
change. This patch makes a bunch of tests explicitly not use
instruction referencing, so that a check-llvm test with instruction
referencing on for x86_64 doesn't fail. I'll then convert the tests
to have instr-ref CHECK lines, and similar.

Differential Revision: https://reviews.llvm.org/D113194
2021-11-17 11:51:29 +00:00
Florian Hahn 7b39ae513c
[Thumb2] Regenerate test impacted by e8b55cf7b7. 2021-11-17 11:32:05 +00:00
Valentin Clement e38ef2ff71
[fir] Add fir.box_tdesc conversion
This patch adds the conversion pattern for
`fir.box_tdes`.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D113931

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2021-11-17 12:02:48 +01:00
Florian Hahn e8b55cf7b7
[SCEV] Apply loop guards when computing max BTC for arbitrary steps.
Similar other cases in the current function (e.g. when the step is 1 or
-1), applying loop guards can lead to tighter upper bounds for the
backedge-taken counts.

Fixes PR52464.

Reviewed By: reames, nikic

Differential Revision: https://reviews.llvm.org/D113578
2021-11-17 11:00:49 +00:00
SYNOPSYS\georgiev 9574da8f51 [lldb/test] TestRegisterVariables test fix 2021-11-17 10:58:48 +00:00
Martin Storsjö efbe9ae23f Revert "[runtimes] Fix building initial libunwind+libcxxabi+libcxx with compiler implied -lunwind"
This reverts commit 7c3d19ab7b.

This commit was reported as causing build problems for the amdgpu
buildbot in https://reviews.llvm.org/D113253#3137097.
2021-11-17 12:50:33 +02:00
David Sherwood ca18fcc2c0 [IR] Change CreateStepVector to work with element types smaller than i8
Currently the stepvector intrinsic only supports element types that
are integers of size 8 bits or more. This patch adds support for the
creation of stepvectors with smaller element types by creating
the intrinsic with i8 elements that we then truncate to the requested
size.

It's not currently possible to write a vectoriser test to exercise
this code path so I have added a unit test here:

  llvm/unittests/IR/IRBuilderTest.cpp

Differential Revision: https://reviews.llvm.org/D113767
2021-11-17 10:47:50 +00:00
Jay Foad 4be705d6e5 [RISCV] Add extra -early-live-intervals test coverage
Add test coverage for a problem that was fixed by D113493: when updating
live intervals, fix handling of live ranges that were previously tied to
an early-clobber def but no longer are.
2021-11-17 10:35:55 +00:00
Jay Foad 3264e95938 [CodeGen] Update LiveIntervals in TargetInstrInfo::convertToThreeAddress
Delegate updating of LiveIntervals to each target's
convertToThreeAddress implementation, instead of repairing LiveIntervals
after the fact in TwoAddressInstruction::convertInstTo3Addr.

Differential Revision: https://reviews.llvm.org/D113493
2021-11-17 10:16:47 +00:00
Valentin Clement 1ed5a90f70
[fir] Add conversion patterns for slice, shape, shapeshift and shift ops
The information in these perations is used by other operation.
At this point they should not have anymore uses.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D113971

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2021-11-17 10:35:56 +01:00
Guillaume Chatelet 13744e3d73 [libc][benchmark] add memmove to size distribution, also update other distributions
Differential Revision: https://reviews.llvm.org/D113260
2021-11-17 09:22:05 +00:00
Stanislav Mekhanoshin c74f2e5b27 [InstCombine] Use SpecificBinaryOp_match in two more places
Differential Revision: https://reviews.llvm.org/D114038
2021-11-17 01:16:06 -08:00
Roman Lebedev 496ccb543e
[NFC][X86][Costmodel] Improve test coverage for i32->i64 vector *ext 2021-11-17 12:02:50 +03:00
Roman Lebedev 2037ec725f
[X86][Costmodel] `*ext v64i1 to v32i16` can appear after legalization, cost is same as for `*ext v32i1 to v32i16`
Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D113914
2021-11-17 12:02:50 +03:00
Roman Lebedev 23b194bf18
[X86][Costmodel] `trunc v32i16 to v64i1` can appear after legalization, cost is same as for `trunc v32i16 to v32i1`
Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D113913
2021-11-17 12:02:50 +03:00
Eric Tang f7eb061a5f [SelectionDAG] Make WidenVecRes_SELECT work for scalable vectors
This change make WidenVecRes_SELECT work for scalable vectors.

    This patch is split from [D110319](https://reviews.llvm.org/D110319)

Signed-off-by: Eric Tang <tangxingxin1008@gmail.com>

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D110388
2021-11-17 08:55:11 +00:00
SYNOPSYS\georgiev 9f0b5f9a39 [lldb/test] Added lldbutil function to test a breakpoint
Testing the breakpoint itself rather than the lldb string.

Differential Revision: https://reviews.llvm.org/D111899
2021-11-17 08:37:30 +00:00
Martin Storsjö f5ca3ac748 [libcxx] [ci] Add CI configurations for MinGW
Mention support for MinGW in the docs. Rename the existing windows
CI jobs to Clang-cl, as both Clang-cl and MinGW are equally much
"Windows", just different toolchain environments.

Add an XFAIL for a recently added test that fails in the MinGW DLL
configuration (with an explanation of what's causing the failure).

Differential Revision: https://reviews.llvm.org/D112215
2021-11-17 10:00:50 +02:00
Mircea Trofin 663693f3f7 [libc] Fix incorrect revert of 1ee3205
The revert, b2fbd45d23, incorrectly
re-introduced a few lines removed in 7c3d19ab7b
2021-11-16 23:13:16 -08:00
Michael Kruse d2124bfccf [flang] Remove default argument from function template specialization. NFC.
Patch D113697 added default function arguments to template specializations of `ConvertToBinary`.

According to https://en.cppreference.com/w/cpp/language/template_specialization this not allowed:
> Default function arguments cannot be specified in explicit specializations of function templates, member function templates, and member functions of class templates when the class is implicitly instantiated.

It happens to compile with gcc, clang and msvc 14.30 (Visual Studio 2022), but not msvc 14.29 (Visual Studio 2020). Even for the compilers that syntactically accept it, the default argument will never be used (only the default argument of the template declaration). From https://en.cppreference.com/w/cpp/language/function_template
> Note that only non-template and primary template overloads participate in overload resolution.

That is, the explicit function template specialization is not added to the overload candidate set. Only after all the parameter types are known, are the explicit specializations chosen, at which point the default function argument is ignored.

Also see D85657.

Reviewed By: klausler

Differential Revision: https://reviews.llvm.org/D114032
2021-11-17 00:05:34 -06:00
Freddy Ye 73c9cf8204 [X86][FP16] add alias for f*mul_*ch intrinsics
*_mul_*ch is to align with *_mul_*s, *_mul_*d and *_mul_*h.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D112777
2021-11-17 13:26:11 +08:00
Vitaly Buka 82fc4cc60b [scudo] Handle mallinfo2
mallinfo is deprecated by GLIBC

Reviewed By: cryptoad

Differential Revision: https://reviews.llvm.org/D113951
2021-11-16 19:29:37 -08:00
Kevin Cadieux d00256bac0 ADT: Adding a key_type definition to MapVector
The key_type type definition for map containers is useful in some
generic, template-based programming scenarios. The addition of key_type
to MapVector is consistent with other map types like DenseMap.

Differential Revision: https://reviews.llvm.org/D113242
2021-11-16 17:40:10 -08:00
Shoaib Meenai 01510ac084 [MachO] Move type size asserts to source files. NFC
As discussed in https://reviews.llvm.org/D113809#3128636. It's a bit
unfortunate to move the asserts away from the structs whose sizes
they're checking, but it's a far better developer experience when one of
the asserts is violated, because you get a single error instead of every
single source file including the header erroring out.
2021-11-16 17:14:16 -08:00
Nico Weber bbccf49922 Revert "[gn build] (manually) port 1ee32055ea (benchmark move)"
1ee32055ea was reverted in 67de95b8c9.

This reverts commit a8e8e2d5a2
and follow-up a0dc6001df
2021-11-16 20:07:17 -05:00
Vy Nguyen 34d15eaced [lld-macho][nfc] Sanity check on template type
Differential Revision: https://reviews.llvm.org/D114044
2021-11-16 20:04:49 -05:00
Mogball 209dadf269 [mlir] Fix formatting in Ops.td files (NFC)
MemRefOps.td has some inconsistencies in its formatting of argument
lists.
2021-11-17 00:59:42 +00:00
Mircea Trofin 67de95b8c9 Revert "[libc][NFC][Obvious] Fix the benchmarks after the switch to llvm/third-party"
This reverts commit 39e9f5d368.

Reverting, as we needed to re-revert the benchmarks move because it was
causing a build failure in the Fuchsia bots due to the way they consume
libcxx's CMakeLists. I want to make sure I understand where the fix
should be for that. After that, I'll incorporate the change here in the
re-reland.
2021-11-16 16:59:14 -08:00
Geoffrey Martin-Noble 00e11fdf09 [Bazel] Ignore both old and new benchmark directories
This is getting reverted and relanded a lot, breaking the build each
time.

Differential Revision: https://reviews.llvm.org/D114043
2021-11-16 16:49:30 -08:00
Jim Ingham dd5505a8f2 Revert "Make it possible for lldb to launch a remote binary with no local file."
The reworking of the gdb client tests into the PlatformClientTestBase broke
the test for this.  I did the mutatis mutandis for the move, but the test
still fails.  Reverting till I have time to figure out why.

This reverts commit b715b79d54.
2021-11-16 16:46:21 -08:00
Mogball 47f76bb0f4 [mlir][lsp] Use ResultGroupDefinition struct
This struct was added and was intended to be used, but it was missed in the original patch.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D114041
2021-11-17 00:40:57 +00:00
Mircea Trofin b2fbd45d23 Revert "Reland "[benchmarks] Move libcxx's fork of google/benchmark and llvm/utils'"""
This reverts commit 1ee32055ea.

We hit additional bot failures; in particular, Fuchsia's seems to be
related to how CMakeLists are ingested, see https://ci.chromium.org/ui/p/fuchsia/builders/toolchain.ci/clang-linux-x64/b8830380874445931681/overview
2021-11-16 16:35:06 -08:00
Shoaib Meenai 93bf271f27 [MachO] Shrink reloc from 32 bytes to 24 bytes
The `r_address` field of `relocation_info` is only 4 bytes, so our
offset field (which is the `r_address` field adjusted for subsection
splitting) also only needs to be 4 bytes. This reduces the structure
size from 32 bytes to 24 bytes.

Combined with https://reviews.llvm.org/D113813, this is a minor perf
improvement for linking an internal app, tested on two machines:

```
           smol-relocs     baseline        difference (95% CI)
sys_time   7.367 ± 0.138   7.543 ± 0.157   [  +0.9% ..   +3.8%]
user_time  21.843 ± 0.351  21.861 ± 0.450  [  -1.3% ..   +1.4%]
wall_time  20.301 ± 0.307  20.556 ± 0.324  [  +0.1% ..   +2.4%]
samples    16              16

           smol-relocs     baseline        difference (95% CI)
sys_time   2.923 ± 0.050   2.992 ± 0.018   [  +1.4% ..   +3.4%]
user_time  10.345 ± 0.039  10.448 ± 0.023  [  +0.8% ..   +1.2%]
wall_time  12.068 ± 0.071  12.229 ± 0.021  [  +1.0% ..   +1.7%]
samples    15              12
```

More importantly though, this change by itself reduces our maximum
resident set size by 220 MB (2.75%, from 7.85 GB to 7.64 GB) on the
first machine. On the second machine, it reduces it by 125 MB (1.94%,
from 6.31 GB to 6.19 GB).

Reviewed By: #lld-macho, int3

Differential Revision: https://reviews.llvm.org/D113818
2021-11-16 16:30:34 -08:00