Commit Graph

152 Commits

Author SHA1 Message Date
Devang Patel d71bc1ae4e While spilling live registers at the end of block check whether they are used by DBG_VALUE machine instructions or not. If a spilled register is used by DBG_VALUE machine instruction then insert a new DBG_VALUE machine instruction to encode variable's new location on stack.
llvm-svn: 110235
2010-08-04 18:42:02 +00:00
Jakob Stoklund Olesen 36cf119049 Fix a bug in the -regalloc=fast handling of exotic two-address instruction with
multiple defs, like t2LDRSB_POST.

The first def could accidentally steal the physreg that the second, tied def was
required to be allocated to.

Now, the tied use-def is treated more like an early clobber, and the physreg is
reserved before allocating the other defs.

This would never be a problem when the tied def was the only def which is the
usual case.

This fixes MallocBench/gs for thumb2 -O0.

llvm-svn: 109715
2010-07-29 00:52:19 +00:00
Devang Patel d61b735d25 Fix memory leak reported by valgrind.
Do not visit operands of old instruction. Visit all operands of new instruction.

llvm-svn: 108767
2010-07-19 23:25:39 +00:00
Jakob Stoklund Olesen 37c42a3d02 Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.
TII::isMoveInstr is going tobe completely removed.

llvm-svn: 108507
2010-07-16 04:45:42 +00:00
Devang Patel 57e72370ae Update DBG_VALUE to refer appropriate stack slot in case of a spill.
llvm-svn: 108023
2010-07-09 21:48:31 +00:00
Jakob Stoklund Olesen 4c82a9e7d0 Detect and handle COPY in many places.
This code is transitional, it will soon be possible to eliminate
isExtractSubreg, isInsertSubreg, and isMoveInstr in most places.

llvm-svn: 107547
2010-07-03 00:04:37 +00:00
Jakob Stoklund Olesen dadea5b178 Fix the handling of partial redefines in the fast register allocator.
A partial redefine needs to be treated like a tied operand, and the register
must be reloaded while processing use operands.

This fixes a bug where partially redefined registers were processed as normal
defs with a reload added. The reload could clobber another use operand if it was
a kill that allowed register reuse.

llvm-svn: 107193
2010-06-29 19:15:30 +00:00
Jakob Stoklund Olesen 0d94d7af78 Add more special treatment for inline asm in RegAllocFast.
When an instruction has tied operands and physreg defines, we must take extra
care that the tied operands conflict with neither physreg defs nor uses.

The special treatment is given to inline asm and instructions with tied operands
/ early clobbers and physreg defines.

This fixes PR7509.

llvm-svn: 107043
2010-06-28 18:34:34 +00:00
Jakob Stoklund Olesen 246e9a07a2 Avoid processing early clobbers twice in RegAllocFast.
Early clobbers defining a virtual register were first alocated to a physreg and
then processed as a physreg EC, spilling the virtreg.

This fixes PR7382.

llvm-svn: 105998
2010-06-15 16:20:57 +00:00
Jakob Stoklund Olesen 864827afb0 Keep track of the call instructions whose clobber lists were skipped during fast
register allocation.

Process all of the clobber lists at the end of the function, marking the
registers as used in MachineRegisterInfo.

This is necessary in case the calls clobber callee-saved registers (sic).

llvm-svn: 105473
2010-06-04 18:08:29 +00:00
Jakob Stoklund Olesen e0eddb21f5 Add support for partial redefs to the fast register allocator.
A partial redef now triggers a reload if required. Also don't add
<imp-def,dead> operands for physical superregisters.

Kill flags are still treated as full register kills, and <imp-use,kill> operands
are added for physical superregisters as before.

llvm-svn: 104167
2010-05-19 21:36:05 +00:00
Jakob Stoklund Olesen 663543b4d7 Properly handle multiple definitions of a virtual register in the same
instruction.

This can happen on ARM:

>> %reg1035:5<def>, %reg1035:6<def> = VLD1q16 %reg1028, 0, pred:14, pred:%reg0
Regs: Q0=%reg1032* R0=%reg1028* R1=%reg1029* R2 R3=%reg1031*
Killing last use: %reg1028
Allocating %reg1035 from QPR
Assigning %reg1035 to Q1
<< %D2<def>, %D3<def> = VLD1q16 %R0<kill>, 0, pred:14, pred:%reg0, %Q1<imp-def>

llvm-svn: 104056
2010-05-18 21:10:50 +00:00
Jakob Stoklund Olesen 585792738b Pull the UsedInInstr.test() calls into calcSpillCost() and remember aliases.
This fixes the miscompilations of MultiSource/Applications/JM/l{en,de}cod.
Clang now successfully self hosts in a debug build with the fast register allocator.

llvm-svn: 103975
2010-05-17 21:02:08 +00:00
Jakob Stoklund Olesen 70563bbba5 Remove debug option. Add comment on spill order determinism.
llvm-svn: 103961
2010-05-17 20:01:22 +00:00
Jakob Stoklund Olesen 176a9c4272 Avoid allocating the same physreg to multiple virtregs in one instruction.
While that approach works wonders for register pressure, it tends to break
everything.

This should unbreak the arm-linux builder and fix a number of miscompilations.

llvm-svn: 103946
2010-05-17 17:18:59 +00:00
Jakob Stoklund Olesen f5e8c86424 Minor optimizations. DenseMap::begin() is surprisingly slow on an empty map.
llvm-svn: 103940
2010-05-17 15:30:37 +00:00
Jakob Stoklund Olesen 6649cdaa23 Extract spill cost calculation to a new method, and use definePhysReg() to clear
out aliases when allocating. Clean up allocVirtReg().

Use calcSpillCost() to allow more aggressive hinting. Now the hint is always
taken unless blocked by a reserved register. This leads to more coalescing,
lower register pressure, and less spilling.

llvm-svn: 103939
2010-05-17 15:30:32 +00:00
Jakob Stoklund Olesen 7d22a81b61 Only use clairvoyance when defining a register, and then only if it has one use.
This makes allocation independent on the ordering of use-def chains.

llvm-svn: 103935
2010-05-17 04:50:57 +00:00
Jakob Stoklund Olesen f915d14955 Eliminate a hash table probe when killing virtual registers.
llvm-svn: 103934
2010-05-17 03:26:09 +00:00
Jakob Stoklund Olesen edd3d9db13 Execute virtreg kills immediately instead of after processing all uses.
This is safe to do because the physreg has been marked UsedInInstr and the kill flag will be set on the last operand using the virtreg if there are more then one.

llvm-svn: 103933
2010-05-17 03:26:06 +00:00
Jakob Stoklund Olesen e07a408afc Sprinkle superregister <imp-def> and <imp-kill> operands when dealing with subregister indices.
llvm-svn: 103931
2010-05-17 02:49:21 +00:00
Jakob Stoklund Olesen 1069a09691 Now that we don't keep live registers across calls, there is not reason to go
through the very long list of call-clobbered registers. We just assume all
registers are clobbered.

llvm-svn: 103930
2010-05-17 02:49:18 +00:00
Jakob Stoklund Olesen 397068de06 Boldly attempt consistent capitalization. Functional changes unintended.
llvm-svn: 103929
2010-05-17 02:49:15 +00:00
Jakob Stoklund Olesen 8044c989d1 Spill and kill all virtual registers across a call.
Debug code doesn't use callee saved registers anyway, and the code is simpler this way. Now spillVirtReg always kills, and the isKill parameter is not needed.

llvm-svn: 103927
2010-05-17 02:07:32 +00:00
Jakob Stoklund Olesen d2ef1fbc82 Reduce hashtable probes by using DenseMap::insert() for lookup.
llvm-svn: 103926
2010-05-17 02:07:29 +00:00
Jakob Stoklund Olesen fb43e065a4 Make MBB a class member instead of passing it around everywhere.
llvm-svn: 103925
2010-05-17 02:07:22 +00:00
Chandler Carruth 75142e6bfc Fix an GCC warning that seems to have actually caught a bug (!!!) in
a condition's grouping. Every other use of Allocatable.test(Hint) groups it the
same way as it is indented, so move the parentheses to agree with that
grouping.

llvm-svn: 103869
2010-05-15 10:23:23 +00:00
Jakob Stoklund Olesen 84ce290822 Calculate liveness on the fly for local registers.
When working top-down in a basic block, substituting physregs for virtregs, the use-def chains are kept up to date. That means we can recognize a virtreg kill by the use-def chain becoming empty.

This makes the fast allocator independent of incoming kill flags.

llvm-svn: 103866
2010-05-15 06:09:08 +00:00
Jakob Stoklund Olesen 089e9421d2 Don't bother spilling before a return
llvm-svn: 103831
2010-05-14 22:40:43 +00:00
Jakob Stoklund Olesen b16013936b Track allocatable instead of reserved regs, and never take an unallocatable hint.
llvm-svn: 103828
2010-05-14 22:02:56 +00:00
Jakob Stoklund Olesen e68b814c8c Avoid scanning the long tail of physreg operands on calls
llvm-svn: 103823
2010-05-14 21:55:52 +00:00
Jakob Stoklund Olesen 6c038e33e9 Count coalesced copies
llvm-svn: 103821
2010-05-14 21:55:50 +00:00
Jakob Stoklund Olesen 33af4fcdea Allow virtreg redefines when verifying for RegAllocFast
llvm-svn: 103820
2010-05-14 21:55:44 +00:00
Jakob Stoklund Olesen 670492c8ee When verifying two-address instructions, check the following:
- Kill is implicit when use and def registers are identical.
- Only virtual registers can differ.

Add a -verify-fast-regalloc to run the verifier before the fast allocator.

llvm-svn: 103797
2010-05-14 20:28:32 +00:00
Jakob Stoklund Olesen 4d5c1061e3 Simplify the handling of physreg defs and uses in RegAllocFast.
This adds extra security against using clobbered physregs, and it adds kill
markers to physreg uses.

llvm-svn: 103784
2010-05-14 18:03:25 +00:00
Jakob Stoklund Olesen ceb5a7ada2 Enable opportunistic coalescing
llvm-svn: 103764
2010-05-14 04:30:51 +00:00
Jakob Stoklund Olesen 68c235bd4d Trust kill flags from isel and later passes.
llvm-svn: 103748
2010-05-14 00:02:23 +00:00
Jakob Stoklund Olesen 41f8dc897e Fix an embarrassing runtime regression for RegAllocFast.
This loop is quadratic in the capacity for a DenseMap:

  while(!map.empty())
    map.erase(map.begin());

Instead we now do a normal begin() - end() iteration followed by map.clear().
That also has the nice sideeffect of shrinking the map capacity on demand.

llvm-svn: 103747
2010-05-14 00:02:20 +00:00
Jakob Stoklund Olesen d74a564feb Clean up RegAllocFast debug output
llvm-svn: 103739
2010-05-13 20:43:17 +00:00
Jakob Stoklund Olesen 0ba2e2a568 Take allocation hints from copy instructions to/from physregs.
This causes way more identity copies to be generated, ripe for coalescing.

llvm-svn: 103686
2010-05-13 00:19:43 +00:00
Jakob Stoklund Olesen 680b74941f More asserts around physreg uses
llvm-svn: 103685
2010-05-13 00:19:39 +00:00
Jakob Stoklund Olesen 955a0e71e9 Make sure to add kill flags to the last use of a virtreg when it is redefined.
The X86 floating point stack pass and others depend on good kill flags.

llvm-svn: 103635
2010-05-12 18:46:03 +00:00
Jakob Stoklund Olesen f98a355f9b Avoid scoping issues, fix buildbots
llvm-svn: 103530
2010-05-12 00:11:19 +00:00
Daniel Dunbar 69b8f42400 Make Clang happy.
llvm-svn: 103528
2010-05-11 23:53:13 +00:00
Jakob Stoklund Olesen 11f1ba1535 Store the Dirty bit in the LiveReg structure instead of a bit vector.
llvm-svn: 103522
2010-05-11 23:24:47 +00:00
Jakob Stoklund Olesen 132668102e Keep track of the last place a live virtreg was used.
This allows us to add accurate kill markers, something the scavenger likes.
Add some more tests from ARM that needed this.

llvm-svn: 103521
2010-05-11 23:24:45 +00:00
Jakob Stoklund Olesen 3f0241e0f9 Simplify the tracking of used physregs to a bulk bitor followed by a transitive
closure after allocating all blocks.

Add a few more test cases for -regalloc=fast.

llvm-svn: 103500
2010-05-11 20:30:28 +00:00
Jakob Stoklund Olesen f1b3029a54 Mostly rewrite RegAllocFast.
Sorry for the big change. The path leading up to this patch had some TableGen
changes that I didn't want to commit before I knew they were useful. They
weren't, and this version does not need them.

The fast register allocator now does no liveness calculations. Instead it relies
on kill flags provided by isel. (Currently those kill flags are also ignored due
to isel bugs). The allocation algorithm is supposed to work with any subset of
valid kill flags. More kill flags simply means fewer spills inserted.

Registers are allocated from a working set that contains no aliases. That means
most allocations can be done directly without expensive alias checks. When the
working set runs out of registers we do the full alias check to find new free
registers.

llvm-svn: 103488
2010-05-11 18:54:45 +00:00
Evan Cheng 1ef0660836 It's not safe eliminate copies where src and dst have different sub-register indices.
llvm-svn: 103450
2010-05-11 00:20:03 +00:00
Evan Cheng efb126a665 Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
llvm-svn: 103193
2010-05-06 19:06:44 +00:00
Jakob Stoklund Olesen 14b1d758c6 Run LiveVariables instead of computing liveness locally in -regalloc=fast.
This actually makes everything slower, but the plan is to have isel add <kill>
flags the way it is already adding <dead> flags. Then LiveVariables can be
removed again.

When ignoring the time spent in LiveVariables, -regalloc=fast is now twice as
fast as -regalloc=local.

llvm-svn: 102034
2010-04-21 23:18:07 +00:00
Jakob Stoklund Olesen 8a070a540d Add fast register allocator, enabled with -regalloc=fast.
So far this is just a clone of -regalloc=local that has been lobotomized to run
25% faster. It drops the least-recently-used calculations, and is just plain
stupid when it runs out of registers.

The plan is to make this go even faster for -O0 by taking advantage of the short
live intervals in unoptimized code. It should not be necessary to calculate
liveness when most virtual registers are killed 2-3 instructions after they are
born.

llvm-svn: 102006
2010-04-21 18:02:42 +00:00