5 Commits

Author	SHA1	Message	Date
Eric Christopher	b006fc9c07	Rewrite stack callee saved spills and restores to use push/pop instructions. ... Remove movePastCSLoadStoreOps and associated code for simple pointer increments. Update routines that depended upon other opcodes for save/restore. Adjust all testcases accordingly. llvm-svn: 119725	2010-11-18 19:40:05 +00:00
Jim Grosbach	0b7fda23cc	Revert r114340 (improvements in Darwin function prologue/epilogue), as it broke ... assumptions about stack layout. Specifically, LR must be saved next to FP. llvm-svn: 118026	2010-11-02 17:35:25 +00:00
Jim Grosbach	94dfd6fc4f	Simplify ARM callee-saved register handling by removing the distinction ... between the high and low registers for prologue/epilogue code. This was a Darwin-only thing that wasn't providing a realistic benefit anymore. Combining the save areas simplifies the compiler code and results in better ARM/Thumb2 codegen. For example, previously we would generate code like: push {r4, r5, r6, r7, lr} add r7, sp, #12 stmdb sp!, {r8, r10, r11} With this change, we combine the register saves and generate: push {r4, r5, r6, r7, r8, r10, r11, lr} add r7, sp, #12 rdar://8445635 llvm-svn: 114340	2010-09-20 19:32:20 +00:00
Evan Cheng	bf4070756f	Teach if-converter to be more careful with predicating instructions that would ... take multiple cycles to decode. For the current if-converter clients (actually only ARM), the instructions that are predicated on false are not nops. They would still take machine cycles to decode. Micro-coded instructions such as LDM / STM can potentially take multiple cycles to decode. If-converter should take treat them as non-micro-coded simple instructions. llvm-svn: 113570	2010-09-10 01:29:16 +00:00
Evan Cheng	37bb617f8a	Tail merging pass shall not break up IT blocks. rdar://8115404 ... llvm-svn: 106517	2010-06-22 01:18:16 +00:00