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90 Commits

Author SHA1 Message Date
Andrew Lenharth f520093eb3 add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG 
llvm-svn: 25011
 2005-12-25 17:36:48 +00:00
Andrew Lenharth 0fce613eff All that just to lower div and rem 
llvm-svn: 25008
 2005-12-25 01:34:27 +00:00
Andrew Lenharth 5b18ed9e60 All addressing modes are now exposed. The only remaining relocated forms 
are for function prologue.

TODO: move external symbols over to using RelLit.
    : have a pattern that matches constpool|globaladdr
    : have a pattern that matches (add x imm) -> x, imm or (...) -> ..., 0
llvm-svn: 25003
 2005-12-24 08:29:32 +00:00
Andrew Lenharth b9aaea3564 Unify the patterns for loads and stores. Now offset addressing should be 
supported.  This almost completes memory operations.

llvm-svn: 25002
 2005-12-24 07:34:33 +00:00
Andrew Lenharth 4621488965 Let's see if we can break things. 
Lower GOT relative addresses to Lo and HI.
Update both ISels to select them when they can.
Saves instructions here and there.

llvm-svn: 25001
 2005-12-24 05:36:33 +00:00
Andrew Lenharth 636e1aed43 move loads and stores over. Smart addr selection comming 
llvm-svn: 25000
 2005-12-24 03:41:56 +00:00
Andrew Lenharth cd54254af3 fix FP selects 
llvm-svn: 24672
 2005-12-12 20:30:09 +00:00
Andrew Lenharth 20d0b81c04 FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values. Don't see why myself 
llvm-svn: 24658
 2005-12-11 03:54:31 +00:00
Andrew Lenharth 87bf2234b5 it helps if your conditionals are not reversed 
llvm-svn: 24641
 2005-12-09 00:45:42 +00:00
Andrew Lenharth 26473b6b58 fix divide and remainder 
llvm-svn: 24628
 2005-12-06 23:27:39 +00:00
Andrew Lenharth e788bbf6ef added instructions with inverted immediates 
llvm-svn: 24614
 2005-12-06 00:33:53 +00:00
Andrew Lenharth 08c4a775e6 yea, it helps to have your path set right when testing 
llvm-svn: 24613
 2005-12-05 23:41:45 +00:00
Andrew Lenharth 3c7c4d7508 These never trigger, but whatever 
llvm-svn: 24612
 2005-12-05 23:19:44 +00:00
Andrew Lenharth 5bfcd1e63a move this over to the dag 
llvm-svn: 24609
 2005-12-05 20:50:53 +00:00
Andrew Lenharth ede966e8ee Make typesafe that which isn't: FCMOVxx 
llvm-svn: 24536
 2005-11-30 17:11:20 +00:00
Andrew Lenharth 873ed82a36 FPSelect and more custom lowering 
llvm-svn: 24535
 2005-11-30 16:10:29 +00:00
Andrew Lenharth 6db615df14 All sorts of stuff. 
Getting in on the custom lowering thing, yay
evilness with fp setcc, yuck
trivial int select, hmmm
in memory args for functions, yay
DIV and REM, always handy.  They should be custom lowered though.

Lots more stuff compiles now (go go single source!).  Of course, none of it
probably works, but that is what the nightly tester can find out :)

llvm-svn: 24533
 2005-11-30 07:19:56 +00:00
Andrew Lenharth 0294e33ea4 massive DAGISel patch. lots and lots more stuff compiles now 
llvm-svn: 24483
 2005-11-22 04:20:06 +00:00
Andrew Lenharth 01aa56397d continued readcyclecounter support 
llvm-svn: 24300
 2005-11-11 16:47:30 +00:00
Andrew Lenharth 97a7fcfd2b whatever. Intermediate patch to see what breaks. Seems ok. 
llvm-svn: 24260
 2005-11-09 19:17:08 +00:00
Andrew Lenharth 381cab36ed int comparison patterns 
llvm-svn: 24020
 2005-10-26 18:44:45 +00:00
Andrew Lenharth 7ac194560e Simplify instinfo, set random bits on more fp insts, and fix 1 opcode 
llvm-svn: 24014
 2005-10-26 17:41:46 +00:00
Andrew Lenharth c6072af580 Add several things. 
loads
branches
setcc
working calls
Global address
External addresses

now I can manage malloc calls.

llvm-svn: 23887
 2005-10-23 03:43:48 +00:00
Andrew Lenharth 5a990417f8 Well, the Constant matching pattern works. Can't say much about calls or globals yet. 
llvm-svn: 23884
 2005-10-22 22:06:58 +00:00
Andrew Lenharth a099c0131e byte zap not immediate goodness 
llvm-svn: 23855
 2005-10-21 01:24:05 +00:00
Andrew Lenharth a6a23b5874 Inst cleanup. As a bonus, operands are in the correct order for cmovs. Expect new stuff to pass in the JIT tonight 
llvm-svn: 23852
 2005-10-20 23:58:36 +00:00
Andrew Lenharth d4c0ed74e4 added a few 1 operand form stuff. Seems to break regalloc on alpha. sigh 
llvm-svn: 23849
 2005-10-20 19:39:24 +00:00
Andrew Lenharth eb0ad1863b Sounds good, finish the intop conversion. 
llvm-svn: 23843
 2005-10-20 14:42:48 +00:00
Chris Lattner fd07fcda67 Add some pattern fragments to simplify the repetitive parts of the patterns 
for some common ops and use them for a few examples.  Andrew, if you like
this, feel free to convert the rest over, if you hate it, feel free to
revert.

llvm-svn: 23837
 2005-10-20 04:21:06 +00:00
Chris Lattner cd4be8798f simplify this a bit by using immediates 
llvm-svn: 23836
 2005-10-20 03:57:03 +00:00
Andrew Lenharth 7b69867052 ret 0; works, not much else 
still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.

llvm-svn: 23832
 2005-10-20 00:28:31 +00:00
Andrew Lenharth 332df13b9e remove VAX compatibility instruction, we will never use this 
llvm-svn: 23643
 2005-10-06 16:53:32 +00:00
Chris Lattner 8cbddfc8c5 mark variable arity instructions as such. Alpha wins the battle for 
cleanest backend in this metric :)

llvm-svn: 22893
 2005-08-19 00:51:37 +00:00
Andrew Lenharth 8c6701be6e match gcc's use of tabs, makes diffs easier 
llvm-svn: 22764
 2005-08-12 16:14:08 +00:00
Andrew Lenharth ae97fff758 update function codes to reflect /su flags that have been added since this was written 
llvm-svn: 22571
 2005-08-01 20:06:01 +00:00
Andrew Lenharth 1ec48e8683 support bsr, and more .td simplification 
llvm-svn: 22543
 2005-07-28 18:14:47 +00:00
Andrew Lenharth 02daecc7c6 simpilfy instruction encoding (and make the lines way shorter, aka Misha happification) 
llvm-svn: 22499
 2005-07-22 20:50:29 +00:00
Andrew Lenharth 21da9b669e simplify call code, remove pseudo ops for div and rem, track more loads and stores 
llvm-svn: 22323
 2005-07-01 19:14:02 +00:00
Andrew Lenharth dd55b1566b simplify call code, remove pseudo ops for div and rem, track more loads and stores 
llvm-svn: 22322
 2005-07-01 19:12:13 +00:00
Andrew Lenharth 2edc1881ac restore old srcValueNode behavior and try to to work around it 
llvm-svn: 22315
 2005-06-29 18:54:02 +00:00
Andrew Lenharth 47a9c4715a support more relocations for stores also 
llvm-svn: 22306
 2005-06-29 00:39:17 +00:00
Andrew Lenharth 1ef3c0c798 Get rid of all symbolic loads. I now do gernate all relocations sequences 
rather than relying on the assembler.  Only a few more pseudo instructions
left.  Also merge load code paths.

llvm-svn: 22305
 2005-06-29 00:31:08 +00:00
Andrew Lenharth 595646f934 get rid of another pseudo op 
llvm-svn: 22299
 2005-06-27 21:11:40 +00:00
Andrew Lenharth 1291a85883 generate address of constant pool entries 
llvm-svn: 22298
 2005-06-27 21:02:56 +00:00
Andrew Lenharth 7aba58ab89 Reduce use of pseudo ops 
Namely, output the rellocation flags explicitly when loading constants.
Added benifit: save a load when loading from the constant pool.

llvm-svn: 22296
 2005-06-27 17:15:36 +00:00
Andrew Lenharth af1e825112 remove a pseudo instruction, make ret always right, and fix vararg chains 
llvm-svn: 22276
 2005-06-23 23:42:05 +00:00
Andrew Lenharth cf9008afea Make it easier to find alpha stuff in doxygen, and fixup labeling 
of memory instructions in the assembly, to allow later linking
of traces with LLVM Value*s.

llvm-svn: 22271
 2005-06-22 17:19:45 +00:00
Andrew Lenharth c74fe84456 allow marking of loads and stores in the instruction stream with enough information to reconstruct the Value* if it existed 
llvm-svn: 22195
 2005-06-06 19:03:55 +00:00
Andrew Lenharth 5e177826fd Implement count leading zeros (ctlz), count trailing zeros (cttz), and count 
population (ctpop).  Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.

More coming soon.

llvm-svn: 21676
 2005-05-03 17:19:30 +00:00
Andrew Lenharth 00ce283b3f fix calls 
llvm-svn: 21303
 2005-04-14 17:34:20 +00:00