f520093eb3
add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG
...
llvm-svn: 25011
2005-12-25 17:36:48 +00:00
6b240e55d1
unbreak calls, a few more tests should run. Tomorrow: bugpoint!
...
llvm-svn: 25010
2005-12-25 14:09:08 +00:00
06dcc199f0
we don't feed our call instructions extra operands
...
llvm-svn: 25009
2005-12-25 14:07:01 +00:00
0fce613eff
All that just to lower div and rem
...
llvm-svn: 25008
2005-12-25 01:34:27 +00:00
0dc12c38e5
support targetexternalsym
...
llvm-svn: 25005
2005-12-24 23:36:59 +00:00
782b654e6f
Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass.
...
llvm-svn: 25004
2005-12-24 09:48:35 +00:00
5b18ed9e60
All addressing modes are now exposed. The only remaining relocated forms
...
are for function prologue.
TODO: move external symbols over to using RelLit.
: have a pattern that matches constpool|globaladdr
: have a pattern that matches (add x imm) -> x, imm or (...) -> ..., 0
llvm-svn: 25003
2005-12-24 08:29:32 +00:00
b9aaea3564
Unify the patterns for loads and stores. Now offset addressing should be
...
supported. This almost completes memory operations.
llvm-svn: 25002
2005-12-24 07:34:33 +00:00
4621488965
Let's see if we can break things.
...
Lower GOT relative addresses to Lo and HI.
Update both ISels to select them when they can.
Saves instructions here and there.
llvm-svn: 25001
2005-12-24 05:36:33 +00:00
636e1aed43
move loads and stores over. Smart addr selection comming
...
llvm-svn: 25000
2005-12-24 03:41:56 +00:00
9aea6e4691
Fix one of the things in the todo file, and get a bit closer to folding
...
constant offsets from statics into the address arithmetic.
llvm-svn: 24999
2005-12-24 01:00:15 +00:00
9ae486047e
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
...
* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
llvm-svn: 24997
2005-12-23 22:14:32 +00:00
4f52796f79
not a good idea
...
llvm-svn: 24991
2005-12-23 07:37:47 +00:00
5c59d49630
More X86 floating point patterns.
...
llvm-svn: 24990
2005-12-23 07:31:11 +00:00
8be8067b19
Operand 1 of TRUNCSTORE can be any of integer and floating point types.
...
llvm-svn: 24989
2005-12-23 07:30:30 +00:00
55823ae03f
fix something-o
...
llvm-svn: 24987
2005-12-23 07:08:39 +00:00
5427aab5f8
implement vaarg. Varargs now should work.
...
llvm-svn: 24986
2005-12-23 06:37:38 +00:00
5ee896aad9
implement vastart. The dag isel compiles this:
...
void test3(va_list Y);
void test2(int F, ...) {
va_list X;
va_start(X, F);
test3(X);
}
into this:
test2:
save -104, %o6, %o6
st %i5, [%i6+88]
st %i4, [%i6+84]
st %i3, [%i6+80]
st %i2, [%i6+76]
st %i1, [%i6+72]
add %i6, 72, %o0
st %o0, [%i6+-4]
call test3
nop
restore %g0, %g0, %g0
retl
nop
The simple isel emits:
test2:
save -96, %o6, %o6
st %i0, [%i6+68]
st %i1, [%i6+72]
st %i2, [%i6+76]
st %i3, [%i6+80]
st %i4, [%i6+84]
st %i5, [%i6+88]
or %g0, 1, %l0
or %g0, 4, %l1
umul %l0, %l1, %l0
add %l0, 7, %l0
and %l0, -8, %l0
sub %o6, %l0, %o6
add %o6, 96, %l0
add %i6, 72, %l1
st %l1, [%l0]
ld [%l0], %o0
call test3
nop
restore %g0, %g0, %g0
retl
nop
llvm-svn: 24985
2005-12-23 06:24:04 +00:00
6e6d5a1fa1
remove benchmark list, remove issues addressed by the dag-dag isel
...
llvm-svn: 24984
2005-12-23 06:09:30 +00:00
30107e65c8
make sure bit_convert's are expanded
...
llvm-svn: 24979
2005-12-23 05:15:23 +00:00
c46fc2482c
make sure bit_converts are expanded
...
llvm-svn: 24978
2005-12-23 05:13:35 +00:00
5ce81edbf6
fix the int<->fp instructions, which apparently take a single float register
...
to represent the int part (because it's always 32-bits)
llvm-svn: 24976
2005-12-23 05:00:16 +00:00
c9849274bd
Use BIT_CONVERT to simplify this code
...
llvm-svn: 24975
2005-12-23 02:31:39 +00:00
f474034432
Simplify some code by using BIT_CONVERT
...
llvm-svn: 24974
2005-12-23 00:59:59 +00:00
4c141d047c
clean up .td file by using evan's new FLAG thing
...
llvm-svn: 24967
2005-12-22 21:18:39 +00:00
177d7af5d5
remove dead code
...
llvm-svn: 24965
2005-12-22 21:16:08 +00:00
6b0325aa26
fix handling of weak linkage
...
llvm-svn: 24964
2005-12-22 21:15:17 +00:00
ffe3542726
move some random notes out of my email into someplace useful
...
llvm-svn: 24956
2005-12-22 17:19:28 +00:00
644e7db818
this is a hack, which may or may not hang around. In short:
...
whimper out of doing things the Right Way, and hack up a generic
'BRCALL' instruction, that gets generated when calls are lowered.
This gets selected by hand in the DAG isel, where it gets turned
into real (i.e. in tablegen) br.call instructions.
BUG: this dies on void calls, but seems to work otherwise?
llvm-svn: 24952
2005-12-22 13:29:14 +00:00
3692fa14b8
we can't do this directly in lowering, so we need this case
...
llvm-svn: 24951
2005-12-22 07:14:45 +00:00
3608ab87c0
oops, back this out
...
llvm-svn: 24950
2005-12-22 07:13:51 +00:00
b1d57fb175
we can't all have brains now, can we
...
llvm-svn: 24948
2005-12-22 06:41:39 +00:00
d0c146d59f
this should take care of calls to varadic functions, but it doesn.,t
...
BUG: calling printf(string, float) will load the float into the wrong
register, completely forget about loading the string, etce
llvm-svn: 24947
2005-12-22 06:39:57 +00:00
a8de8a5db4
we need to emit the getf.d instruction in lowering, so add it
...
to IA64ISD
llvm-svn: 24946
2005-12-22 06:38:38 +00:00
5ccf76fed3
I shoulda done this a *long* time ago (tm): implement calls properly,
...
i.e. r1/r12/rp are saved/restored regardless of scheduling/luck
TODO: calls to external symbols, indirect (function descriptor) calls,
performance (we're being paranoid right now)
BUG: the code for handling calls to vararg functions breaks if FP
args are passed (this will make printf() go haywire so a bunch of
tests will fail)
BUG: this seems to trigger some legalize nastiness
llvm-svn: 24942
2005-12-22 04:07:40 +00:00
8f6c86fe3b
kill SelectCALL() in the DAG isel, we handle this in lowering now, like
...
SPARCv8. (we copy sparcv8's workaround for tablegen not being nice about
ISD::CALL/TAILCALL)
llvm-svn: 24941
2005-12-22 03:58:17 +00:00
a743e00e7a
update tablegen files - nothing to see here
...
llvm-svn: 24939
2005-12-22 03:56:03 +00:00
dfad8ed54e
Bye bye HACKTROCITY.
...
llvm-svn: 24935
2005-12-22 02:26:21 +00:00
62fef13143
Added special flag node FLAG.
...
llvm-svn: 24934
2005-12-22 02:25:14 +00:00
1872908f3b
Lefted out TargetLowering::
...
llvm-svn: 24922
2005-12-21 23:14:54 +00:00
9cdc16c6d3
* Fix a GlobalAddress lowering bug.
...
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.
llvm-svn: 24921
2005-12-21 23:05:39 +00:00
02767195bb
Oops. Accidentally deleted RET pattern. It's still needed for return void;
...
llvm-svn: 24920
2005-12-21 22:22:16 +00:00
9e296bee9a
Disengage DEBUG_LOC from non-PPC targets.
...
llvm-svn: 24919
2005-12-21 20:51:37 +00:00
c1583dbd63
* Added support for X86 RET with an additional operand to specify number of
...
bytes to pop off stack.
* Added support for X86 SETCC.
llvm-svn: 24917
2005-12-21 20:21:51 +00:00
81f2653e45
add some nodes, forgot to commit this last night :(
...
llvm-svn: 24901
2005-12-21 16:22:46 +00:00
0dcdd83c0e
This was meant to go in
...
llvm-svn: 24900
2005-12-21 07:50:26 +00:00
f431ad4477
Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns
...
that were overloaded to work before and after the stackifier runs. With the
new clean world, it is possible to write patterns for these instructions: woo!
This also adds a few simple patterns here and there, though there are a lot
still missing. These should be easy to add though. :)
See the comments under "Floating Point Stack Support" for more details on
the new world order.
This patch as absolutely no effect on the generated code, woo!
llvm-svn: 24899
2005-12-21 07:47:04 +00:00
988827a482
Wrap some long lines: no functionality change
...
llvm-svn: 24898
2005-12-21 05:34:58 +00:00
72575d882b
remove dead code
...
llvm-svn: 24896
2005-12-21 05:27:51 +00:00
a2f308fc3e
Remove ISD::RET select code. Now tblgen'd.
...
llvm-svn: 24889
2005-12-21 02:41:57 +00:00
Andrew Lenharth