Commit Graph

333671 Commits

Author SHA1 Message Date
Guillaume Chatelet 3491109587 Rollback assumeAligned in MemorySanitizer
Summary: Rollback of parts of D71213. After digging more into the code I think we should leave 0 when creating the instructions (CreateMemcpy, CreateMaskedStore, CreateMaskedLoad). It's probably fine for MemorySanitizer because Alignement is resolved but I'm having a hard time convincing myself it has no impact at all (although tests are passing).

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71332
2019-12-11 14:25:21 +01:00
Adam Balogh 6e9c58946e [Analyzer] Iterator Modeling: Print Container Data and Iterator Positions when printing the Program State
Debugging the Iterator Modeling checker or any of the iterator checkers
is difficult without being able to see the relations between the
iterator variables and their abstract positions, as well as the abstract
symbols denoting the begin and the end of the container.

This patch adds the checker-specific part of the Program State printing
to the Iterator Modeling checker.
2019-12-11 14:20:17 +01:00
Raphael Isemann 3bf8558fbb [lldb][NFC] Remove ClangExternalASTSourceCommon::g_TotalSizeOfMetadata
Turns out this counter is doing literally nothing beside counting.
2019-12-11 14:05:43 +01:00
Andrzej Warzynski 65651f197a [AArch64][SVE] Add DAG combine rules for gather loads and sext/zext
Summary:
These changes allow us to support sign-extending gather loads with the
exisiting intrinsics (i.e. @llvm.aarch64.sve.ld1.gather.*).

Reviewers: sdesmalen, huntergr, kmclaughlin, efriedma, rengolin, rovka, dancgr, mgudim

Reviewed By: sdesmalen

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential revision: https://reviews.llvm.org/D70812
2019-12-11 12:56:18 +00:00
Alexey Bader cb30ad728f [SYCL] Add support for auxiliary triple specification to Frontend
Summary:
Add host predefined macros to compilation for SYCL device, which is
required for pre-processing host specific includes (e.g. system
headers).

Reviewers: ABataev, jdoerfert

Subscribers: ebevhan, Anastasia, cfe-commits, keryell, Naghasan, Fznamznon

Tags: #clang

Differential Revision: https://reviews.llvm.org/D71286

Signed-off-by: Alexey Bader <alexey.bader@intel.com>
2019-12-11 12:40:43 +03:00
Nicolai Hähnle f21c081b78 CodeGen: Allow annotations on globals in non-zero address space
Summary:
Attribute annotations are recorded in a special global composite variable
that points to annotation strings and the annotated objects.

As a restriction of the LLVM IR type system, those pointers are all
pointers to address space 0, so let's insert an addrspacecast when the
annotated global is in a non-0 address space.

Since this addrspacecast is only reachable from the global annotations
object, this should allow us to represent annotations on all globals
regardless of which addrspacecasts are usually legal for the target.

Reviewers: rjmccall

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D71208
2019-12-11 13:24:32 +01:00
LLVM GN Syncbot 5ceb36b212 gn build: Merge afb13afcf2 2019-12-11 12:07:57 +00:00
Simon Tatham d290424731 [ARM][MVE] Factor out an IntrinsicMX multiclass.
Summary:
The ACLE intrinsics for MVE contain a lot of pairs of functions with
`_m` and `_x` in the name, wrapping a predicated MVE instruction which
only partially overwrites its output register. They have the common
pattern that the `_m` variant takes an initial argument called
'inactive', of the same type as the return value, supplying the input
value of the output register, so that lanes disabled by the
predication will be taken from that parameter; the `_x` variant omits
that initial argument, and simply sets it to undef.

That common pattern is simple enough to wrap into a multiclass, which
should save a lot of effort in setting up all the rest of the `_x`
variants. In this commit I introduce `multiclass IntrinsicMX` in
`arm_mve_defs.td`, and convert existing generation of m/x pairs to use
it.

This allows me to remove the `PredicatedImmediateVectorShift`
multiclass (from D71065) completely, because the new multiclass makes
it so much simpler that it's not worth bothering to define it at all.

Reviewers: MarkMurrayARM, miyuki

Reviewed By: MarkMurrayARM, miyuki

Subscribers: kristof.beyls, dmgreen, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D71335
2019-12-11 12:07:26 +00:00
Georgii Rymar 9a5c849991 [llvm-readobj][llvm-readelf] - Remove excessive empty lines when reporting errors and warnings.
After recent changes it is now seems possible to get rid of
printing '\n' before each error and warning. This makes the output
cleaner.

Differential revision: https://reviews.llvm.org/D71246
2019-12-11 15:06:33 +03:00
Oliver Stannard 6ae3d310bd Revert "Reland [AArch64][MachineOutliner] Return address signing for outlined functions"
This reverts commit cec2d5c174.

Reverting because this is still creating outlined functions with return
address signing instructions with mismatches SP values. For example:

  int *volatile v;

  void foo(int x) {
    int a[x];
    v = &a[0];
    v = &a[0];
    v = &a[0];
    v = &a[0];
    v = &a[0];
    v = &a[0];
  }

  void bar(int x) {
    int a[x];
    v = 0;
    v = &a[0];
    v = &a[0];
    v = &a[0];
    v = &a[0];
    v = &a[0];
  }

This generates these two outlined functions, both of which modify SP
between the paciasp and retaa instructions:

  $ clang --target=aarch64-arm-none-eabi -march=armv8.3-a -c test2.c -o - -S -Oz -mbranch-protection=pac-ret+leaf
  ...
  OUTLINED_FUNCTION_0:                    // @OUTLINED_FUNCTION_0
          .cfi_sections .debug_frame
          .cfi_startproc
  // %bb.0:
          paciasp
          .cfi_negate_ra_state
          mov     w8, w0
          lsl     x8, x8, #2
          add     x8, x8, #15             // =15
          mov     x9, sp
          and     x8, x8, #0x7fffffff0
          sub     x8, x9, x8
          mov     x29, sp
          mov     sp, x8
          adrp    x9, v
          retaa
  ...
  OUTLINED_FUNCTION_1:                    // @OUTLINED_FUNCTION_1
          .cfi_startproc
  // %bb.0:
          paciasp
          .cfi_negate_ra_state
          str     x8, [x9, :lo12:v]
          str     x8, [x9, :lo12:v]
          str     x8, [x9, :lo12:v]
          str     x8, [x9, :lo12:v]
          str     x8, [x9, :lo12:v]
          mov     sp, x29
          retaa
2019-12-11 12:06:20 +00:00
Simon Tatham 1fed9a0c0c [TableGen] Add bang-operators !getop and !setop.
Summary:
These allow you to get and set the operator of a dag node, without
affecting its list of arguments.

`!getop` is slightly fiddly because in many contexts you need its
return value to have a static type more specific than 'any record'. It
works to say `!cast<BaseClass>(!getop(...))`, but it's cumbersome, so
I made `!getop` take an optional type suffix itself, so that can be
written as the shorter `!getop<BaseClass>(...)`.

Reviewers: hfinkel, nhaehnle

Reviewed By: nhaehnle

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71191
2019-12-11 12:05:22 +00:00
Adam Balogh afb13afcf2 [Analyzer][NFC] Iterator Checkers - Separate iterator modeling and the actual checkers
A monolithic checker class is hard to maintain. This patch splits it up
into a modeling part, the three checkers and a debug checker. The common
functions are moved into a library.

Differential Revision: https://reviews.llvm.org/D70320
2019-12-11 13:06:19 +01:00
Adam Balogh 170ee645f4 [clang-tidy] Link shared library clangTidyOpenMPModule to library LLVMFrontendOpenMP
Building shared libs was broken, it is fixed now.
2019-12-11 12:37:22 +01:00
Kerry McLaughlin 3f5bf35f86 [AArch64][SVE] Implement intrinsics for non-temporal loads & stores
Summary:
Adds the following intrinsics:
  - llvm.aarch64.sve.ldnt1
  - llvm.aarch64.sve.stnt1

This patch creates masked loads and stores with the
MONonTemporal flag set when used with the intrinsics above.

Reviewers: sdesmalen, paulwalker-arm, dancgr, mgudim, efriedma, rengolin

Reviewed By: efriedma

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cfe-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71000
2019-12-11 11:13:51 +00:00
czhengsz bf4580b7e7 [PowerPC][NFC] add test case for lwa - loop ds form prep 2019-12-11 06:10:11 -05:00
Sjoerd Meijer 0216854917 [Clang] Pragma vectorize_width() implies vectorize(enable)
Let's try this again; this has been reverted/recommited a few times. Last time
this got reverted because for this loop:

  void a() {
    #pragma clang loop vectorize(disable)
    for (;;)
      ;
  }

vectorisation was incorrectly enabled and the vectorize.enable metadata was set
due to a logic error. But with this fixed, we now imply vectorisation when:

1) vectorisation is enabled, which means: VectorizeWidth > 1,
2) and don't want to add it when it is disabled or enabled, otherwise we would
   be incorrectly setting it or duplicating the metadata, respectively.

This should fix PR27643.

Differential Revision: https://reviews.llvm.org/D69628
2019-12-11 10:37:40 +00:00
Raphael Isemann 987e7323fb [lldb][NFC] Cleanup includes in FormatManagerTests.cpp 2019-12-11 11:33:19 +01:00
Sjoerd Meijer d97cf1f889 [ARM][LowOverheadLoops] Remove dead loop update instructions.
After creating a low-overhead loop, the loop update instruction was still
lingering around hurting performance. This removes dead loop update
instructions, which in our case are mostly SUBS instructions.

To support this, some helper functions were added to MachineLoopUtils and
ReachingDefAnalysis to analyse live-ins of loop exit blocks and find uses
before a particular loop instruction, respectively.

This is a first version that removes a SUBS instruction when there are no other
uses inside and outside the loop block, but there are some more interesting
cases in test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll which
shows that there is room for improvement. For example, we can't handle this
case yet:

    ..
    dlstp.32  lr, r2
  .LBB0_1:
    mov r3, r2
    subs  r2, #4
    vldrh.u32 q2, [r1], #8
    vmov  q1, q0
    vmla.u32  q0, q2, r0
    letp  lr, .LBB0_1
  @ %bb.2:
    vctp.32 r3
    ..

which is a lot more tricky because r2 is not only used by the subs, but also by
the mov to r3, which is used outside the low-overhead loop by the vctp
instruction, and that requires a bit of a different approach, and I will follow
up on this.

Differential Revision: https://reviews.llvm.org/D71007
2019-12-11 10:20:19 +00:00
Simon Tatham bd0f271c9e [ARM][MVE] Add intrinsics for immediate shifts. (reland)
This adds the family of `vshlq_n` and `vshrq_n` ACLE intrinsics, which
shift every lane of a vector left or right by a compile-time
immediate. They mostly work by expanding to the IR `shl`, `lshr` and
`ashr` operations, with their second operand being a vector splat of
the immediate.

There's a fiddly special case, though. ACLE specifies that the
immediate in `vshrq_n` can take values up to //and including// the bit
size of the vector lane. But LLVM IR thinks that shifting right by the
full size of the lane is UB, and feels free to replace the `lshr` with
an `undef` half way through the optimization pipeline. Hence, to keep
this legal in source code, I have to detect it at codegen time.
Logical (unsigned) right shifts by the element size are handled by
simply emitting the zero vector; arithmetic ones are converted into a
shift of one bit less, which will always give the same output.

In order to do that check, I also had to enhance the tablegen
MveEmitter so that it can cope with converting a builtin function's
operand into a bare integer to pass to a code-generating subfunction.
Previously the only bare integers it knew how to handle were flags
generated from within `arm_mve.td`.

Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard

Reviewed By: dmgreen, MarkMurrayARM

Subscribers: echristo, hokein, rdhindsa, kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D71065
2019-12-11 10:10:09 +00:00
Pavel Labath c8b74ee264 [lldb/DWARF] Add support for DW_AT_loclists_base&DW_FORM_loclistx
Summary:
This adds support for DWARF5 location lists which are specified
indirectly, via an index into the debug_loclists offset table. This
includes parsing the DW_AT_loclists_base attribute which determines the
location of this offset table, and support for new form DW_FORM_loclistx
which is used in conjuction with DW_AT_location to refer to the location
lists in this way.

The code uses the llvm class to parse the offset information, and I've
also tried to structure it similarly to how the relevant llvm
functionality works.

Reviewers: JDevlieghere, aprantl, clayborg

Subscribers: lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D71268
2019-12-11 11:06:17 +01:00
QingShan Zhang 46822083ef [NFC] Correct the example in the comments of JSON.h to avoid mislead
user
2019-12-11 10:03:34 +00:00
Sam Parker ee7579409b [ARM][TypePromotion] Enable by default
Enable the TypePromotion pass my default (again).

This patch was originally committed in 393dacacf7.
This patch was reverted in a38396939c.

Differential Revision: https://reviews.llvm.org/D70998
2019-12-11 10:00:16 +00:00
QingShan Zhang eba7cbd3d0 [NFC][PowerPC] Remove the dead conditions in the if(cond) 2019-12-11 09:57:06 +00:00
Florian Hahn b48b4ed1a0 [MCRegInfo] Add sub_and_superregs_inclusive iterator range.
Reviewers: evandro, qcolombet, paquette, MatzeB, arsenm

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D70566
2019-12-11 09:53:19 +00:00
Haojian Wu f0004aad55 [clangd] Deduplicate refs from index for cross-file rename.
Summary:
If the index returns duplicated refs, it will trigger the assertion in
BuildRenameEdit (we expect the processing position is always larger the
the previous one, but it is not true if we have duplication), and also
breaks our heuristics.

This patch make the code robost enough to handle duplications, also
save some cost of redundnat llvm::sort.

Though clangd's index doesn't return duplications, our internal index
kythe will.

Reviewers: ilya-biryukov

Subscribers: MaskRay, jkorous, mgrang, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D71300
2019-12-11 10:52:13 +01:00
Andrzej Warzynski 1eecbda087 [AArch64][SVE] Move TableGen class definitions for gather loads (NFC)
Move 2 intrinsic class definitions so that they're all clustered in
one place.

Patch submitted to test commit access.
2019-12-11 09:48:48 +00:00
shkzhang 1408e7e175 [PowerPC] [CodeGen] Use MachineBranchProbabilityInfo in EarlyIfPredicator to avoid the potential bug
Summary:
In the function `EarlyIfPredicator::shouldConvertIf()`, we call
`TII->isProfitableToIfCvt()` with `BranchProbability::getUnknown()`, it may
cause the potential assertion error for those hook which use `BranchProbability`
in `isProfitableToIfCvt()`, for example `SystemZ`.
`SystemZ` use `Probability < BranchProbability(1, 8))` in the function
`SystemZInstrInfo::isProfitableToIfCvt()`, if we call this function with
`BranchProbability::getUnknown()`, it will cause assertion error.

This patch is to fix the potential bug.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D71273
2019-12-11 04:46:00 -05:00
Florian Hahn 11f311875f [LiveRegUnits] Add phys_regs_and_masks iterator range (NFC).
This iterator range just includes physical registers and register masks,
which are interesting when dealing with register liveness.

Reviewers: evandro, t.p.northover, paquette, MatzeB, arsenm

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D70562
2019-12-11 09:34:42 +00:00
Georgii Rymar 445c3fdd2a [llvm-readelf] - Do no print an empty symbol version as "<corrupt>"
It is discussed here https://reviews.llvm.org/D71118#inline-643172

Currently when a version is empty, llvm-readelf prints:
"000:   0 (*local*)       2 (<corrupt>)"

But GNU readelf does not treat empty section as corrupt.
There is no sense in having empty versions anyways it seems, but
this change is for consistency with GNU.

Differential revision: https://reviews.llvm.org/D71243
2019-12-11 12:24:37 +03:00
Alexey Lapshin 21bc895866 [DWARF5][SplitDwarf] Set default state for -fsplit-dwarf-inlining to be false.
The -fsplit-dwarf-inlining option does not conform to DWARF5 standard.
It creates children for Skeleton compilation unit. We need default behavior
to be DWARF5 compatible. Thus set default state for -fsplit-dwarf-inlining
into "false".

Differential Revision: https://reviews.llvm.org/D71304
2019-12-11 12:18:46 +03:00
Ilya Biryukov f7c8ace4a5 [CodeComplete] Fix a crash in preferred type and signature help
Summary: Null type pointers could be dereferenced in some cases.

Reviewers: kadircet, sammccall

Reviewed By: sammccall

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D71329
2019-12-11 09:43:28 +01:00
Guillaume Chatelet 8a7c52bc22 [Alignment][NFC] Introduce Align in SROA
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71277
2019-12-11 09:34:38 +01:00
Martin Storsjö af39708c2d [llvm-readobj] Fix/improve printing WinEH unwind info for linked PE images
ARMWinEHPrinter was already designed to handle linked PE images
(since d2941b43f4), but resolving symbols didn't consistently
take the image base into account (as linked images seldom have a
symbol table, except for in MinGW setups).

Win64EHDumper wasn't really designed to handle linked images (it would
crash if executed on such a file), but a few concepts (getSymbol,
taking a virtual address instead of a relocation, and
getSectionContaining for finding the section containing a certain
virtual address) can be borrowed from ARMWinEHPrinter.

Adjust ARMWinEHPrinter to print the address of the exception handler
routine as a VA instead of an RVA, consistently with other addresses
in the same printout, and make Win64EHDumper print addresses similarly
for image cases.

Differential Revision: https://reviews.llvm.org/D71303
2019-12-11 10:20:34 +02:00
QingShan Zhang f99297176c [PowerPC] Exploitate the Vector Integer Average Instructions
PowerPC has instruction to do the semantics of this piece of code:

vector int foo(vector int m, vector int n) {
  return (m + n + 1) >> 1;
}
This patch is adding the match rule to select it.

Differential Revision: https://reviews.llvm.org/D71002
2019-12-11 07:25:57 +00:00
Craig Topper d4345636e6 [LegalizeTypes] Remove manual worklist management from SoftenFloatRes_FP_EXTEND.
I think this is no longer needed. The system should take care
of legalizing any new nodes that are added. I think this might
have been needed prior to r371709 or r307053.
2019-12-10 22:33:31 -08:00
Fangrui Song 6e513a5382 [ELF] Move a computeIsPreemptible() pass into ICF. NFC
Address post-commit review for D71163.

Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D71326
2019-12-10 22:21:05 -08:00
Igor Kudrin 3a713ae5fa [SanitizerCommon] Reduce wasting memory in LowLevelAllocator.
MmapOrDie allocates memory multiple to page size. LowLevelAllocator
should use all that memory for the internal buffer because there are
chances that subsequent requests may be small enough to fit in that
space.

Differential Revision: https://reviews.llvm.org/D71275
2019-12-11 12:44:55 +07:00
Richard Smith f7235ac1d3 [cxx_status] Re-add missing cell. 2019-12-10 19:56:07 -08:00
Richard Smith ffe612922c [c++20] Implement P1946R0: allow defaulted comparisons to take their
arguments by value.
2019-12-10 19:54:35 -08:00
Richard Smith 8e0c9e21bf [c++20] Delete defaulted comparison functions if they would invoke an
inaccessible comparison function.
2019-12-10 19:28:30 -08:00
Jason Molenda af3aac9a22 Change the mtc Makefile to check $SDKROOT value instead
of depending on it being set in the environment.  Fred's change
from October assumed that SDKROOT was set in the environment
so that 'xcrun --show-sdk-path' would print the path.  If it
was passed in as a Makefile variable, it wouldn't be set in
the environment and xcrun --show-sdk-path would always show the
macOS SDK path.  When running the lldb testsuite against an ios
device via lit, this seems to be the case.
2019-12-10 18:48:40 -08:00
Nico Weber caa4120906 Revert "[DebugInfo] Refactored macro related generation, added a test case for macinfo.dwo emission."
This reverts commit 307f60a1a3.

DebugInfo/X86/debug-macinfo-split-dwarf.ll fails on Windows:

Command Output (stdout):
--
$ ":" "RUN: at line 1"
$ "c:\src\llvm-project\out\gn\bin\llc.exe" "-mtriple=x86_64-pc-windows-gnu" "-O0" "-split-dwarf-file=foo.dwo" "-filetype=obj"
Assertion failed: Section && "Cannot switch to a null section!", file ../../llvm/lib/MC/MCStreamer.cpp, line 1103
Stack dump:
0.	Program arguments: c:\src\llvm-project\out\gn\bin\llc.exe -mtriple=x86_64-pc-windows-gnu -O0 -split-dwarf-file=foo.dwo -filetype=obj
2019-12-10 21:32:30 -05:00
Richard Smith 2e48be09b0 Fix mishandling of invalid-but-non-empty nested name specifiers in name
classification.

We were accidentally treating invalid scope specs as being empty,
resulting in our trying to form an ADL-only call with a qualified
callee, which tripped up an assert later on.
2019-12-10 17:55:30 -08:00
Fangrui Song 4d53b99c5d [llvm-ar] Improve tool selection heuristic
If llvm-ar is installed at arm-pokymllib32-linux-gnueabi-llvm-ar, it may
think it is llvm-lib due to the "lib" substring.

Improve the heuristic to make all the following work as intended:

llvm-ar-9 (llvm-9 package on Debian)
llvm-ranlib.exe
Lib.exe (reported by D44808)
arm-pokymllib32-linux-gnueabi-llvm-ar (reported by D71030)

Reviewed By: raj.khem, rupprecht

Differential Revision: https://reviews.llvm.org/D71302
2019-12-10 17:32:50 -08:00
Craig Topper 935d41e4bd [X86] Split v64i1 arguments into 2 v32i1s that will be promoted to v32i8 under min-legal-vector-width=256
This is an improvement to 88dacbd436
2019-12-10 17:29:02 -08:00
Sergej Jaskiewicz 57fc8ecdba Reland "Enable `-funwind-tables` flag when building libunwind"
Summary:
Relands https://reviews.llvm.org/D70815.

The original commit set `CMAKE_TRY_COMPILE_TARGET_TYPE` to
`STATIC_LIBRARY` globally in libunwind/CMakeLists.txt, which effectively
disabled the linking step in CMake checks.

This broke some builds (see 938c70b86c).

Here we set CMAKE_TRY_COMPILE_TARGET_TYPE to
STATIC_LIBRARY only when checking for presence of the `-funwind-tables`
flag, and then set it back to the original value so it doesn't affect
other checks.

Reviewers: mstorsjo, jfb

Subscribers: mgorny, christof, libcxx-commits

Tags: #libc

Differential Revision: https://reviews.llvm.org/D71117
2019-12-11 04:27:04 +03:00
Richard Smith bc24014b97 [c++20] Implement P1185R2 (as modified by P2002R0).
For each defaulted operator<=> in a class that doesn't explicitly
declare any operator==, also inject a matching implicit defaulted
operator==.
2019-12-10 17:24:27 -08:00
Puyan Lotfi f364686f34 [llvm][MIRVRegNamerUtil] Adding hashing against MachineInstr flags.
Now, flags will result in differing hashes for a given MI. In effect, if
you have two instructions with everything identical except for their
flags then you should get two different hashes and fewer collisions.

Differential Revision: https://reviews.llvm.org/D70479
2019-12-10 20:16:14 -05:00
Erik Pilkington d5e66f0e06 NFC: Get rid of an unused parameter to CGObjCMac::EmitSelectorAddr. 2019-12-10 16:54:48 -08:00
Gabor Horvath 8434fbbee6 Revert "[analyzer] Keep track of escaped locals"
It was a step in the right direction but it is not clear how can this
fit into the checker API at this point. The pre-escape happens in the
analyzer core and the checker has no control over it. If the checker
is not interestd in a pre-escape it would need to do additional work
on each escape to check if the escaped symbol is originated from an
"uninteresting" pre-escaped memory region. In order to keep the
checker API simple we abandoned this solution for now.

We will reland this once we have a better answer for what to do on the
checker side.

This reverts commit f3a28202ef.
2019-12-10 16:42:03 -08:00