Lauro Ramos Venancio
ee2d164f0f
Implement PIC for arm-linux.
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llvm-svn: 36324
2007-04-22 00:04:12 +00:00
Lauro Ramos Venancio
4e91908f17
X86 TLS: Implement review feedback.
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llvm-svn: 36318
2007-04-21 20:56:26 +00:00
Jeff Cohen
5959f42498
Comment out usage of write() for now.
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llvm-svn: 36287
2007-04-20 22:40:10 +00:00
Lauro Ramos Venancio
2518889872
Implement "general dynamic", "initial exec" and "local exec" TLS models for
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X86 32 bits.
llvm-svn: 36283
2007-04-20 21:38:10 +00:00
Evan Cheng
e656d093a5
Specify S registers as D registers' sub-registers.
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llvm-svn: 36280
2007-04-20 21:20:10 +00:00
Evan Cheng
06a164c6bc
Specify sub-register relations. e.g. RAX: [EAX], EAX: [AX], AX: [AL,AH].
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llvm-svn: 36279
2007-04-20 21:15:21 +00:00
Evan Cheng
ac9fdde7f4
Add sub-registers sets.
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llvm-svn: 36278
2007-04-20 21:13:46 +00:00
Chris Lattner
3d3f22766a
add a crazy idea
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llvm-svn: 36273
2007-04-20 20:18:43 +00:00
Jeff Cohen
6c673ac01c
Make Microsoft assembler and linker happy.
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llvm-svn: 36265
2007-04-20 00:33:54 +00:00
Chris Lattner
25e62eb63b
Fix a message, patch by Christopher Lamb.
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llvm-svn: 36264
2007-04-19 18:42:38 +00:00
Lauro Ramos Venancio
42cd7253b1
Fix a bug in getFrameRegister.
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Reported by Raul Herbster.
llvm-svn: 36262
2007-04-19 14:09:38 +00:00
Dan Gohman
29845cd40d
Fix the spelling of the prefetchnta instruction.
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llvm-svn: 36256
2007-04-18 14:09:14 +00:00
Evan Cheng
5118226c6c
Oops. Didn't mean to check in a quick hack.
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llvm-svn: 36227
2007-04-17 23:33:39 +00:00
Chris Lattner
598bc0d9a3
dag combiner just got better at pruning bits. This fixes CodeGen/ARM/rev.ll
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llvm-svn: 36222
2007-04-17 22:39:58 +00:00
Evan Cheng
2f45bf31c5
Change getAllocatableSet() so it returns allocatable registers for a specific register class.
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llvm-svn: 36215
2007-04-17 20:23:34 +00:00
Anton Korobeynikov
9b91d98a30
Add comment
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llvm-svn: 36213
2007-04-17 19:34:00 +00:00
Chris Lattner
2509d7547d
add a note
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llvm-svn: 36203
2007-04-17 18:03:00 +00:00
Chris Lattner
ff0598de75
rename X86FunctionInfo to X86MachineFunctionInfo to match the header file
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it is defined in.
llvm-svn: 36196
2007-04-17 17:21:52 +00:00
Anton Korobeynikov
8b7aab009e
Implemented correct stack probing on mingw/cygwin for dynamic alloca's.
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Also, fixed static case in presence of eax livin. This fixes PR331
PS: Why don't we still have push/pop instructions? :)
llvm-svn: 36195
2007-04-17 09:20:00 +00:00
Andrew Lenharth
2077814c91
Use this nifty Constraints thing and fix the inverted conditional moves
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llvm-svn: 36191
2007-04-17 04:07:59 +00:00
Chris Lattner
62a8cbe594
SSE4 is apparently public now.
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llvm-svn: 36185
2007-04-17 00:02:37 +00:00
Jeff Cohen
6f3a548ff4
In the event that some really old non-Intel or -AMD CPU is encountered...
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llvm-svn: 36177
2007-04-16 21:59:44 +00:00
Jeff Cohen
da17029218
Before assuming that the original code didn't work for Athlon64, the person who
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replaced it with a FIXME should have determined what did work. Then he would have
realized that the code was in fact correct, and would have avoided breaking it.
llvm-svn: 36173
2007-04-16 21:48:58 +00:00
Anton Korobeynikov
fb80151c42
Removed tabs everywhere except autogenerated & external files. Add make
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target for tabs checking.
llvm-svn: 36146
2007-04-16 18:10:23 +00:00
Reid Spencer
19c0217d99
For PR1336:
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Subtarget option names must be given in lower case in order to be
recognized. Fixes test/CodeGen/Alpha/ctlz.ll
llvm-svn: 36125
2007-04-16 14:06:19 +00:00
Chris Lattner
e275463e2f
add a note
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llvm-svn: 36028
2007-04-14 23:06:09 +00:00
Jeff Cohen
b4c610fb89
Silence VC++ warning.
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llvm-svn: 35975
2007-04-13 22:52:03 +00:00
Chris Lattner
502c3f48d9
arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes.
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llvm-svn: 35962
2007-04-13 06:50:55 +00:00
Reid Spencer
9945235b55
Implement review feedback .. don't double search a set.
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llvm-svn: 35957
2007-04-12 21:57:15 +00:00
Reid Spencer
0ef2ca8da7
Provide support for intrinsics that lower themselves to a function body.
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This can happen for intrinsics that are overloaded. In such cases it is
necessary to emit a function prototype before the body of the function
that calls the intrinsic and to ensure we don't emit it multiple times.
llvm-svn: 35954
2007-04-12 21:00:45 +00:00
Lauro Ramos Venancio
e6818b2549
Implement Thread Local Storage (TLS) in CBackend.
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llvm-svn: 35951
2007-04-12 18:42:08 +00:00
Chris Lattner
2805bce656
Fix mmx paddq, add support for the 'y' register class, though it isn't tested.
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llvm-svn: 35940
2007-04-12 04:14:49 +00:00
Chris Lattner
a5fcd24746
Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
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llvm-svn: 35926
2007-04-11 22:29:46 +00:00
Chris Lattner
fe926e2960
Fix incorrect fall-throughs in addr mode code. This fixes CodeGen/ARM/arm-negative-stride.ll
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llvm-svn: 35909
2007-04-11 16:17:12 +00:00
Chris Lattner
a6aa0319f1
done
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llvm-svn: 35884
2007-04-11 05:34:00 +00:00
Reid Spencer
a472f66dd0
For PR1146:
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Put the parameter attributes in their own ParamAttr name space. Adjust the
rest of llvm as a result.
llvm-svn: 35877
2007-04-11 02:44:20 +00:00
Bill Wendling
f099841573
Add support for our first SSSE3 instruction "pmulhrsw".
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llvm-svn: 35869
2007-04-10 22:10:25 +00:00
Chris Lattner
d4a9b92a13
new micro optzn
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llvm-svn: 35867
2007-04-10 21:14:01 +00:00
Chris Lattner
9b6d69e0c2
restore support for negative strides
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llvm-svn: 35859
2007-04-10 03:48:29 +00:00
Chris Lattner
d44e24c896
remove dead target hooks
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llvm-svn: 35846
2007-04-09 23:33:39 +00:00
Chris Lattner
808ac93f68
remove some dead hooks
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llvm-svn: 35845
2007-04-09 23:31:19 +00:00
Chris Lattner
39f65335d5
remove some dead target hooks, subsumed by isLegalAddressingMode
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llvm-svn: 35840
2007-04-09 22:27:04 +00:00
Chris Lattner
19ccd6226c
Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2
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are always unsupported.
llvm-svn: 35835
2007-04-09 22:10:05 +00:00
Jeff Cohen
4397363c16
When the number of elements is zero, don't malloc 32GB on 64-bit systems.
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Fixes unexpected failures on FreeBSD/amd64 of:
CFrontend/2005-09-24-BitFieldCrash.c:
CFrontend/2007-02-04-EmptyStruct.c:
CFrontend/2007-03-26-ZeroWidthBitfield.c:
CodeGen/Generic/2005-10-18-ZeroSizeStackObject.ll:
llvm-svn: 35828
2007-04-09 19:26:30 +00:00
Reid Spencer
71b79e3d99
For PR1146:
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Adapt handling of parameter attributes to use the new ParamAttrsList class.
llvm-svn: 35814
2007-04-09 06:17:21 +00:00
Chris Lattner
7451e4d6a1
move a bunch of register constraints from being handled by
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getRegClassForInlineAsmConstraint to being handled by
getRegForInlineAsmConstraint. This allows us to let the llvm register allocator
allocate, which gives us better code. For example, X86/2007-01-29-InlineAsm-ir.ll
used to compile to:
_run_init_process:
subl $4, %esp
movl %ebx, (%esp)
xorl %ebx, %ebx
movl $11, %eax
movl %ebx, %ecx
movl %ebx, %edx
# InlineAsm Start
push %ebx ; movl %ebx,%ebx ; int $0x80 ; pop %ebx
# InlineAsm End
Now we get:
_run_init_process:
xorl %ecx, %ecx
movl $11, %eax
movl %ecx, %edx
# InlineAsm Start
push %ebx ; movl %ecx,%ebx ; int $0x80 ; pop %ebx
# InlineAsm End
llvm-svn: 35804
2007-04-09 05:49:22 +00:00
Chris Lattner
2b6b4eb471
implement support for CodeGen/X86/inline-asm-x-scalar.ll:test3 - i32/i64 values
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used with x constraints.
llvm-svn: 35803
2007-04-09 05:31:48 +00:00
Chris Lattner
590ed5e5b7
implement CodeGen/X86/inline-asm-x-scalar.ll
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llvm-svn: 35799
2007-04-09 05:11:28 +00:00
Reid Spencer
e9f516384d
Squelch a warning about mismatch between sign of constant and sign of return
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type.
llvm-svn: 35674
2007-04-04 22:07:24 +00:00
Evan Cheng
1e150dedd1
Implement inline asm modifier P.
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llvm-svn: 35640
2007-04-04 00:13:29 +00:00