Jia Liu
|
e1d619691b
|
some comment fix for X86 and ARM
llvm-svn: 150902
|
2012-02-19 02:03:36 +00:00 |
Jia Liu
|
b22310fda6
|
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
llvm-svn: 150878
|
2012-02-18 12:03:15 +00:00 |
Craig Topper
|
29b0737452
|
Mark scalar FMA4 instructions as ignoring the VEX.L bit.
llvm-svn: 147602
|
2012-01-05 08:56:10 +00:00 |
Craig Topper
|
03a0beda88
|
Add FMA4 instructions to disassembler.
llvm-svn: 147367
|
2011-12-30 05:20:36 +00:00 |
Craig Topper
|
cd93de93fa
|
Separate the concept of having memory access in operand 4 from the concept of having the W bit set for XOP instructons. Removes ORing W-bits in the encoder and will similarly simplify the disassembler implementation.
llvm-svn: 147366
|
2011-12-30 04:48:54 +00:00 |
Craig Topper
|
c0f9bcb5d5
|
Combine FMA4 SS/SD patterns with the instruction definitions.
llvm-svn: 147365
|
2011-12-30 03:33:59 +00:00 |
Craig Topper
|
51fe43fcd9
|
Combine FMA4 PS/PD patterns with the instruction definitions.
llvm-svn: 147364
|
2011-12-30 03:17:15 +00:00 |
Craig Topper
|
6c08930c5e
|
Change FMA4 memory forms to use memopv* instead of alignedloadv*. No need to force alignment on these instructions. Add a couple testcases for memory forms.
llvm-svn: 147361
|
2011-12-30 02:18:36 +00:00 |
Craig Topper
|
2ca79b9d4b
|
Fix load size for FMA4 SS/SD instructions. They need to use f32 and f64 size, but with the special handling to be compatible with the intrinsic expecting a vector. Similar handling is already used elsewhere.
llvm-svn: 147360
|
2011-12-30 01:49:53 +00:00 |
Craig Topper
|
d773607eee
|
Fix execution domains for PS/PD FMA3 instructions. Add SS/SD forms o FMA3 instructions.
llvm-svn: 147353
|
2011-12-29 20:43:40 +00:00 |
Craig Topper
|
8cab06a214
|
Expose FMA3 instructions to the disassembler.
llvm-svn: 147351
|
2011-12-29 20:03:14 +00:00 |
Jan Sjödin
|
d19760a40c
|
Src2 and src3 were accidentally swapped for the FMA4 rr patterns. Undo this and fix the encoding.
llvm-svn: 146151
|
2011-12-08 14:43:19 +00:00 |
Jan Sjödin
|
9430e284a9
|
Support for encoding all FMA4 instructions and tablegen patterns for all
remaining FMA4 instructions and intrinsics with tests.
llvm-svn: 145525
|
2011-11-30 22:09:42 +00:00 |
Bruno Cardoso Lopes
|
0f9a1f5e6c
|
This patch contains support for encoding FMA4 instructions and
tablegen patterns for scalar FMA4 operations and intrinsic. Also
add tests for vfmaddsd.
Patch by Jan Sjodin
llvm-svn: 145133
|
2011-11-25 19:33:42 +00:00 |
Bruno Cardoso Lopes
|
acd9230b1b
|
Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual
llvm-svn: 109204
|
2010-07-23 00:54:35 +00:00 |