Commit Graph

147822 Commits

Author SHA1 Message Date
Wei Mi 337d4d95c2 [ConstHoisting] Add BFI in constanthoisting pass and select the best insertion
places based on it.

Existing constant hoisting pass will merge a group of contants in a small range
and hoist the const materialization code to the common dominator of their uses.
However, if the uses are all in cold pathes, existing implementation may hoist
the materialization code from cold pathes to a hot place. This may hurt performance.
The patch introduces BFI to the pass and selects the best insertion places based
on it.

The change is controlled by an option consthoist-with-block-frequency which is
off by default for now.

Differential Revision: https://reviews.llvm.org/D28962

llvm-svn: 300989
2017-04-21 15:50:16 +00:00
Chad Rosier 428556c536 [AArch64][Falkor] Refine modeling of store-release exclusive instructions.
llvm-svn: 300987
2017-04-21 14:58:32 +00:00
Joel Jones 97aaa23aec [Mips] Document Mips Backend Relocation Principles
This revision documents the combination of C++ and table-gen code that
handles relocations and addresses.

Thanks for Simon Dardis for the careful reviews.

Differential Revision: https://reviews.llvm.org/D31628

llvm-svn: 300986
2017-04-21 14:49:27 +00:00
Chad Rosier d631b9e500 [AArch64][Falkor] Refine resource needs of STRQ with register offset.
llvm-svn: 300984
2017-04-21 14:33:13 +00:00
Matthew Simpson e2037d24f9 [LV] Model if-converted phi node costs
Phi nodes in non-header blocks are converted to select instructions after
if-conversion. This patch updates the cost model to account for the selects.

Differential Revision: https://reviews.llvm.org/D31906

llvm-svn: 300980
2017-04-21 14:14:54 +00:00
Daniel Sanders 419efdd55b Revert r300964 + r300970 - [globalisel][tablegen] Import SelectionDAG's rule predicates and support the equivalent in GIRule.
It's causing llvm-clang-x86_64-expensive-checks-win to fail to compile and I
haven't worked out why. Reverting to make it green while I figure it out.

llvm-svn: 300978
2017-04-21 14:09:20 +00:00
Sanjay Patel 347b54b093 [InstCombine] prefer xor with -1 because 'not' is easier to understand (PR32706)
This matches the demanded bits behavior in the DAG and should fix:
https://bugs.llvm.org/show_bug.cgi?id=32706

Differential Revision: https://reviews.llvm.org/D32255

llvm-svn: 300977
2017-04-21 14:03:54 +00:00
Chad Rosier 537defeeb5 [AArch64][Falkor] Refine loads/stores that require an extra LD pipe.
llvm-svn: 300976
2017-04-21 13:55:41 +00:00
Chad Rosier bbcc828833 [AArch64][Falkor] Fix number of microops for WriteSTIdx missed in r300892.
llvm-svn: 300975
2017-04-21 13:37:01 +00:00
Chad Rosier 4f2e9e237f [AArch64] Fix a few missed pre/post-inc in Falkor.
llvm-svn: 300974
2017-04-21 13:36:57 +00:00
Diana Picus 64a33431eb [ARM] GlobalISel: Add support for G_TRUNC
Select them as copies. We only select if both the source and the
destination are on the same register bank, so this shouldn't cause any
trouble.

llvm-svn: 300971
2017-04-21 13:16:50 +00:00
Daniel Sanders 4df04ec227 [globalisel][tablegen] Try again to fix builds on old MSVC's after r300964
This should fix llvm-clang-x86_64-expensive-checks-win

I reproduced the error using the following code:
namespace llvm {
// Moving this out of the llvm namespace fixes the error.
template<unsigned NumBits> class PredicateBitsetImpl {};
}
namespace {
const unsigned MAX_SUBTARGET_PREDICATES = 11;
// This works on Clang but is broken on MSVC
//     using PredicateBitset = PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>;
// Some versions emit a syntax error here ("error C2061: syntax error: identifier
// 'PredicateBitsetImpl'") but others accept it and only emit the C3646 below.
//
// This works on Clang and MSVC
using PredicateBitset = llvm::PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>;

class Foo {
private: 
    PredicateBitset A; // error C3646: 'A': unknown override specifier
};
}

llvm-svn: 300970
2017-04-21 12:51:43 +00:00
Daniel Sanders ed30f5b274 Revert: r300966 - [globalisel][tablegen] Attempt to fix builds on old MSVC's after r300964
It didn't fix the builder.

llvm-svn: 300968
2017-04-21 12:08:25 +00:00
Diana Picus f941ec0ecc [ARM] GlobalISel: Make struct arguments fail elegantly
The condition in isSupportedType didn't handle struct/array arguments
properly. Fix the check and add a test to make sure we use the fallback
path in this kind of situation. The test deals with some common cases
where the call lowering should error out. There are still some issues
here that need to be addressed (tail calls come to mind), but they can
be addressed in other patches.

llvm-svn: 300967
2017-04-21 11:53:01 +00:00
Daniel Sanders 0cd1b539bc [globalisel][tablegen] Attempt to fix builds on old MSVC's after r300964
This should fix llvm-clang-x86_64-expensive-checks-win

llvm-svn: 300966
2017-04-21 11:29:29 +00:00
Daniel Sanders 279d03527e [globalisel][tablegen] Import SelectionDAG's rule predicates and support the equivalent in GIRule.
Summary:
The SelectionDAG importer now imports rules with Predicate's attached via
Requires, PredicateControl, etc. These predicates are implemented as
bitset's to allow multiple predicates to be tested together. However,
unlike the MC layer subtarget features, each target only pays for it's own
predicates (e.g. AArch64 doesn't have 192 feature bits just because X86
needs a lot).

Both AArch64 and X86 derive at least one predicate from the MachineFunction
or Function so they must re-initialize AvailableFeatures before each
function. They also declare locals in <Target>InstructionSelector so that
computeAvailableFeatures() can use the code from SelectionDAG without
modification.

Reviewers: rovka, qcolombet, aditya_nandakumar, t.p.northover, ab

Reviewed By: rovka

Subscribers: aemerson, rengolin, dberris, kristof.beyls, llvm-commits, igorb

Differential Revision: https://reviews.llvm.org/D31418

llvm-svn: 300964
2017-04-21 10:27:20 +00:00
Clement Courbet 41b4333066 typo
llvm-svn: 300963
2017-04-21 09:21:05 +00:00
Clement Courbet 00b51bf123 add skylake
llvm-svn: 300962
2017-04-21 09:21:01 +00:00
Clement Courbet 2430e25ba3 add 32 bit tests
llvm-svn: 300961
2017-04-21 09:20:58 +00:00
Clement Courbet d5f6182bec use repmovsb when optimizing forminsize
llvm-svn: 300960
2017-04-21 09:20:55 +00:00
Clement Courbet 203fc17797 Rename FastString flag.
llvm-svn: 300959
2017-04-21 09:20:50 +00:00
Clement Courbet a7c233fbe0 add more tests
llvm-svn: 300958
2017-04-21 09:20:44 +00:00
Clement Courbet 1ce3b82dea X86 memcpy: use REPMOVSB instead of REPMOVS{Q,D,W} for inline copies
when the subtarget has fast strings.

This has two advantages:
  - Speed is improved. For example, on Haswell thoughput improvements increase
    linearly with size from 256 to 512 bytes, after which they plateau:
    (e.g. 1% for 260 bytes, 25% for 400 bytes, 40% for 508 bytes).
  - Code is much smaller (no need to handle boundaries).

llvm-svn: 300957
2017-04-21 09:20:39 +00:00
George Rimar f8a9642526 [DWARF] - Refactoring: localize handling of relocations in a single place.
This is splitted from D32228,
currently DWARF parsers code has few places that applied relocations values manually.
These places has similar duplicated code. Patch introduces separate method that can be
used to obtain relocated value. That helps to reduce code and simplifies things.

Differential revision: https://reviews.llvm.org/D32284

llvm-svn: 300956
2017-04-21 09:12:18 +00:00
Clement Courbet 8177fee513 Delete dead code
llvm-svn: 300952
2017-04-21 07:40:59 +00:00
Artyom Skrobov 8d9643009f [Thumb1] The recently added tADCS and tSBCS pseudo-instructions were missing `Uses = [CPSR]`
Summary: Thanks to Oliver Stannard for helping catch this.

Reviewers: olista01, efriedma

Subscribers: llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D31815

llvm-svn: 300951
2017-04-21 07:35:21 +00:00
Serguei Katkov c9a752c5b7 [AsmWriter] Eliminate warning. NFC
This patch eliminates the following warning

lib/IR/AsmWriter.cpp:1128:57: warning: suggest parentheses around '&&' within '||' [-Wparentheses]
                 (StrVal[1] >= '0' && StrVal[1] <= '9')) &&

Reviewers: timshen, rnk, davide
Reviewed By: davide
Subscribers: davide, llvm-commits
Differential Revision: https://reviews.llvm.org/D32337

llvm-svn: 300950
2017-04-21 06:14:38 +00:00
George Burgess IV 56169ed753 [MSSA] Clean up the updater a bit. NFC
- Mark an internal function static
- Remove the llvm namespace (just holding on to the `using namespace
  llvm;` Works on My Machine(TM))

llvm-svn: 300947
2017-04-21 04:54:52 +00:00
Davide Italiano fa15de34b7 [PartialInliner] Fix crash when inlining functions with unreachable blocks.
CodeExtractor looks up the dominator node corresponding to return blocks
when splitting them. If one of these blocks is unreachable, there's no
node in the Dom and CodeExtractor crashes because it doesn't check
for domtree node validity.
In theory, we could add just a check for skipping null DTNodes in
`splitReturnBlock` but the fix I propose here is slightly different. To the
best of my knowledge, unreachable blocks are irrelevant for the algorithm,
therefore we can just skip them when building the candidate set in the
constructor.

Differential Revision:  https://reviews.llvm.org/D32335

llvm-svn: 300946
2017-04-21 04:25:00 +00:00
Serguei Katkov 5b817d02bf [BPI] Add multiplication by scalar operators to BranchProbability
This patch just adds two operators to BranchProbability class:
(BP * scalar) and (BP *= scalar).

Reviewers: junbuml, chandlerc, sanjoy, vsk

Reviewed By: chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32334

llvm-svn: 300945
2017-04-21 03:14:30 +00:00
Serguei Katkov 3a46eb4442 [AsmWriter/APFloat] FP constant printing: Avoid usage of locale dependent snprinf
This should fix the bug https://bugs.llvm.org/show_bug.cgi?id=12906

To print the FP constant AsmWriter does the following:

  1) convert FP value to String (actually using snprintf function which is locale dependent).
  2) Convert String back to FP Value
  3) Compare original and got FP values. If they are not equal just dump as hex.

The problem happens on the 2nd step when APFloat does not expect group delimiter or
fraction delimiter other than period symbol and so on, which can be produced on the
first step if LLVM library is used in an environment with corresponding locale set.

To fix this issue the locale independent APFloat:toString function is used.
However it prints FP values slightly differently than snprintf does. Specifically
it suppress trailing zeros in significant, use capital E and so on.
It results in 117 test failures during make check.
To avoid this I've also updated APFloat.toString a bit to pass make check at least.

Reviewers: sberg, bogner, majnemer, sanjoy, timshen, rnk

Reviewed By: timshen, rnk

Subscribers: rnk, llvm-commits

Differential Revision: https://reviews.llvm.org/D32276

llvm-svn: 300943
2017-04-21 02:52:17 +00:00
Akira Hatanaka 78ccba6a20 Revert r300932 and r300930.
It seems that r300930 was creating an infinite loop in dag-combine when
compling the following file:

MultiSource/Benchmarks/MiBench/consumer-typeset/z21.c

llvm-svn: 300940
2017-04-21 01:31:50 +00:00
Akira Hatanaka e52caddae8 [AArch64] Use suffix ULL to shift a 64-bit value.
llvm-svn: 300932
2017-04-21 00:35:27 +00:00
Davide Italiano 059574c537 [CodeExtractor] Remove an unneeded level of indirection. NFCI.
llvm-svn: 300931
2017-04-21 00:21:09 +00:00
Akira Hatanaka 19077aaee0 [AArch64] Improve code generation for logical instructions taking
immediate operands.

This commit adds an AArch64 dag-combine that optimizes code generation
for logical instructions taking immediate operands. The optimization
uses demanded bits to change a logical instruction's immediate operand
so that the immediate can be folded into the immediate field of the
instruction.

This recommits r300913, which broke bots because I didn't fix a call to
ShrinkDemandedConstant in SIISelLowering.cpp after changing the APIs of
TargetLoweringOpt and TargetLowering.

rdar://problem/18231627

Differential Revision: https://reviews.llvm.org/D5591

llvm-svn: 300930
2017-04-21 00:05:16 +00:00
Eli Friedman d0e6ae5678 Revert r300746 (SCEV analysis for or instructions).
There have been multiple reports of this causing problems: a
compile-time explosion on the LLVM testsuite, and a stack
overflow for an opencl kernel.

llvm-svn: 300928
2017-04-20 23:59:05 +00:00
Craig Topper 358cd9ae3a [InstCombine] Remove the zextOrTrunc from ShrinkDemandedConstant.
The demanded mask and the constant should always be the same width for all callers today.

Also stop copying the demanded mask as its passed in. We should avoid allocating memory unless we are going to do something. The final AND to create the new constant will take care of it.

llvm-svn: 300927
2017-04-20 23:58:27 +00:00
Matthias Braun 9610a26251 X86RegisterInfo: eliminateFrameIndex: Avoid code duplication; NFC
X86RegisterInfo::eliminateFrameIndex() and
X86FrameLowering::getFrameIndexReference() both had logic to compute the
base register. This consolidates the code.

Also use MachineInstr::isReturn instead of manually enumerating tail
call instructions (return instructions were not included in the previous
list because they never reference frame indexes).

Differential Revision: https://reviews.llvm.org/D32206

llvm-svn: 300923
2017-04-20 23:34:50 +00:00
Matthias Braun 63e3e8ce72 X86RegisterInfo: eliminateFrameIndex: Force SP for AfterFPPop; NFC
AfterFPPop is used for tailcall/tailjump instructions. We shouldn't ever
have frame-pointer/base-pointer relative addressing for those. After all
the frame/base pointer should already be restored to their previous
values at the return.

Make this fact explicit in preparation for an upcoming refactoring.

Differential Revision: https://reviews.llvm.org/D32205

llvm-svn: 300922
2017-04-20 23:34:46 +00:00
Sanjoy Das 3e748e9220 Fix typo in comment
llvm-svn: 300918
2017-04-20 23:07:00 +00:00
Akira Hatanaka 7b06cebe73 Revert "[AArch64] Improve code generation for logical instructions taking"
This reverts r300913.

This broke bots.

llvm-svn: 300916
2017-04-20 23:03:30 +00:00
Craig Topper 1cb0e5afb0 [Simplify] Add testcase to show that merging conditional stores for triangles is sensitive to the order of the branch targets on the conditional branches. NFC
llvm-svn: 300915
2017-04-20 22:57:36 +00:00
Akira Hatanaka e327f09832 [AArch64] Improve code generation for logical instructions taking
immediate operands.

This commit adds an AArch64 dag-combine that optimizes code generation
for logical instructions taking immediate operands. The optimization
uses demanded bits to change a logical instruction's immediate operand
so that the immediate can be folded into the immediate field of the
instruction.

rdar://problem/18231627

Differential Revision: https://reviews.llvm.org/D5591

llvm-svn: 300913
2017-04-20 22:47:56 +00:00
Sanjay Patel cc663b82fa [InstCombine] function names start with lower-case letter; NFC
Forgot to make this fix with the signature change in r300911.

llvm-svn: 300912
2017-04-20 22:37:01 +00:00
Sanjay Patel c9485ca895 [InstCombine] allow shl+shr demanded bits folds with splat constants
llvm-svn: 300911
2017-04-20 22:33:54 +00:00
Sanjay Patel be2dcaf45a [InstCombine] add tests for shl+shr demanded bits splat vector folds; NFC
llvm-svn: 300907
2017-04-20 22:18:47 +00:00
Tim Northover 100b7f6eae AArch64: lower "fence singlethread" to a pure compiler barrier.
Single-threaded fences aren't required to provide any synchronization with
other processing elements so there's no need for a DMB. They should still be a
barrier for compiler optimizations though.

llvm-svn: 300905
2017-04-20 21:57:45 +00:00
Tim Northover 46e58354da ARM: lower "fence singlethread" to a pure compiler barrier.
Single-threaded fences aren't required to provide any synchronization with
other processing elements so there's no need for a DMB. They should still be a
barrier for compiler optimizations though.

llvm-svn: 300904
2017-04-20 21:56:52 +00:00
Xinliang David Li 99e3ca1526 Use basicblock split block utility function
Instead of calling BasicBlock::SplitBasicBlock directly in 
CodeExtractor.

Differential Revision: https://reviews.llvm.org/D32308

llvm-svn: 300899
2017-04-20 21:40:22 +00:00
Sanjay Patel 3e1ae72fcf [InstCombine] allow shl demanded bits folds with splat constants
More fixes are needed to enable the helper SimplifyShrShlDemandedBits().

llvm-svn: 300898
2017-04-20 21:33:02 +00:00