Nate Begeman
3345eadc37
Don't hand ISD::CALL nodes off to SelectExprFP. This fixes siod.
...
llvm-svn: 21197
2005-04-10 01:14:13 +00:00
Chris Lattner
d8cbfe82ba
Fix a thinko. If the operand is promoted, pass the promoted value into
...
the new zero extend, not the original operand. This fixes cast bool -> long
on ppc.
Add an unrelated fixme
llvm-svn: 21196
2005-04-10 01:13:15 +00:00
Chris Lattner
9ff4b4190f
rename getPPCOpcodeForSetCCNumber -> getPPCOpcodeForSetCCOpode to be more
...
correct. Remove the EmitComparison retvalue, as it is always the first arg.
Fix a place where we incorrectly passed in the setcc opcode instead of the
setcc number, causing us to miscompile crafty. Crafty now works!
llvm-svn: 21195
2005-04-10 01:03:31 +00:00
Nate Begeman
2121a54868
fix ISD::BRCONDTWOWAY codegen to not deference the end() iterator
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llvm-svn: 21193
2005-04-09 23:35:05 +00:00
Chris Lattner
228fed92e6
Fix CodeGen/Generic/2005-05-09-GlobalInPHI.ll, which was reduced from 254.gap.
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This caused the "use before a def" assertion on some programs.
With this patch, 254.gap now passes with the PPC backend.
llvm-svn: 21191
2005-04-09 22:05:17 +00:00
Chris Lattner
db32a632c9
new testcase that used to crash the ppc fe. It could effect any simpleisel
...
that is not careful, so I'm checking it into the generic tests.
llvm-svn: 21190
2005-04-09 22:03:10 +00:00
Chris Lattner
da504741da
add a little peephole optimization. This allows us to codegen:
...
int a(short i) {
return i & 1;
}
as
_a:
andi. r3, r3, 1
blr
instead of:
_a:
rlwinm r2, r3, 0, 16, 31
andi. r3, r2, 1
blr
on ppc. It should also help the other risc targets.
llvm-svn: 21189
2005-04-09 21:43:54 +00:00
Chris Lattner
e8e070dbfb
do not set the root to null if an argument is dead
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llvm-svn: 21188
2005-04-09 21:23:24 +00:00
Nate Begeman
8309a333dd
Add rlwnm instruction for variable rotate
...
Generate rotate left/right immediate
Generate code for brcondtwoway
Use new livein/liveout functionality
llvm-svn: 21187
2005-04-09 20:09:12 +00:00
Chris Lattner
3a7f5768c5
Fix a crash on 173.applu by asking for a constant bigger than 32-bits.
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llvm-svn: 21185
2005-04-09 19:47:21 +00:00
Chris Lattner
a55a5f2580
Switch this instruction selector over to using liveins and liveouts, eliminating
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implicit defs on entry to the function. yaay :)
llvm-svn: 21184
2005-04-09 16:32:30 +00:00
Chris Lattner
1a44855f8f
there is no need to remove this instruction, linscan does it already as it
...
removes noop moves.
llvm-svn: 21183
2005-04-09 16:24:20 +00:00
Chris Lattner
0b1681bce1
Adjust live intervals to support a livein set
...
llvm-svn: 21182
2005-04-09 16:17:50 +00:00
Chris Lattner
b59006c4a1
Use live out sets for return values instead of imp_defs, which is cleaner and faster.
...
llvm-svn: 21181
2005-04-09 15:23:56 +00:00
Chris Lattner
4c6ab01a20
Consider the livein/out set for a function, allowing targets to not have to
...
use ugly imp_def/imp_uses for arguments and return values.
llvm-svn: 21180
2005-04-09 15:23:25 +00:00
Chris Lattner
576db37185
add routines to track the livein/out set for a function
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llvm-svn: 21179
2005-04-09 15:22:53 +00:00
Duraid Madina
46aa06cfed
ok, the "ia64 has a boatload of registers" joke stopped being funny today ;)
...
* fix overallocation of integer (stacked) registers: we can't allocate
registers for local use if they are required as output registers
this fixes 'toast' in the test suite, and all sorts of larger programs
like bzip2 etc.
llvm-svn: 21178
2005-04-09 11:53:00 +00:00
Nate Begeman
2f64122319
Optimize FSEL a bit for fneg arguments. This fixes the recently added test
...
case so that we emit
_test_fneg_sel:
.LBB_test_fneg_sel_0: ;
fsel f1, f1, f3, f2
blr
instead of:
_test_fneg_sel:
.LBB_test_fneg_sel_0: ;
fneg f0, f1
fneg f0, f0
fsel f1, f0, f3, f2
blr
llvm-svn: 21177
2005-04-09 09:33:07 +00:00
Nate Begeman
7d3e44fb12
Add a testcase to make sure that we don't emit two fneg instructions back
...
to back for certain fsel instructions.
llvm-svn: 21176
2005-04-09 09:30:09 +00:00
Nate Begeman
968e44a900
Add cases to cover the rest of the patterns we should be matching
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llvm-svn: 21175
2005-04-09 08:29:59 +00:00
Chris Lattner
888c5fdcc2
Fix CodeGen/SparcV9/2005-05-09-GEP-Crash.ll a crash on some specfp program
...
lets hope this doesn't break other programs with induced entropy
llvm-svn: 21174
2005-04-09 06:27:14 +00:00
Chris Lattner
3aa6ec0dda
New testcase that the sparc backend crashes on
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llvm-svn: 21173
2005-04-09 06:26:27 +00:00
Chris Lattner
6a31b878f8
recognize some patterns as fabs operations, so that fabs at the source level
...
is deconstructed then reconstructed here. This catches 19 fabs's in 177.mesa
9 in 168.wupwise, 5 in 171.swim, 3 in 172.mgrid, and 14 in 173.applu out of
specfp2000.
This allows the X86 code generator to make MUCH better code than before for
each of these and saves one instr on ppc.
This depends on the previous CFE patch to expose these correctly.
llvm-svn: 21171
2005-04-09 05:15:53 +00:00
Chris Lattner
d9748bcae5
make this test more interesting
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llvm-svn: 21170
2005-04-09 04:55:14 +00:00
Chris Lattner
ec90861662
add a test for fnabs
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llvm-svn: 21169
2005-04-09 04:03:16 +00:00
Chris Lattner
b9a11b8b7f
add a partial test for the fma operations that ppc supports. I'm sure I'm
...
missing some and not all of these match yet, but I'm sure that Nate will
clean up my mess :)
llvm-svn: 21168
2005-04-09 04:01:32 +00:00
Chris Lattner
8a98c7f337
Emit BRCONDTWOWAY when possible.
...
llvm-svn: 21167
2005-04-09 03:30:29 +00:00
Chris Lattner
fd98678a8a
Legalize BRCONDTWOWAY into a BRCOND/BR pair if a target doesn't support it.
...
llvm-svn: 21166
2005-04-09 03:30:19 +00:00
Chris Lattner
b0713c74a2
print and fold BRCONDTWOWAY correctly
...
llvm-svn: 21165
2005-04-09 03:27:28 +00:00
Chris Lattner
a3a135a9f7
This target does not support/want ISD::BRCONDTWOWAY
...
llvm-svn: 21164
2005-04-09 03:22:37 +00:00
Chris Lattner
4f77badaa3
This target does not yet support ISD::BRCONDTWOWAY
...
llvm-svn: 21163
2005-04-09 03:22:30 +00:00
Chris Lattner
4b1323e846
Add a new node
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llvm-svn: 21162
2005-04-09 03:21:50 +00:00
Nate Begeman
e8ce0cda40
64b: Expand S/UREM
...
32b: No longer pattern match fneg(fsub(fmul)) as fnmsub
Pattern match fsub a, mul(b, c) as fnmsub
Pattern match fadd a, mul(b, c) as fmadd
Those changes speed up hydro2d by 2.5%, distray by 6%, and scimark by 8%
llvm-svn: 21161
2005-04-09 03:05:51 +00:00
Chris Lattner
0ea81f9db4
canonicalize a bunch of operations involving fneg
...
llvm-svn: 21160
2005-04-09 03:02:46 +00:00
Nate Begeman
f50b597f67
Fix 64b shifts
...
llvm-svn: 21159
2005-04-08 23:45:01 +00:00
Chris Lattner
61b6f04ae9
fix this method for 64-bit constants
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llvm-svn: 21158
2005-04-08 21:31:29 +00:00
Nate Begeman
705d3c18e8
Match Mac OS X 64 bit calling conventions
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llvm-svn: 21157
2005-04-08 21:26:05 +00:00
Andrew Lenharth
de5aed3f12
collect a few statistics, factor constants (constant loading and mult), fix logic operation pattern matchs, supress FP div when int dividing by a constant
...
llvm-svn: 21156
2005-04-08 17:28:49 +00:00
Andrew Lenharth
ce9e043c78
oops
...
llvm-svn: 21155
2005-04-08 16:55:15 +00:00
Andrew Lenharth
2e184e2522
added some tests to check stupid pattern matching mistakes
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llvm-svn: 21154
2005-04-08 16:46:44 +00:00
Duraid Madina
41ff502549
fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn)
...
fix hack in division (clean up frcpa instruction)
llvm-svn: 21153
2005-04-08 10:01:48 +00:00
Chris Lattner
4236261930
Fix bug: InstCombine/2005-05-07-UDivSelectCrash.ll
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llvm-svn: 21152
2005-04-08 04:03:26 +00:00
Chris Lattner
9e2b5fc65a
new testcase that crashes the instcombiner.
...
llvm-svn: 21151
2005-04-08 03:58:21 +00:00
Nate Begeman
b1f66d1af2
Optimized code sequences for setcc reg, 0
...
Optimized code sequence for (a < 0) ? b : 0
llvm-svn: 21150
2005-04-07 20:30:01 +00:00
Andrew Lenharth
534eebb317
Alpha zero extends setcc results
...
llvm-svn: 21149
2005-04-07 20:11:32 +00:00
Chris Lattner
b32d9318d2
If a target zero or sign extends the result of its setcc, allow folding of
...
this into sign/zero extension instructions later.
On PPC, for example, this testcase:
%G = external global sbyte
implementation
void %test(int %X, int %Y) {
%C = setlt int %X, %Y
%D = cast bool %C to sbyte
store sbyte %D, sbyte* %G
ret void
}
Now codegens to:
cmpw cr0, r3, r4
li r3, 1
li r4, 0
blt .LBB_test_2 ;
.LBB_test_1: ;
or r3, r4, r4
.LBB_test_2: ;
addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2)
stb r3, 0(r2)
instead of:
cmpw cr0, r3, r4
li r3, 1
li r4, 0
blt .LBB_test_2 ;
.LBB_test_1: ;
or r3, r4, r4
.LBB_test_2: ;
*** rlwinm r3, r3, 0, 31, 31
addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2)
stb r3, 0(r2)
llvm-svn: 21148
2005-04-07 19:43:53 +00:00
Chris Lattner
532ac79122
PowerPC zero extends setcc results
...
llvm-svn: 21147
2005-04-07 19:41:49 +00:00
Chris Lattner
38fd97084b
X86 zero extends setcc results
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llvm-svn: 21146
2005-04-07 19:41:46 +00:00
Chris Lattner
693e797be9
Allow targets which produce setcc results in non-MVT::i1 registers to describe
...
what the contents of the top bits of these registers are, in the common cases
of targets that sign and zero extend the results.
llvm-svn: 21145
2005-04-07 19:41:18 +00:00
Chris Lattner
dfed7355c9
Remove somethign I had for testing
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llvm-svn: 21144
2005-04-07 18:58:54 +00:00