Commit Graph

136398 Commits

Author SHA1 Message Date
Krzysztof Parzyszek 341cf3fbe5 [Hexagon] Add pattern for 64-bit mulhs
llvm-svn: 278040
2016-08-08 19:24:25 +00:00
Michael Zolotukhin 2f50725dbd [LoopUnroll] Simplify loops created by unrolling.
Summary:
Currently loop-unrolling doesn't preserve loop-simplified form. This patch
fixes it by resimplifying affected loops.

Reviewers: chandlerc, sanjoy, hfinkel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23148

llvm-svn: 278038
2016-08-08 19:02:15 +00:00
Mehdi Amini c137c28c8b RefreshCallGraph does not modify the SCC, adding "const" to make it clear (NFC)
llvm-svn: 278037
2016-08-08 18:51:05 +00:00
Geoff Berry 290a13e7c7 [MemorySSA] Fix windows build breakage caused by r278028
r278028: [MemorySSA] Ensure address stability of MemorySSA object.
llvm-svn: 278035
2016-08-08 18:27:22 +00:00
Elliot Colp d9e6668928 Re-add SystemZ SNaN test
The floating-point bug affecting ninja-x64-msvc-RA-centos6 is fixed (r277813) so this test should
now pass

llvm-svn: 278034
2016-08-08 18:11:13 +00:00
Lang Hames 96a2d57b75 [BuildingAJIT] Fix a couple of typos in the Chapter 3 draft.
llvm-svn: 278033
2016-08-08 18:09:56 +00:00
Nirav Dave f45fd2ba87 [X86] Improve code size on X86 segment moves
Moves of a value to a segment register from a 16-bit register is
equivalent to one from it's corresponding 32-bit register. Match gas's
behavior and rewrite instructions to the shorter of equivalent forms.

Reviewers: rnk, ab

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23166

llvm-svn: 278031
2016-08-08 18:01:04 +00:00
Geoff Berry cdf5333f6f [MemorySSA] Ensure address stability of MemorySSA object.
Summary:
Ensure that the MemorySSA object never changes address when using the
new pass manager since the walkers contained by MemorySSA cache pointers
to it at construction time.  This is achieved by wrapping the
MemorySSAAnalysis result in a unique_ptr.  Also add some asserts that
check for this bug.

Reviewers: george.burgess.iv, dberlin

Subscribers: mcrosier, hfinkel, chandlerc, silvas, llvm-commits

Differential Revision: https://reviews.llvm.org/D23171

llvm-svn: 278028
2016-08-08 17:52:01 +00:00
Oliver Stannard 8331aaee8f [ARM] Add support for embedded position-independent code
This patch adds support for some new relocation models to the ARM
backend:

* Read-only position independence (ROPI): Code and read-only data is accessed
  PC-relative. The offsets between all code and RO data sections are known at
  static link time. This does not affect read-write data.
* Read-write position independence (RWPI): Read-write data is accessed relative
  to the static base register (r9). The offsets between all writeable data
  sections are known at static link time. This does not affect read-only data.

These two modes are independent (they specify how different objects
should be addressed), so they can be used individually or together. They
are otherwise the same as the "static" relocation model, and are not
compatible with SysV-style PIC using a global offset table.

These modes are normally used by bare-metal systems or systems with
small real-time operating systems. They are designed to avoid the need
for a dynamic linker, the only initialisation required is setting r9 to
an appropriate value for RWPI code.

I have only added support to SelectionDAG, not FastISel, because
FastISel is currently disabled for bare-metal targets where these modes
would be used.

Differential Revision: https://reviews.llvm.org/D23195

llvm-svn: 278015
2016-08-08 15:28:31 +00:00
Zhan Jun Liau 4fbc3f4a37 [SystemZ] Add support for the .insn directive
Summary:
Add support for the .insn directive.

.insn is an s390 specific directive that allows encoding of an instruction
instead of using a mnemonic. The motivating case is some code in node.js that
requires support for the .insn directive.

Reviewers: koriakin, uweigand

Subscribers: koriakin, llvm-commits

Differential Revision: https://reviews.llvm.org/D21809

llvm-svn: 278012
2016-08-08 15:13:08 +00:00
Nico Weber eb912b9dd3 Revert r2277979.
For some reason, MSVC2013's cl.exe crashes with
  fatal error C1001: An internal error has occurred in the compiler
with this when compiling e.g. LoopDistribute.cpp.

llvm-svn: 278011
2016-08-08 14:51:53 +00:00
Sebastian Pop bfb96c5bfd GVN-hoist: enable by default
llvm-svn: 278010
2016-08-08 14:46:15 +00:00
Artur Pilipenko eed618d5c0 [LVI] NFC. On the fast dest path use inverse predicate instead of inverse range result
Gathering constantins from a condition on the false path ask makeAllowedICmpRegion about inverse predicate instead of inversing the resulting range.

This change was separated from the review "[LVI] Make LVI smarter about comparisons with non-constants" (https://reviews.llvm.org/D23205#inline-198361)

llvm-svn: 278009
2016-08-08 14:33:11 +00:00
Artur Pilipenko 54b50cc1a8 [LVI] NFC. Rename confusing local NegOffset to Offset
NegOffset is not necessarily negative

llvm-svn: 278008
2016-08-08 14:13:56 +00:00
Artur Pilipenko 21472910c1 [LVI] NFC. Extract LHS, RHS, Predicate locals in getValueFromCondition
llvm-svn: 278007
2016-08-08 14:08:37 +00:00
Silviu Baranga fa00ba3c1a [AArch64] PR28877: Don't assume we're running after legalization when creating vcvtfp2fxs
Summary:
The DAG combine transformation that was generating the
aarch64_neon_vcvtfp2fxs node was assuming that all
inputs where legal and wasn't accounting that the input
could be a v4f64 if we're trying to do the transformation
before legalization. We now bail out in this case.

All illegal types besides v4f64 were already rejected.

Fixes https://llvm.org/bugs/show_bug.cgi?id=28877.

Reviewers: jmolloy

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: https://reviews.llvm.org/D23261

llvm-svn: 278002
2016-08-08 13:13:57 +00:00
Daniel Sanders 3feeb9c851 Re-commit r277988: [mips][ias] Fix all the hacks related to MIPS-specific unary operators (%hi/%lo/%gp_rel/etc.).
Hopefully with the MSVC builds fixed. I've added a missing '#include <tuple>'
that gcc and clang don't seem to need.

llvm-svn: 277995
2016-08-08 11:50:25 +00:00
Simon Pilgrim 4981ec9a56 Fix Wdocumentation unknown parameter warning
llvm-svn: 277994
2016-08-08 11:49:24 +00:00
Simon Pilgrim 33fc788374 [X86][SSE] Assert if the shuffle mask indices are not -1 or within a valid input range
As discussed in post-review rL277959

llvm-svn: 277993
2016-08-08 11:07:34 +00:00
Daniel Sanders cae9aeed39 Revert r277988: [mips][ias] Fix all the hacks related to MIPS-specific unary operators (%hi/%lo/%gp_rel/etc.).
It seems that MSVC doesn't like std::tie().

llvm-svn: 277990
2016-08-08 09:33:14 +00:00
Daniel Sanders 2ab623b5a3 [mips][ias] Fix all the hacks related to MIPS-specific unary operators (%hi/%lo/%gp_rel/etc.).
Summary:
They are now lexed as a single token on targets where
MCAsmInfo::HasMipsExpressions is true and then parsed in a similar way to
the '~' operator as part of MCExpr::parseExpression.

As a result:
* expressions and immediates no longer have different parsing rules. The
  difference is now solely down to whether evaluateAsAbsolute() succeeds.
* %hi(%neg(%gp_rel(x))) are no longer parsed as a single operator and
  decomposed into the three MipsMCExpr nodes. They are parsed directly as
  three MipsMCExpr nodes.
  * parseMemOperand no longer needs to eat all the surrounding parenthesis
    to get at the outermost operator to make this work
* %hi(%neg(%gp_rel(x))) and %lo(%neg(%gp_rel(x))) are no longer the only
  3-in-1 relocs that parse for N64. They're still the only combinations that
  are permitted in relocatable expressions though. Fixing that should be a
  later patch.
* We no longer need to list all the tokens that can occur as the first token of
  an expression or immediate.

test/MC/Mips/expr1.s:
    This change also prevents the incorrect lowering of %lo(2*4)+foo to
    %lo(8+foo) which is not an equivalent expression (the difference is
    whether foo is truncated to 16-bit or not) and the test has been
    updated to account for the macro expansion the correct expression requires.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: https://reviews.llvm.org/D23110

llvm-svn: 277988
2016-08-08 09:20:52 +00:00
Diana Picus 4dd6c249ac [SelectionDAG] Refactor visitInlineAsm a bit. NFCI.
This shaves off ~100 lines from visitInlineAsm.

llvm-svn: 277987
2016-08-08 08:54:39 +00:00
Sean Silva 0873e7d218 Add some comments linking back to PR28400.
Thanks to Mehdi for the suggestion!

llvm-svn: 277984
2016-08-08 07:03:49 +00:00
Sean Silva 7f21f4b264 [PM] More workaround for PR28400
llvm-svn: 277982
2016-08-08 05:38:06 +00:00
Sean Silva 6e1fed0ae5 [PM] BasicAA needs to be invalidated since it holds pointers to other stuff.
llvm-svn: 277981
2016-08-08 05:38:03 +00:00
Sean Silva 744f7a843f [PM] Invalidate CallGraphAnalysis because it holds AssertingVH
This is essentially PR28400. The fix here is similar to that implemented
in r274656.

llvm-svn: 277980
2016-08-08 05:38:01 +00:00
Sean Silva 571906247e [PM] Function-level TLI is also immutable.
llvm-svn: 277979
2016-08-08 05:37:58 +00:00
Daniel Berlin 4b4c722e79 [MSSA] Fix PR28880 by fixing use optimizer's lower bound tracking behavior.
Summary:
In the use optimizer, we need to keep of whether the lower bound still
dominates us or else we may decide a lower bound is still valid when it
is not due to intervening pushes/pops.  Fixes PR28880 (and probably a
bunch of other things).

Reviewers: george.burgess.iv

Subscribers: MatzeB, llvm-commits, sebpop

Differential Revision: https://reviews.llvm.org/D23237

llvm-svn: 277978
2016-08-08 04:44:53 +00:00
Eli Friedman 02419a9849 [JumpThreading] Fix handling of aliasing metadata.
Summary:
The correctness fix here is that when we CSE a load with another load,
we need to combine the metadata on the two loads. This matches the
behavior of other passes, like instcombine and GVN.

There's also a minor optimization improvement here: for load PRE, the
aliasing metadata on the inserted load should be the same as the
metadata on the original load. Not sure why the old code was throwing
it away.

Issue found by inspection.

Differential Revision: http://reviews.llvm.org/D21460

llvm-svn: 277977
2016-08-08 04:10:22 +00:00
Davide Italiano 151e5be5ea [MC] Delete use of *structors_used.
Jim Grosbach and Kevin Enderby think those are not used anymore.
Originally submitted by: Rafael Espindola

llvm-svn: 277973
2016-08-08 03:30:01 +00:00
Davide Italiano e3b916d164 [SimplifyLibCalls] Emit sqrt intrinsic instead of a libcall.
llvm-svn: 277972
2016-08-08 03:23:01 +00:00
Eli Friedman 2a65dd1ba6 [SROA] Fix crash with lifetime intrinsic partially covering alloca.
Summary:
PromoteMemToReg looks specifically for the pattern
bitcast+lifetime.start (or a bitcast-equivalent GEP); any offset
will lead to an assertion failure.

Fixes https://llvm.org/bugs/show_bug.cgi?id=27999 .

Differential Revision: https://reviews.llvm.org/D22737

llvm-svn: 277969
2016-08-08 01:30:53 +00:00
Craig Topper f44423120f [AVX-512] Improve lowering of inserting a single element into lowest element of a 512-bit vector of zeroes by using vmovq/vmovd/vmovss/vmovsd.
llvm-svn: 277965
2016-08-07 21:52:59 +00:00
Davide Italiano 27da131f32 [SLC] Emit an intrinsic instead of a libcall for pow.
Differential Revision:  https://reviews.llvm.org/D22104

llvm-svn: 277963
2016-08-07 20:27:03 +00:00
Nico Weber 99ceee8a85 Revert r277905, it caused PR28894
llvm-svn: 277962
2016-08-07 20:18:04 +00:00
Craig Topper 2c51c74d52 [AVX-512] Add 512-bit logical operations to load folding tables. Add avx512f stack folding test and move some tests from the avx512vl test.
llvm-svn: 277961
2016-08-07 17:14:09 +00:00
Craig Topper 938e7ab9e1 [AVX-512] Add EVEX encoded floating point MAX/MIN instructions to the load folding tables.
llvm-svn: 277960
2016-08-07 17:14:05 +00:00
Simon Pilgrim 21c61fba45 [X86] lowerVectorShuffle - ensure that undefined mask elements only use SM_SentinelUndef
Help lowering and combining (which can specify SM_SentinelZero mask elements) share more shuffle matching code.

llvm-svn: 277959
2016-08-07 15:29:12 +00:00
Elena Demikhovsky dca03bebd3 AVX-512: Changed lowering of BITCAST between i1 vectors and i8/i16/i32 integer values
Optimized lowering of BITCAST node. The BITCAST node can be replaced with COPY_TO_REG instead of KMOV.
It allows to suppress two opposite BITCAST operations and avoid redundant "movs".

Differential Revision: https://reviews.llvm.org/D23247

llvm-svn: 277958
2016-08-07 13:05:58 +00:00
Simon Pilgrim 69f2299efc [X86][AVX512BW] Add sext/zext AVX512BW 512-bit vector tests
llvm-svn: 277957
2016-08-07 12:41:36 +00:00
Simon Pilgrim a23141eca7 [X86][AVX512] Add sext/zext to 512-bit vector tests
llvm-svn: 277956
2016-08-07 12:10:46 +00:00
Elena Demikhovsky 2fabdcc60a AVX-512: Added a test for cmp intrinsics
This is a new test that should explore a current suboptimal sequence in passing values between cmp and kor intrinsics.
The code will be optimized in an upcoming patch.

Submitted bug here:
https://llvm.org/bugs/show_bug.cgi?id=28839

llvm-svn: 277954
2016-08-07 09:29:34 +00:00
David Majnemer d150137f64 [InstSimplify] Fold gep (gep V, C), (sub 0, V) to C
llvm-svn: 277952
2016-08-07 07:58:12 +00:00
David Majnemer dc8767a49a [InstSimplify] Try hard to simplify pointer comparisons
Simplify ptrtoint comparisons involving operands with different source
types.

llvm-svn: 277951
2016-08-07 07:58:10 +00:00
David Majnemer 4e4f4437c2 [InstCombine] Infer inbounds on geps of allocas
llvm-svn: 277950
2016-08-07 07:58:00 +00:00
Craig Topper 49841c3812 [X86] Add commutable floating point max/min instructions to the load folding tables.
llvm-svn: 277949
2016-08-07 05:39:51 +00:00
Craig Topper 2c1f6706de [AVX-512] Add andnps/andnpd to the avx512vl stack folding test.
llvm-svn: 277948
2016-08-07 05:39:48 +00:00
Craig Topper c4d757093e [X86] Simplify a shuffle mask copy. NFC
llvm-svn: 277947
2016-08-07 05:39:46 +00:00
Michael Zolotukhin 442b82f0eb Revert "Revert "[LoopSimplify] Fix updating LCSSA after separating nested loops.""
This reverts commit r277901. Reaaply the commit as it looks like it has
nothing to do with the bots failures.

llvm-svn: 277946
2016-08-07 01:56:54 +00:00
Lang Hames 4679644c53 [ExecutionEngine][RuntimeDyld] Move JITSymbol from ExecutionEngine to RuntimeDyld.
JITSymbol really belongs in RuntimeDyld. This should fix the llvm-rtdyld link
failures caused by r277943.

llvm-svn: 277945
2016-08-07 01:19:37 +00:00
Lang Hames 71f089c82b [RuntimeDyld] Remove symbol that is unused as of r277943.
llvm-svn: 277944
2016-08-07 01:12:44 +00:00
Lang Hames 00769a0904 [RuntimeDyld] Replace manual flag checks with JITSymbolFlags::fromObjectSymbol.
llvm-svn: 277943
2016-08-07 00:18:14 +00:00
Lang Hames 73976f622d [ORC] Re-apply r277896, removing bogus triples and datalayouts that broke tests
on linux last time.

llvm-svn: 277942
2016-08-06 22:36:26 +00:00
Kostya Serebryany 728447bd3b [libFuzzer] make libFuzzer work with a bit older clang versions
llvm-svn: 277941
2016-08-06 21:28:56 +00:00
Kostya Serebryany ff1f2107ec [libFuzzer] don't print bogus error message
llvm-svn: 277940
2016-08-06 21:23:29 +00:00
Simon Pilgrim bc573ca1b8 [X86][AVX2] Improve sign/zero extension on AVX2 targets
Split extensions to large vectors into 256-bit chunks - the equivalent of what we do with pre-AVX2 into 128-bit chunks

llvm-svn: 277939
2016-08-06 21:21:12 +00:00
Gor Nishanov 28c889593a CoroSplit: Squash unused variable FnTrigger warning in NDEBUG
llvm-svn: 277938
2016-08-06 21:11:10 +00:00
Gor Nishanov 874651129e [Coroutines] Passify the build bots. Remove restart-trigger.ll test for now
llvm-svn: 277937
2016-08-06 21:01:22 +00:00
Gor Nishanov 2ed6e788a8 [Coroutines] Part 5: Add CGSCC restart trigger
Summary:
CoroSplit pass processes the coroutine twice. First, it lets it go through
complete IPO optimization pipeline as a single function. It forces restart
of the pipeline by inserting an indirect call to an empty function "coro.devirt.trigger"
which is devirtualized by CoroElide pass that triggers a restart of the pipeline by CGPassManager.
(In later patches, when CoroSplit pass sees the same coroutine the second time, it splits it up,
adds coroutine subfunctions to the SCC to be processed by IPO pipeline.)

Documentation and overview is here: http://llvm.org/docs/Coroutines.html.

Upstreaming sequence (rough plan)
1.Add documentation. (https://reviews.llvm.org/D22603)
2.Add coroutine intrinsics. (https://reviews.llvm.org/D22659)
3.Add empty coroutine passes. (https://reviews.llvm.org/D22847)
4.Add coroutine devirtualization + tests.
ab) Lower coro.resume and coro.destroy (https://reviews.llvm.org/D22998)
c) Do devirtualization (https://reviews.llvm.org/D23229)
5.Add CGSCC restart trigger + tests. <= we are here
6.Add coroutine heap elision + tests.
7.Add the rest of the logic (split into more patches)

Reviewers: mehdi_amini, majnemer

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23234

llvm-svn: 277936
2016-08-06 20:44:39 +00:00
Craig Topper 9d8676acc0 [AVX-512] Add SQRT/RCP14/RNDSCALE to hasUndefRegUpdate.
llvm-svn: 277934
2016-08-06 19:31:52 +00:00
Craig Topper 19505bc354 [AVX-512] Add AVX-512 scalar CVT instructions to hasUndefRegUpdate.
llvm-svn: 277933
2016-08-06 19:31:50 +00:00
Craig Topper b0476fcc1f [AVX-512] Add AVX512 run line to a test and re-generate the checks. Future commits will refine some of the sequences.
llvm-svn: 277932
2016-08-06 19:31:47 +00:00
Craig Topper f5d05fb0ce [X86] Add VRCPSSr_Int, VRSQRTSSr_Int, VSQRTSSr_Int, and VSQRTSDr_Int to hasUndefRegUpdate.
llvm-svn: 277931
2016-08-06 19:31:44 +00:00
Simon Pilgrim 7d168e19e8 [X86][SSE] Enable commutation between MOVHLPS and UNPCKHPD
Assuming SSE2 is available then we can safely commute between these, removing some unnecessary register moves and improving memory folding opportunities.

VEX encoded versions don't benefit so I haven't added support to them.

llvm-svn: 277930
2016-08-06 18:40:28 +00:00
Mike Aizatsky a8e84b9b37 [libfuzzer] do not warn about missing pcbuffer functions: they are new.
llvm-svn: 277927
2016-08-06 17:03:22 +00:00
Simon Pilgrim ef10e922d8 [X86][SSE] Regenerate SSE1 shuffle tests
llvm-svn: 277925
2016-08-06 13:46:09 +00:00
Benjamin Kramer 3f0c1e625d [ARM] Don't copy MCInsts in loop. NFC.
llvm-svn: 277924
2016-08-06 12:58:24 +00:00
Benjamin Kramer 41e66dade1 [Inliner] Use function_ref for functors which are never taken ownership of.
llvm-svn: 277922
2016-08-06 12:33:46 +00:00
Benjamin Kramer a3d4def878 [LoadCombine] Simplify code with a brace init. NFC.
llvm-svn: 277921
2016-08-06 12:11:11 +00:00
Simon Pilgrim f56309f11a [X86][SSE] Add 2 input shuffle support to matchBinaryVectorShuffle
Not actually used yet...

llvm-svn: 277919
2016-08-06 11:22:39 +00:00
Benjamin Kramer b7d3311c77 Move helpers into anonymous namespaces. NFC.
llvm-svn: 277916
2016-08-06 11:13:10 +00:00
David Majnemer 70c93fa69a [CodeGen] Fix a -Wdocumentation warning
A parameter was documented with the wrong name.
No functionality change is intended.

llvm-svn: 277915
2016-08-06 08:37:12 +00:00
David Majnemer a19d0f2f3e [ValueTracking] Teach computeKnownBits about [su]min/max
Reasoning about a select in terms of a min or max allows us to derive a
tigher bound on the result.

llvm-svn: 277914
2016-08-06 08:16:00 +00:00
David Majnemer 1665d8635e [CallGraphSCCPass] Use an ArrayRef instead of a pair of iterators
No functional change is intended.

llvm-svn: 277913
2016-08-06 06:21:02 +00:00
Chandler Carruth 9dd96d73f7 [ADT] Make the triple test 1000x faster through more focused test cases.
The current approach isn't a long-term viable pattern. Given the set of
architectures A, vendors V, operating systems O, and environments E, it
does |A| * |V| * |O| * |E| * 4! tests. As LLVM grows, this test keeps
getting slower, despite my working very hard to make it get some
"optimizations" even in -O0 builds in order to lower the constant
factors. Fundamentally, we're doing an unreasonable amount of work.i

Looking at the specific thing being tested -- the goal seems very
clearly to be testing the *permutations*, not the *combinations*. The
combinations are driving up the complexity much more than anything else.

Instead, test every possible value for a given triple entry in every
permutation of *some* triple. This really seems to cover the core goal
of the test. Every single possible triple component is tested in every
position. But because we keep the rest of the triple constant, it does
so in a dramatically more scalable amount of time. With this model we do
(|A| + |V| + |O| + |E|) * 4! tests.

For me on a debug build, this goes from running for 19 seconds to 19
milliseconds, or a 1000x improvement. This makes a world of difference
for the critical path of 'ninja check-llvm' and other extremely common
workflows.

Thanks to Renato, Dean, and David for the helpful review comments and
helping me refine the explanation of the change.

Differential Revision: https://reviews.llvm.org/D23156

llvm-svn: 277912
2016-08-06 06:00:50 +00:00
Sanjoy Das ba04d3a620 [InstCombine] Don't coerce non-integral pointers to integers
Reviewers: majnemer

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D23231

llvm-svn: 277910
2016-08-06 02:58:48 +00:00
Matthias Braun 9a0035d8d2 Revert "(refs/bisect/bad) GVN-hoist: enable by default"
GVN-Hoist appears to miscompile llvm-testsuite
SingleSource/Benchmarks/Misc/fbench.c at the moment.

I filed http://llvm.org/PR28880

This reverts commit r277786.

llvm-svn: 277909
2016-08-06 02:23:15 +00:00
Gor Nishanov 31d8c9af89 Part 4c: Coroutine Devirtualization: Devirtualize coro.resume and coro.destroy.
Summary:
This is the 4c patch of the coroutine series. CoroElide pass now checks if PostSplit coro.begin
is referenced by coro.subfn.addr intrinsics. If so replace coro.subfn.addrs with an appropriate coroutine
subfunction associated with that coro.begin.

Documentation and overview is here: http://llvm.org/docs/Coroutines.html.

Upstreaming sequence (rough plan)
1.Add documentation. (https://reviews.llvm.org/D22603)
2.Add coroutine intrinsics. (https://reviews.llvm.org/D22659)
3.Add empty coroutine passes. (https://reviews.llvm.org/D22847)
4.Add coroutine devirtualization + tests.
ab) Lower coro.resume and coro.destroy (https://reviews.llvm.org/D22998)
c) Do devirtualization <= we are here
5.Add CGSCC restart trigger + tests.
6.Add coroutine heap elision + tests.
7.Add the rest of the logic (split into more patches)

Reviewers: majnemer

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D23229

llvm-svn: 277908
2016-08-06 02:16:35 +00:00
Nico Weber c893e603ab Revert r277896.
It breaks ExecutionEngine/OrcLazy/weak-function.ll on most bots.

Script:
--
...
--
Exit Code: 1

Command Output (stderr):
--
Could not find main function.

llvm-svn: 277907
2016-08-06 02:00:45 +00:00
Kyle Butt 71cb44d969 CodeGen: If Convert blocks that would form a diamond when tail-merged.
The following function currently relies on tail-merging for if
conversion to succeed. The common tail of cond_true and cond_false is
extracted, and this then forms a diamond pattern that can be
successfully if converted.

If this block does not get extracted, either because tail-merging is
disabled or the threshold is higher, we should still recognize this
pattern and if-convert it.
define i32 @t2(i32 %a, i32 %b) nounwind {
entry:
	%tmp1434 = icmp eq i32 %a, %b		; <i1> [#uses=1]
	br i1 %tmp1434, label %bb17, label %bb.outer

bb.outer:		; preds = %cond_false, %entry
	%b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ]
	%a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ]
	br label %bb

bb:		; preds = %cond_true, %bb.outer
	%indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ]
	%tmp. = sub i32 0, %b_addr.021.0.ph
	%tmp.40 = mul i32 %indvar, %tmp.
	%a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph
	%tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph
	br i1 %tmp3, label %cond_true, label %cond_false

cond_true:		; preds = %bb
	%tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph
	%tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph
	%indvar.next = add i32 %indvar, 1
	br i1 %tmp1437, label %bb17, label %bb

cond_false:		; preds = %bb
	%tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0
	%tmp14 = icmp eq i32 %a_addr.026.0, %tmp10
	br i1 %tmp14, label %bb17, label %bb.outer

bb17:		; preds = %cond_false, %cond_true, %entry
	%a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ]
	ret i32 %a_addr.026.1
}

Without tail-merging or diamond-tail if conversion:
LBB1_1:                                 @ %bb
                                        @ =>This Inner Loop Header: Depth=1
        cmp     r0, r1
        ble     LBB1_3
@ BB#2:                                 @ %cond_true
                                        @   in Loop: Header=BB1_1 Depth=1
        subs    r0, r0, r1
        cmp     r1, r0
        it      ne
        cmpne   r0, r1
        bgt     LBB1_4
LBB1_3:                                 @ %cond_false
                                        @   in Loop: Header=BB1_1 Depth=1
        subs    r1, r1, r0
        cmp     r1, r0
        bne     LBB1_1
LBB1_4:                                 @ %bb17
        bx      lr

With diamond-tail if conversion, but without tail-merging:
@ BB#0:                                 @ %entry
        cmp     r0, r1
        it      eq
        bxeq    lr
LBB1_1:                                 @ %bb
                                        @ =>This Inner Loop Header: Depth=1
        cmp     r0, r1
        ite     le
        suble   r1, r1, r0
        subgt   r0, r0, r1
        cmp     r1, r0
        bne     LBB1_1
@ BB#2:                                 @ %bb17
        bx      lr

llvm-svn: 277905
2016-08-06 01:52:37 +00:00
Kyle Butt 54bf3cef92 IfConverter: Split ScanInstructions into 2 functions.
ScanInstructions is now 2 functions:
AnalyzeBranches and ScanInstructions. ScanInstructions also now takes a
pair of arguments delimiting the instructions to be scanned. This will
be used for forked diamond support to re-scan only a portion of the
block.

llvm-svn: 277904
2016-08-06 01:52:34 +00:00
Kyle Butt 4f0e287906 IfConversion: Document countDuplicatedInstructions. NFC
llvm-svn: 277903
2016-08-06 01:52:33 +00:00
Kyle Butt fe916828ee IfConversion: factor out 2 functions to skip debug instrs. NFC
Skipping debug instructions occurrs repeatedly, factor it out.

llvm-svn: 277902
2016-08-06 01:52:31 +00:00
Michael Zolotukhin 09cf304ebc Revert "[LoopSimplify] Fix updating LCSSA after separating nested loops."
This reverts commit r277877.
Try to appease clang-x64-ninja-win7 buildbot.

llvm-svn: 277901
2016-08-06 01:48:51 +00:00
Lang Hames 62a459603c [ORC] Add (partial) weak symbol support to the CompileOnDemand layer.
This adds partial support for weak functions to the CompileOnDemandLayer by
modifying the addLogicalModule method to check for existing stub definitions
before building a new stub for a weak function. This scheme is sufficient to
support ODR definitions, but fails for general weak definitions if strong
definition is encountered after the first weak definition. (A more extensive
refactor will be required to fully support weak symbols).

This patch does *not* add weak symbol support to RuntimeDyld: I hope to add
that in the near future.

llvm-svn: 277896
2016-08-06 00:54:43 +00:00
Zachary Turner 83816cea35 Fix a -Wunused-const-variable due to a bug in clang.
llvm-svn: 277893
2016-08-06 00:13:32 +00:00
Sanjoy Das b8c2ebea08 [IRCE] Remove unused headers; NFC
llvm-svn: 277892
2016-08-06 00:02:01 +00:00
Sanjoy Das cf181867a6 [IRCE] Preserve loop-simplify form
Fixes PR28764.  Right now there is no way to test this, but (as
mentioned on the PR) with Michael Zolotukhin's yet to be checked in
LoopSimplify verfier, 8 of the llvm-lit tests for IRCE crash.

llvm-svn: 277891
2016-08-06 00:01:56 +00:00
Zachary Turner 9e91c28b71 Resubmit "Make YAML support SmallVector"
This resubmits a3770391c5fb64108d565e12f61dd77ce71b5b4f,
which was reverted due to breakages on non-Windows machines.

Due to differences in template instantiation rules on Microsoft
and non-Microsoft platforms, a member access restriction was
triggering on non-Microsoft compilers.  Previously, a friend
declaration for std::vector<> had been introduced into the
DebugMap class to make the member access restriction pass,
but the introduction of support for SmallVector<> meant that
an additional friend declaration would need to be added.

This didn't really make a lot of sense since the user of the
macro is probably only using one type (SmallVector<>, vector<>,
etc) and we could in theory add support for even more types
to this macro in the future (e.g. std::deque), so rather than
add another friend declaration, I just made the type being
referenced a public nested typedef instead of a private nested
typedef.

llvm-svn: 277888
2016-08-05 23:12:31 +00:00
Sanjay Patel 8e3ab17c44 [InstCombine] refactor ctlz/cttz folds (NFCI)
Note that this fold really belongs in InstSimplify.
Refactoring here anyway as an intermediate step because
there's a planned addition to this function in D23134.

Differential Revision: https://reviews.llvm.org/D23223

llvm-svn: 277883
2016-08-05 22:42:46 +00:00
Justin Bogner 1219a60e26 Revert "Make YAML support SmallVector"
This breaks building dsymutil, causing my local build and many bots to
fail.

This reverts r277870.

llvm-svn: 277881
2016-08-05 22:32:33 +00:00
Daniel Berlin 7ac3d74017 [MSSA] Use depth first iterator instead of custom version.
Summary:
Originally the plan was to use the custom worklist to do some block popping,
and because we don't actually need a visited set. The custom one we have
here is slightly broken, and it's not worth fixing vs using depth_first_iterator since we aren't going to go the route we originally
were.

Fixes PR28874
Reviewers: george.burgess.iv

Subscribers: llvm-commits, gberry

Differential Revision: https://reviews.llvm.org/D23187

llvm-svn: 277880
2016-08-05 22:09:14 +00:00
Justin Bogner 272cbacc25 CodeView: Remove an unused variable
It was breaking the -Werror build.

llvm-svn: 277878
2016-08-05 21:57:10 +00:00
Michael Zolotukhin 4c65c3596a [LoopSimplify] Fix updating LCSSA after separating nested loops.
This fixes PR28825. The problem was that we only checked if a value from
a created inner loop is used in the outer loop, and fixed LCSSA for
them. But we missed to fixup LCSSA for values used in exits of the outer
loop.

llvm-svn: 277877
2016-08-05 21:52:58 +00:00
Zachary Turner 5e35eaac83 Fix non portable include path.
llvm-svn: 277876
2016-08-05 21:50:02 +00:00
Justin Bogner 6863027f00 PowerPC: Add a triple to this test
This is running opt without specifying a triple, which isn't correct.

llvm-svn: 277875
2016-08-05 21:49:54 +00:00
Daniel Berlin 7af95876cf [MSSA] Match assert vs llvm_unreachable style in verification functions.
llvm-svn: 277873
2016-08-05 21:47:20 +00:00
Daniel Berlin 2919b1c41b Rewrite domination verifier to handle local domination as well.
Summary:
Rewrite domination verifier to handle local domination as well.
This catches a bug Geoff Berry noticed.

Reviewers: george.burgess.iv

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23184

llvm-svn: 277872
2016-08-05 21:46:52 +00:00
Zachary Turner 5e3e4bb26b [CodeView] Decouple record deserialization from visitor dispatch.
Until now, our use case for the visitor has been to take a stream of bytes
representing a type stream, deserialize the records in sequence, and do
something with them, where "something" is determined by how the user
implements a particular set of callbacks on an abstract class.

For actually writing PDBs, however, we want to do the reverse. We have
some kind of description of the list of records in their in-memory format,
and we want to process each one. Perhaps by serializing them to a byte
stream, or perhaps by converting them from one description format (Yaml)
to another (in-memory representation).

This was difficult in the current model because deserialization and
invoking the callbacks were tightly coupled.

With this patch we change this so that TypeDeserializer is itself an
implementation of the particular set of callbacks. This decouples
deserialization from the iteration over a list of records and invocation
of the callbacks.  TypeDeserializer is initialized with another
implementation of the callback interface, so that upon deserialization it
can pass the deserialized record through to the next set of callbacks. In
a sense this is like an implementation of the Decorator design pattern,
where the Deserializer is a decorator.

This will be useful for writing Pdbs from yaml, where we have a
description of the type records in Yaml format. In this case, the visitor
implementation would have each visitation callback method implemented in
such a way as to extract the proper set of fields from the Yaml, and it
could maintain state that builds up a list of these records. Finally at
the end we can pass this information through to another set of callbacks
which serializes them into a byte stream.

Reviewed By: majnemer, ruiu, rnk
Differential Revision: https://reviews.llvm.org/D23177

llvm-svn: 277871
2016-08-05 21:45:34 +00:00
Zachary Turner 9c3dac8efd Make YAML support SmallVector
Currently YAML sequences require std::vectors. All of the methods that the
YAML parser accesses though are present in SmallVector, so there's no
reason we can't support SmallVector inherently. This patch does that.

Reviewed By: majnemer
Differential Revision: https://reviews.llvm.org/D23213

llvm-svn: 277870
2016-08-05 21:45:19 +00:00
Marek Olsak 355a8642b4 AMDGPU/SI: Increase SGPR limit to 96 on Tonga/Iceland
Summary:
This is the setting of the Vulkan closed source driver.

It decreases the max wave count from 10 to 8.

26010 shaders in 14650 tests
Totals:
VGPRS: 829593 -> 808440 (-2.55 %)
Spilled SGPRs: 81878 -> 42226 (-48.43 %)
Spilled VGPRs: 367 -> 358 (-2.45 %)
Scratch VGPRs: 1764 -> 1748 (-0.91 %) dwords per thread
Code Size: 36677864 -> 35923932 (-2.06 %) bytes

There is a massive decrease in SGPR spilling in general and -7.4% spilled
VGPRs for DiRT Showdown (= SGPRs spilled to scratch?)

Reviewers: arsenm, tstellarAMD, nhaehnle

Subscribers: arsenm, llvm-commits, kzhuravl

Differential Revision: https://reviews.llvm.org/D23034

llvm-svn: 277867
2016-08-05 21:23:29 +00:00
Weiming Zhao f68a6a720c [ARM] Constant Materialize: imms with specific value can be encoded into mov.w
Summary: Thumb2 supports encoding immediates with specific patterns into mov.w by splatting the low 8 bits into other bytes.

I'm resubmitting this patch. The test case in the original commit
r277610 does not specify triple, so builds with differnt default triple
will have different output.

This patch fixed trile as thumb-darwin-apple.

Reviewers: john.brawn, jmolloy, bruno

Subscribers: jmolloy, aemerson, rengolin, samparker, llvm-commits

Differential Revision: https://reviews.llvm.org/D23090

llvm-svn: 277865
2016-08-05 20:58:29 +00:00
Davide Italiano 500929df9c [FlattenCFG] Simplify + remove unused variable. NFCI.
llvm-svn: 277864
2016-08-05 20:53:35 +00:00
Dehao Chen e1c7c57d11 Remove cold callsite heuristic that is not necessary because of cold callee heuristic.
llvm-svn: 277863
2016-08-05 20:49:04 +00:00
Sanjoy Das d4c85af7fd [SCEV] Un-grep'ify tests; NFC
llvm-svn: 277861
2016-08-05 20:33:49 +00:00
Dehao Chen de39cb9384 Replace hot-callsite based heuristic to use its own threshold parameter instead of share inline-hint parameter
Summary: Hot callsites should have higher threshold than inline hints. This patch uses separate threshold parameter for hot callsites.

Reviewers: davidxl, eraman

Subscribers: Prazek, llvm-commits

Differential Revision: https://reviews.llvm.org/D22368

llvm-svn: 277860
2016-08-05 20:28:41 +00:00
Mike Aizatsky b4bbc3bb7a [sanitizers] trace buffer API to use user-allocated buffer.
Differential Revision: https://reviews.llvm.org/D23185

llvm-svn: 277859
2016-08-05 20:09:53 +00:00
Mehdi Amini 0dd5b79e18 Update outdated comments in the new PM internals (NFC)
The analysis manager was made not optional and turned into a
reference instead of a pointer in r272978. Some comments were
still refering to the previous behavior.

llvm-svn: 277857
2016-08-05 19:51:00 +00:00
Ivan Krasin b05e06e4fd WholeProgramDevirt: print remarks with devirtualized method names.
Summary:
Chrome on Linux uses WholeProgramDevirt for speed ups, and it's
important to detect regressions on both sides: the toolchain,
if fewer methods get devirtualized after an update, and Chrome,
if an innocently looking change caused many hot methods become
virtual again.

The need to track devirtualized methods is not Chrome-specific,
but it's probably the only user of the pass at this time.

Reviewers: kcc

Differential Revision: https://reviews.llvm.org/D23219

llvm-svn: 277856
2016-08-05 19:45:16 +00:00
David Callahan 45e442ebaa [ADCE] Refactoring for new functionality (NFC)
Summary:
This is another refactoring to break up the one function into three logical components functions.
Another non-functional change before we start added in features.

Reviewers: nadav, mehdi_amini, majnemer

Subscribers: twoh, freik, llvm-commits

Differential Revision: https://reviews.llvm.org/D23102

llvm-svn: 277855
2016-08-05 19:38:11 +00:00
Sanjoy Das 6fa08aafcc [ConstantFolding] Don't create illegal (non-integral) inttoptrs
Reviewers: majnemer, arsenm

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D23182

llvm-svn: 277854
2016-08-05 19:23:29 +00:00
Sanjay Patel 344e25f13b fix documentation comments; NFC
llvm-svn: 277853
2016-08-05 19:09:25 +00:00
David Callahan c1c810de0b [AutoFDO] Fix handling of empty profiles
Summary:
If a profile has no samples for a function, then the function "entry count" is set to the value 0. Several places in the code test that if the Function::getEntryCount is defined at all. Here we change to treat a 0 entry count the same as undefined.

In particular, this fixes a problem in getLayoutSuccessorProbThreshold in MachineBlockPlacement.cpp where we use a different and inferior heuristic for laying out basic blocks.

Reviewers: danielcdh, dnovillo

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23082

llvm-svn: 277849
2016-08-05 18:38:19 +00:00
Sanjoy Das b0b4e86215 [SCEV] Don't infinitely recurse on unreachable code
llvm-svn: 277848
2016-08-05 18:34:14 +00:00
Lang Hames 2a04a99ce6 [ORC] Change LogicalDylib::LogicalModuleHandle from an iterator to an index.
This prevents handles from being invalidated (through iterator invalidation)
when new modules are added.

No test-case yet: This bug was uncovered during work on an upcoming patch for
weak symbol support and the testcase for that feature will implicitly test for
correct behavior here.

llvm-svn: 277847
2016-08-05 18:26:56 +00:00
Kevin Enderby 600fb3f28e Add the first of what will be a long line of additional error checks for invalid Mach-O files.
This is where an LC_SEGMENT load command has a fileoff field that
extends past the end of the file.

Also fix llvm-nm and llvm-size to remove the errorToErrorCode() call so error messages are printed.
And needed to update a few test cases now that they do print the error messages just a
bit differently.

llvm-svn: 277845
2016-08-05 18:19:40 +00:00
Dehao Chen 17c6afc35b Do not assign new discriminator for all intrinsics.
Summary: We do not care about intrinsic calls when assigning discriminators.

Reviewers: davidxl, dnovillo

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23212

llvm-svn: 277843
2016-08-05 17:56:49 +00:00
Tim Northover 14e7f73a0f GlobalISel: clear pending phis after MachineFunction translated
Test is just reordering the existing functions (it would trigger for any
function after one with a phi).

llvm-svn: 277841
2016-08-05 17:50:36 +00:00
Simon Pilgrim 69b6a70834 [X86][SSE] Add initial support for 2 input target shuffle combining.
At the moment only the INSERTPS matching can actually use 2 inputs but the plumbing is now in place.

llvm-svn: 277839
2016-08-05 17:36:14 +00:00
Tim Northover 97d0cb3165 GlobalISel: IRTranslate PHI instructions
llvm-svn: 277835
2016-08-05 17:16:40 +00:00
Igor Kudrin a097a36e2a Fix gdb pretty printers to work with Python 3.
Differential Revision: https://reviews.llvm.org/D23202

llvm-svn: 277833
2016-08-05 16:48:31 +00:00
Zachary Turner 67cb90ba95 Fix TargetParser unit tests for ARM / AArch64.
String pooling is not guaranteed by the standard, so if
you're comparing two different string literals for equality,
you have to use strcmp.

llvm-svn: 277831
2016-08-05 16:45:07 +00:00
Gor Nishanov f3bb361750 opt: Adding -O0 to opt tool
Summary:
Having -O0 in opt allows testing that -O0 optimization
pipeline is built correctly.

Reviewers: majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23208

llvm-svn: 277829
2016-08-05 16:27:33 +00:00
Ulrich Weigand c3b495a649 [PowerPC] Wrong fast-isel codegen for VSX floating-point loads
There were two locations where fast-isel would generate a LFD instruction
with a target register class VSFRC instead of F8RC when VSX was enabled.
This can ccause invalid registers to be used in certain cases, like:
   lfd 36, ...
instead of using a VSX load instruction.  The wrong register number gets
silently truncated, causing invalid code to be generated.


The first place is PPCFastISel::PPCEmitLoad, which had multiple problems:

1.) The IsVSSRC and IsVSFRC flags are not initialized correctly, since they
are computed from resultReg, which is still zero at this point in many cases.
Fixed by changing the helper routines to operate on a register class instead
of a register and passing in UseRC.
 
2.) Even with this fixed, Is64VSXLoad is still wrong due to a typo:

bool Is32VSXLoad = IsVSSRC && Opc == PPC::LFS;
bool Is64VSXLoad = IsVSSRC && Opc == PPC::LFD;

The second line needs to use isVSFRC (like PPCEmitStore does).

3.) Once both the above are fixed, we're now generating a VSX instruction --
but an incorrect one, since generation of an indexed instruction with null
index is wrong. Fixed by copying the code handling the same issue in
PPCEmitStore.


The second place is PPCFastISel::PPCMaterializeFP, where we would emit an
LFD to load a constant from the literal pool, and use the wrong result
register class. Fixed by hardcoding a F8RC class even on systems
supporting VSX.


Fixes: https://llvm.org/bugs/show_bug.cgi?id=28630

Differential Revision: https://reviews.llvm.org/D22632

llvm-svn: 277823
2016-08-05 15:22:05 +00:00
Zhan Jun Liau 8d3f29759f [SystemZ] Add missing classes and instructions
Summary:
Add instruction formats E, RSI, SSd, SSE, and SSF.

Added BRXH, BRXLE, PR, MVCK, STRAG, and ECTG instructions to test out
those formats.

Reviewers: uweigand

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23179

llvm-svn: 277822
2016-08-05 15:14:34 +00:00
Benjamin Kramer 000a87d1b0 Actually, r277337 was fine. Just kill the DAGs that made the test allow nondeterminism.
llvm-svn: 277821
2016-08-05 14:58:34 +00:00
Benjamin Kramer aa160c22f7 [SimplifyCFG] Make range reduction code deterministic.
This generated IR based on the order of evaluation, which is different
between GCC and Clang. With that in mind you get bootstrap miscompares
if you compare a Clang built with GCC-built Clang vs. Clang built with
Clang-built Clang. Diagnosing that made my head hurt.

This also reverts commit r277337, which "fixed" the test case.

llvm-svn: 277820
2016-08-05 14:55:02 +00:00
Sanjay Patel 5a9b9f98c0 reduce tests; auto-generate checks
llvm-svn: 277819
2016-08-05 14:50:11 +00:00
Simon Pilgrim 24dc1e7a90 [X86][SSE] Update the the target shuffle matches to use the effective mask's value type directly instead of via the input value type.
Preparation for adding 2 input support so we want to avoid unnecessary references to the input value type.

llvm-svn: 277817
2016-08-05 14:33:11 +00:00
Gor Nishanov 341ecba9e6 testing commit access
llvm-svn: 277816
2016-08-05 13:17:06 +00:00
Simon Pilgrim 7080005e67 [X86][SSE] Consistently use the target shuffle root value type for vector size calculations. NFCI.
Preparation for adding 2 input support so we want to avoid unnecessary references to the input value type.

llvm-svn: 277814
2016-08-05 13:02:53 +00:00
NAKAMURA Takumi f72c663ac5 LLLexer.cpp: Avoid using BitsToDouble() to preserve SNaN like "double 0x7FF4000000000000".
We should not use double (or float) in the LLVM, unless it is really needed. x87 FP register doesn't preserve SNaN to move the value.

FIXME: APFloat() may have the constructor by raw bit.
llvm-svn: 277813
2016-08-05 11:59:49 +00:00
NAKAMURA Takumi 2b8c774ce7 Reformat.
llvm-svn: 277812
2016-08-05 11:59:45 +00:00
John Brawn 75127944b6 Add a missing backslash to my previous commit
llvm-svn: 277809
2016-08-05 11:17:43 +00:00
Simon Pilgrim 6f7b0cd530 [X86][SSE] Added target shuffle combine binary compute matching function. NFCI.
Added matchBinaryPermuteVectorShuffle and moved the blend+zero and insertps matching code into it.

llvm-svn: 277808
2016-08-05 11:16:53 +00:00
John Brawn 4d79ec7fe8 Reapply r276973 "Adjust Registry interface to not require plugins to export a registry"
This differs from the previous version by being more careful about template
instantiation/specialization in order to prevent errors when building with
clang -Werror. Specifically:
 * begin is not defined in the template and is instead instantiated when Head
   is. I think the warning when we don't do that is wrong (PR28815) but for now
   at least do it this way to avoid the warning.
 * Instead of performing template specializations in LLVM_INSTANTIATE_REGISTRY
   instead provide a template definition then do explicit instantiation. No
   compiler I've tried has problems with doing it the other way, but strictly
   speaking it's not permitted by the C++ standard so better safe than sorry.

Original commit message:

Currently the Registry class contains the vestiges of a previous attempt to
allow plugins to be used on Windows without using BUILD_SHARED_LIBS, where a
plugin would have its own copy of a registry and export it to be imported by
the tool that's loading the plugin. This only works if the plugin is entirely
self-contained with the only interface between the plugin and tool being the
registry, and in particular this conflicts with how IR pass plugins work.

This patch changes things so that instead the add_node function of the registry
is exported by the tool and then imported by the plugin, which solves this
problem and also means that instead of every plugin having to export every
registry they use instead LLVM only has to export the add_node functions. This
allows plugins that use a registry to work on Windows if
LLVM_EXPORT_SYMBOLS_FOR_PLUGINS is used.

llvm-svn: 277806
2016-08-05 11:01:08 +00:00
Strahinja Petrovic 30e0ce8e9f [PowerPC] fix passing long double arguments to function (soft-float)
This patch fixes passing long double type arguments to function in 
soft float mode. If there is less than 4 argument registers free 
(long double type is mapped in 4 gpr registers in soft float mode) 
long double type argument must be passed through stack.
Differential Revision: https://reviews.llvm.org/D20114.

llvm-svn: 277804
2016-08-05 08:47:26 +00:00
Nicolai Haehnle 870bf1788c [InstCombine] try to fold (select C, (sext A), B) into logical ops
Summary:
Turn (select C, (sext A), B) into (sext (select C, A, B')) when A is i1 and
B is a compatible constant, also for zext instead of sext. This will then be
further folded into logical operations.

The transformation would be valid for non-i1 types as well, but other parts of
InstCombine prefer to have sext from non-i1 as an operand of select.

Motivated by the shader compiler frontend in Mesa for AMDGPU, which emits i32
for boolean operations. With this change, the boolean logic is fully
recovered.

Reviewers: majnemer, spatel, tstellarAMD

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D22747

llvm-svn: 277801
2016-08-05 08:22:29 +00:00
Justin Bogner c7e4fbe11c InstCombine: Clean up some trailing whitespace. NFC
llvm-svn: 277793
2016-08-05 01:09:48 +00:00
Justin Bogner 9979840f59 InstCombine: Replace some never-null pointers with references. NFC
llvm-svn: 277792
2016-08-05 01:06:44 +00:00
Bruno Cardoso Lopes 358e60a6b3 [LIT][Darwin] Change %ld64 to be prefixed with DYLD_INSERT_LIBRARIES
Followup from r277778, after Mehdi's comments.

Expand %ld64 to perform the necessary preload instead, that way new
tests do not need to worry about setting up DYLD_INSERT_LIBRARIES
themselves.

rdar://problem/24300926

llvm-svn: 277788
2016-08-04 23:58:30 +00:00
Sebastian Pop c33f0e25c9 GVN-hoist: enable by default
llvm-svn: 277786
2016-08-04 23:49:07 +00:00
Sebastian Pop 429740a6c2 GVN-hoist: fix early exit logic
The patch splits a complex && if condition into easier to read and understand
logic.  That wrong early exit condition was letting some instructions with not
all operands available pass through when HoistingGeps was true.

Differential Revision: https://reviews.llvm.org/D23174

llvm-svn: 277785
2016-08-04 23:49:05 +00:00
Justin Bogner 19dd0da153 IR: Provide an IRBuilder Inserter that calls a callback after insertion
Add a generalized IRBuilderCallbackInserter, which is just given a
callback to execute after insertion. This can be used to get rid of
the custom inserter in InstCombine, which will in turn allow me to add
target specific InstCombineCalls API for intrinsics without horrible
layering violations.

llvm-svn: 277784
2016-08-04 23:41:01 +00:00
Michael Kuperstein 3ceac2bbd5 [LV, X86] Be more optimistic about vectorizing shifts.
Shifts with a uniform but non-constant count were considered very expensive to
vectorize, because the splat of the uniform count and the shift would tend to
appear in different blocks. That made the splat invisible to ISel, and we'd
scalarize the shift at codegen time.

Since r201655, CodeGenPrepare sinks those splats to be next to their use, and we
are able to select the appropriate vector shifts. This updates the cost model to
to take this into account by making shifts by a uniform cheap again.

Differential Revision: https://reviews.llvm.org/D23049

llvm-svn: 277782
2016-08-04 22:48:03 +00:00
Sanjay Patel 3bade138b5 [InstCombine] use m_APInt to allow icmp eq (mul X, C1), C2 folds for splat constant vectors
This concludes the splat vector enhancements for foldICmpEqualityWithConstant().
Other commits in this series:
https://reviews.llvm.org/rL277762
https://reviews.llvm.org/rL277752
https://reviews.llvm.org/rL277738
https://reviews.llvm.org/rL277731
https://reviews.llvm.org/rL277659
https://reviews.llvm.org/rL277638
https://reviews.llvm.org/rL277629

llvm-svn: 277779
2016-08-04 22:19:27 +00:00
Bruno Cardoso Lopes 8daab7582b [LIT][Darwin] Preload libclang_rt.asan_osx_dynamic.dylib when necessary
Green Dragon's darwin stage2 asan bot fails on some checks:
http://lab.llvm.org:8080/green/job/clang-stage2-cmake-RgSan_check

  test/tools/lto/hide-linkonce-odr.ll
  test/tools/lto/opt-level.ll

ERROR: Interceptors are not working. This may be because
AddressSanitizer is loaded too late (e.g. via dlopen)

To fix this, %ld64 needs to load 'libclang_rt.asan_osx_dynamic.dylib'
before libLTO.dylib, via DYLD_INSERT_LIBRARIES. This won't work by
updating config.environment, since some shim binary in the way scrubs
the env vars. Instead, provide the path to this lib through %asanrtlib,
which can then be used by tests directly with DYLD_INSERT_LIBRARIES.

rdar://problem/24300926

llvm-svn: 277778
2016-08-04 22:01:38 +00:00
Kevin Enderby 2c18270075 Clean up the logic of the Archive::Child::Child() with an assert to know Err is not a nullptr
when we are pointed at real data.

David Blaikie pointed out some odd logic in the case the Err value was a nullptr and
Lang Hames suggested it could be cleaned it up with an assert to know that Err is
not a nullptr when we are pointed at real data.  As only in the case of constructing
the sentinel value by pointing it at null data is Err is permitted to be a nullptr,
since no error could occur in that case.

With this change the testing for “if (Err)” is removed from the constructor’s logic
and *Err is used directly without any check after the assert().

llvm-svn: 277776
2016-08-04 21:54:19 +00:00
Tim Northover 61c16142b4 GlobalISel: extend add widening to SUB, MUL, OR, AND and XOR.
These are the operations that are trivially identical. Division is omitted for
now because you need to use the correct sign/zero extension.

llvm-svn: 277775
2016-08-04 21:39:49 +00:00
Tim Northover 1cfa919b3d GlobalISel: add support for G_MUL
llvm-svn: 277774
2016-08-04 21:39:44 +00:00
David Majnemer b48ed0f721 [CloneFunction] Add a testcase for r277691/r277693
PR28848 had a very nice reduction of the underlying cause of the bug.
Our ValueMap had, in an entry for an Instruction, a ConstantInt.

This is not at all unexpected but should be handled properly.

llvm-svn: 277773
2016-08-04 21:28:59 +00:00
Chris Bieneman 17e42a0980 [Mach0YAML] Change n_type from uint8_t to llvm::yaml::Hex8
Since this field is generally masked, it is way easier to understand it as a Hex value than decimal.

llvm-svn: 277770
2016-08-04 21:07:39 +00:00
Tim Northover 9656f1476c GlobalISel: implement narrowing for G_ADD.
llvm-svn: 277769
2016-08-04 20:54:13 +00:00
Tim Northover 404f1b7db5 GlobalISel: refuse to halve size of 1-byte & odd-sized LLTs.
llvm-svn: 277768
2016-08-04 20:54:05 +00:00
Matt Arsenault 6ad97732aa GVNHoist: Don't hoist convergent calls
llvm-svn: 277767
2016-08-04 20:52:57 +00:00
Lang Hames aac59a26a5 [ExecutionEngine] Refactor - Roll JITSymbolFlags functionality into JITSymbol.h
and remove the JITSymbolFlags header.

llvm-svn: 277766
2016-08-04 20:32:37 +00:00
David Majnemer f93082e71a [coroutines] Part 4[ab]: Coroutine Devirtualization: Lower coro.resume and coro.destroy.
This is the forth patch in the coroutine series. CoroEaly pass now lowers coro.resume
and coro.destroy intrinsics by replacing them with an indirect call to an address
returned by coro.subfn.addr intrinsic. This is done so that CGPassManager recognizes
devirtualization when CoroElide replaces a call to coro.subfn.addr with an appropriate
function address.

Patch by Gor Nishanov!

Differential Revision: https://reviews.llvm.org/D22998

llvm-svn: 277765
2016-08-04 20:30:07 +00:00
Sanjay Patel d938e88e89 [InstCombine] use m_APInt to allow icmp eq (and X, C1), C2 folds for splat constant vectors
llvm-svn: 277762
2016-08-04 20:05:02 +00:00
Yaxun Liu 86c052238a [OpenCL] Add missing tests for getOCLTypeName
Adding missing tests for OCL type names for half, float, double, char, short, long, and unknown.

Patch by Aaron En Ye Shi.

Differential Revision: https://reviews.llvm.org/D22964

llvm-svn: 277759
2016-08-04 19:45:00 +00:00
Zachary Turner 660230eba4 [CodeView] Use llvm::Error instead of std::error_code.
This eliminates the remnants of std::error_code from the
DebugInfo libraries.

llvm-svn: 277758
2016-08-04 19:39:55 +00:00
Tim Northover 2f32e7f0ac AArch64: don't assume all i128s are BUILD_PAIRs
It leads to a crash when they're not. I'm *sure* I've made this mistake before,
at least once.

llvm-svn: 277755
2016-08-04 19:32:28 +00:00
Chris Bieneman 9f749c8e03 [macho2yaml] String table can contain null strings
Since the string table being read from the MachO is a properly bounded StringRef including null strings is safe and reasonable.

This occurs frequently with stripped binaries where the string table has been modified.

llvm-svn: 277753
2016-08-04 19:19:25 +00:00
Sanjay Patel b3de75d3a0 [InstCombine] use m_APInt to allow icmp eq (or X, C1), C2 folds for splat constant vectors
llvm-svn: 277752
2016-08-04 19:12:12 +00:00
Tim Northover 06db18fbf8 GlobalISel: also add G_TRUNC to IRTranslator.
llvm-svn: 277749
2016-08-04 18:35:17 +00:00
Tim Northover 323358184e GlobalISel: add code to widen scalar G_ADD
llvm-svn: 277747
2016-08-04 18:35:11 +00:00
Sanjay Patel 80f2eec4b2 remove FIXME comments (fixed with r277738)
llvm-svn: 277744
2016-08-04 18:14:02 +00:00
Derek Schuff 732636d901 [WebAssembly] Check return value of getRegForValue in FastISel
Previously, FastISel for WebAssembly wasn't checking the return value of
`getRegForValue` in certain cases, which would generate instructions
referencing NoReg. This patch fixes this behavior.

Patch by Dominic Chen

Differential Revision: https://reviews.llvm.org/D23100

llvm-svn: 277742
2016-08-04 18:01:52 +00:00
Vedant Kumar ad547d361e [llvm-cov] Add some documentation for the -tab-size option
Also, un-hide the cl::opt.

llvm-svn: 277741
2016-08-04 18:00:42 +00:00
Krzysztof Parzyszek 04c0796e37 [Hexagon] Validate register class when doing bit simplification
llvm-svn: 277740
2016-08-04 17:56:19 +00:00
Sanjay Patel bcaf6f39dd [InstCombine] use m_APInt to allow icmp eq (op X, Y), C folds for splat constant vectors
I'm removing a misplaced pair of more specific folds from InstCombine in this patch as well,
so we know where those folds are happening in InstSimplify.

llvm-svn: 277738
2016-08-04 17:48:04 +00:00
Simon Pilgrim 3dbce52c16 [X86][SSE] Rename target shuffle unary permute matching function. NFCI.
In preparation for adding a binary permute matching function.

llvm-svn: 277737
2016-08-04 17:16:50 +00:00
Sanjay Patel bf82f44e7b add tests for missing vector folds
llvm-svn: 277736
2016-08-04 16:48:30 +00:00
Alina Sbirlea 6f937b1144 LoadStoreVectorizer: Remove TargetBaseAlign. Keep alignment for stack adjustments.
Summary:
TargetBaseAlign is no longer required since LSV checks if target allows misaligned accesses.
A constant defining a base alignment is still needed for stack accesses where alignment can be adjusted.

Previous patch (D22936) was reverted because tests were failing. This patch also fixes the cause of those failures:
- x86 failing tests either did not have the right target, or the right alignment.
- NVPTX failing tests did not have the right alignment.
- AMDGPU failing test (merge-stores) should allow vectorization with the given alignment but the target info
  considers <3xi32> a non-standard type and gives up early. This patch removes the condition and only checks
  for a maximum size allowed and relies on the next condition checking for %4 for correctness.
  This should be revisited to include 3xi32 as a MVT type (on arsenm's non-immediate todo list).

Note that checking the sizeInBits for a MVT is undefined (leads to an assertion failure),
so we need to create an EVT, hence the interface change in allowsMisaligned to include the Context.

Reviewers: arsenm, jlebar, tstellarAMD

Subscribers: jholewinski, arsenm, mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D23068

llvm-svn: 277735
2016-08-04 16:38:44 +00:00
Adrian Prantl 98d78405b0 Shamelessly add myself to CREDITS.TXT
llvm-svn: 277734
2016-08-04 16:28:22 +00:00
Daniel Sanders 5dcbac57c5 [mips] Set Personality and LSDA encoding for FreeBSD
Reviewers: seanbruno, sdardis

Subscribers: tberghammer, danalbert, srhines, dsanders, sdardis, llvm-commits, seanbruno

Differential Revision: https://reviews.llvm.org/D23113

llvm-svn: 277732
2016-08-04 15:36:03 +00:00
Sanjay Patel 9d591d15ec [InstCombine] use m_APInt to allow icmp eq (sub C1, X), C2 folds for splat constant vectors
llvm-svn: 277731
2016-08-04 15:19:25 +00:00
Simon Pilgrim c2370b810d [X86][SSE] Split off shuffle mask canonicalization from lowerVectorShuffle. NFCI.
The new function now returns true if the shuffle should be commuted.

This will allow target shuffle combines to share the code.

llvm-svn: 277728
2016-08-04 14:21:32 +00:00
Krzysztof Parzyszek 7773c58458 [Hexagon] Clear kill flags from modified registers in peephole optimizer
llvm-svn: 277727
2016-08-04 14:17:16 +00:00
Nikolai Bozhenov f679530ba1 [X86] Heuristic to selectively build Newton-Raphson SQRT estimation
On modern Intel processors hardware SQRT in many cases is faster than RSQRT
followed by Newton-Raphson refinement. The patch introduces a simple heuristic
to choose between hardware SQRT instruction and Newton-Raphson software
estimation.

The patch treats scalars and vectors differently. The heuristic is that for
scalars the compiler should optimize for latency while for vectors it should
optimize for throughput. It is based on the assumption that throughput bound
code is likely to be vectorized.

Basically, the patch disables scalar NR for big cores and disables NR completely
for Skylake. Firstly, scalar SQRT has shorter latency than NR code in big cores.
Secondly, vector SQRT has been greatly improved in Skylake and has better
throughput compared to NR.

Differential Revision: https://reviews.llvm.org/D21379

llvm-svn: 277725
2016-08-04 12:47:28 +00:00
Hrvoje Varga 846bdb746d [mips][microMIPS] Implement CFC1, CFC2, CTC1 and CTC2 instructions
Differential Revision: https://reviews.llvm.org/D22347

llvm-svn: 277719
2016-08-04 11:22:52 +00:00
Simon Pilgrim c8fe132756 [X86] Dropped XOP ctbits checks - they match the AVX checks
llvm-svn: 277718
2016-08-04 11:04:13 +00:00
Simon Pilgrim 5d5ca9c0cb [X86][SSE] Add initial costs for vector CTTZ/CTLZ
llvm-svn: 277716
2016-08-04 10:51:41 +00:00
Ying Yi 0ef31b7960 [LLVM-COV]Replace tabs to the space indentations in the HTML coverage report.
When using orbis-llvm-cov.exe to generate the HTML report, the HTML report 
can look quite different to the source file if it includes tabs.The default
tab size is 2 spaces instead of 8 spaces. A command line switch is
be added to set the tab size.

Differential Revision: https://reviews.llvm.org/D23087

llvm-svn: 277715
2016-08-04 10:39:43 +00:00
Jonas Hahnfeld 3d88f0c3fb Remove LLVM_ENABLE_LIBCXXABI
libc++.so is now a linker script that includes -lc++abi if necessary.

Differential Revision: https://reviews.llvm.org/D22861

llvm-svn: 277714
2016-08-04 10:24:48 +00:00
Simon Pilgrim 8ae6dad49b [X86][SSE] Don't decide when to scalarize CTTZ/CTLZ for performance at lowering - this is what cost models are for
Improved CTTZ/CTLZ costings will be added shortly

llvm-svn: 277713
2016-08-04 10:14:39 +00:00
Simon Dardis 57f4ae4625 [mips] Enable tail calls by default
Enable tail calls by default for (micro)MIPS(64).

microMIPS is slightly more tricky than doing it for MIPS(R6) or microMIPSR6.
microMIPS has two instruction encodings: 16bit and 32bit along with some
restrictions on the size of the instruction that can fill the delay slot.
For safe tail calls for microMIPS, the delay slot filler attempts to find
a correct size instruction for the delay slot of TAILCALL pseudos.

Reviewers: dsanders, vkalintris

Subscribers: jfb, dsanders, sdardis, llvm-commits

Differential Revision: https://reviews.llvm.org/D21138

llvm-svn: 277708
2016-08-04 09:17:07 +00:00
Diana Picus ddddbc2440 Typo fix in comment. NFC
llvm-svn: 277704
2016-08-04 08:25:08 +00:00
Dean Michael Berris 7e9abea2ae [XRay] Align entry and return sleds to 2 byte boundaries
This should ensure that we can atomically write two bytes (on top of the
retq and the one past it) and have those two bytes not straddle cache
lines.

We also move the label past the alignment instruction so that we can refer
to the actual first instruction, as opposed to potential padding before the
aligned instruction.

Update the tests to allow us to reflect the new order of assembly.

Reviewers: rSerge, echristo, majnemer

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23101

llvm-svn: 277701
2016-08-04 07:37:28 +00:00
Matt Arsenault b0e32f1ba1 AMDGPU: Fix a slow test by using basic regalloc
This just tests that the register limit isn't exceeded,
so the regisetr allocation doesn't need to be great.'

The critically slow part is all in greedy RA, so
switch to basic.

llvm-svn: 277700
2016-08-04 07:04:54 +00:00
Amaury Sechet bf3adfdbfb Fix intrinsics.ll test
llvm-svn: 277695
2016-08-04 05:35:25 +00:00
Amaury Sechet 6bea674c43 Add popcount(n) == bitsize(n) -> n == -1 transformation.
Summary: As per title.

Reviewers: majnemer, spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23139

llvm-svn: 277694
2016-08-04 05:27:20 +00:00
David Majnemer 4eefd6bca4 Forgot the dyn_cast_or_null intended for r277691.
llvm-svn: 277693
2016-08-04 04:47:18 +00:00
David Majnemer 909793fa63 Reinstate "[CloneFunction] Don't remove side effecting calls"
This reinstates r277611 + r277614 and reverts r277642.  A cast_or_null
should have been a dyn_cast_or_null.

llvm-svn: 277691
2016-08-04 04:24:02 +00:00
Bruno Cardoso Lopes bd887581fc Revert "GVN-hoist: enable by default" & "Make GVN Hoisting obey optnone/bisect."
This reverts commits r277685 & r277688. r277685 broke compiler-rt
compilation http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA_build/23335
and r277685 is a followup from it.

llvm-svn: 277690
2016-08-04 04:16:24 +00:00
Chandler Carruth a053a88df5 [PM] Change the name of the repeating utility to something less
overloaded (and simpler).

Sean rightly pointed out in code review that we've started using
"wrapper pass" as a specific part of the old pass manager, and in fact
it is more applicable there. Here, we really have a pass *template* to
build a repeated pass, so call it that.

llvm-svn: 277689
2016-08-04 03:52:53 +00:00
Sebastian Pop b33bfa198c Make GVN Hoisting obey optnone/bisect.
Differential Revision: https://reviews.llvm.org/D23136

llvm-svn: 277688
2016-08-04 02:05:08 +00:00
Sebastian Pop 70ffe6523f GVN-hoist: enable by default
As we addressed all compilation time problems with GVN-hoist
https://llvm.org/bugs/show_bug.cgi?id=28670
this patch turns GVN-hoist back by default.

Differential Revision: https://reviews.llvm.org/D23136

llvm-svn: 277685
2016-08-04 01:59:42 +00:00
Rui Ueyama 7e49549d4f pdbdump: Add a test to verify the result of PDB -> YAML -> PDB conversions.
Currently not all information can be restored from YAML.
This test verifies only the PDB header.

llvm-svn: 277682
2016-08-03 23:54:39 +00:00
Rui Ueyama d1d8c8312a pdbdump: Fix crash bug.
pdbdump calls DbiStreamBuilder::commit through PDBFileBuilder::commit
without calling DbiStreamBuilder::finalize. Because `finalize` initializes
`Header` member, `Header` remained nullptr which caused a crash bug.

Differential Revision: https://reviews.llvm.org/D23143

llvm-svn: 277681
2016-08-03 23:43:23 +00:00
Justin Bogner 253eb17b4e llvm-profdata: Clarify the top level help
It wasn't very obvious that you're supposed to call help on the
subcommands. This should help.

llvm-svn: 277678
2016-08-03 23:10:51 +00:00
Matthias Braun 1873998b16 RenameIndependentSubregs: Fix liveness query in rewriteOperands()
rewriteOperands() always performed liveness queries at the base index
rather than the RegSlot/Base as apropriate for the machine operand. This
could lead to illegal rewriting in some cases.

llvm-svn: 277661
2016-08-03 22:37:47 +00:00
Sanjay Patel 00a324e893 [InstCombine] use m_APInt to allow icmp eq (add X, C1), C2 folds for splat constant vectors
llvm-svn: 277659
2016-08-03 22:08:44 +00:00
Kevin Enderby 27e85bd0a6 Clean up of libObject/Archive interfaces and change the last three uses of ErrorOr<>
changing them to Expected<> to allow them to pass through llvm Errors.
No functional change.

This commit by itself will break the next lld builds.  I’ll be committing the
matching change for lld immediately next.

llvm-svn: 277656
2016-08-03 21:57:47 +00:00
Guozhi Wei 9584d18d48 [PPC] Handling CallInst in PPCBoolRetToInt
This patch fixes pr25548.

Current implementation of PPCBoolRetToInt doesn't handle CallInst correctly, so it failed to do the intended optimization when there is a CallInst with parameters. This patch fixed that.

llvm-svn: 277655
2016-08-03 21:43:51 +00:00
Bruno Cardoso Lopes 3fcf832cce Revert "[ARM] Constant Materialize: imms with specific value can be encoded into mov.w"
This reverts commit r277610 / d619aa8878c3dafcc0d29a46517f63ff3209fdd4.

This make subtarget-no-movt.ll fail in
http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_check/26892,

llvm-svn: 277654
2016-08-03 21:26:21 +00:00
George Burgess IV 363da6f589 [MSSA] Fix a bug in MemorySSA's move ctor.
Not a correctness issue, but it would be nice if we didn't have to
recompute our block numbering (worst-case) every time we move MSSA.

llvm-svn: 277652
2016-08-03 21:07:52 +00:00
Sebastian Pop 2aadad7243 GVN-hoist: limit the length of dependent instructions
Limit the number of times the while(1) loop is executed. With this restriction
the number of hoisted instructions does not change in a significant way on the
test-suite.

Differential Revision: https://reviews.llvm.org/D23028

llvm-svn: 277651
2016-08-03 20:54:38 +00:00
Sebastian Pop 4ba7c88cc7 GVN-hoist: compute DFS numbers once
With this patch we compute the DFS numbers of instructions only once and update
them during the code generation when an instruction gets hoisted.

Differential Revision: https://reviews.llvm.org/D23021

llvm-svn: 277650
2016-08-03 20:54:36 +00:00
Sebastian Pop 5d3822fc12 GVN-hoist: compute MSSA once per function (PR28670)
With this patch we compute the MemorySSA once and update it in the code generator.

Differential Revision: https://reviews.llvm.org/D22966

llvm-svn: 277649
2016-08-03 20:54:33 +00:00
Sanjoy Das ac5bf59b6e [IndVars] Un-grepify test; NFC
Some of these tests need to be cleaned up further to make it obvious
what they're testing, but as a first step remove all instances of
"grep".

llvm-svn: 277648
2016-08-03 20:53:23 +00:00
Matthias Braun 4dc6933d44 opt-bisect-legacy-pass-manager.ll: Test only works with default triple configured
llvm-svn: 277645
2016-08-03 20:28:19 +00:00
Reid Kleckner a6be60871f Revert "[CloneFunction] Don't remove side effecting calls"
This reverts commit r277611 and the followup r277614.

Bootstrap builds and chromium builds are crashing during inlining after
this change.

llvm-svn: 277642
2016-08-03 20:01:01 +00:00
George Burgess IV f7672854f0 [MSSA] clang-format. NFC.
Didn't want to fold this in with r277640, since it touches bits that
aren't entirely related to r277640.

llvm-svn: 277641
2016-08-03 19:59:11 +00:00
George Burgess IV 024f3d2683 [MSSA] Add special handling for invariant/constant loads.
This is a follow-up to r277637. It teaches MemorySSA that invariant
loads (and loads of provably constant memory) are always liveOnEntry.

llvm-svn: 277640
2016-08-03 19:57:02 +00:00
Sanjay Patel 2e9675ff52 [InstCombine] use m_APInt to allow icmp eq (srem X, C1), C2 folds for splat constant vectors
llvm-svn: 277638
2016-08-03 19:48:40 +00:00
George Burgess IV 82e355ce48 [MSSA] Add logic for special handling of atomics/volatiles.
This patch makes MemorySSA recognize atomic/volatile loads, and makes
MSSA treat said loads specially. This allows us to be a bit more
aggressive in some cases.

Administrative note: Revision was LGTM'ed by reames in person.
Additionally, this doesn't include the `invariant.load` recognition in
the differential revision, because I feel it's better to commit that
separately. Will commit soon.

Differential Revision: https://reviews.llvm.org/D16875

llvm-svn: 277637
2016-08-03 19:39:54 +00:00
Elliot Colp 6af6f64f87 I can't reproduce this buildbot failure locally, so temporarily remove this test while I investigate.
http://bb.pgr.jp/builders/ninja-x64-msvc-RA-centos6/builds/27427

llvm-svn: 277636
2016-08-03 19:39:20 +00:00
Tobias Grosser 8757e387dd [InstCombine] Refactor optimization of zext(or(icmp, icmp)) to enable more aggressive cast-folding
Summary:
InstCombine unfolds expressions of the form `zext(or(icmp, icmp))` to `or(zext(icmp), zext(icmp))` such that in a later iteration of InstCombine the exposed `zext(icmp)` instructions can be optimized. We now combine this unfolding and the subsequent `zext(icmp)` optimization to be performed together. Since the unfolding doesn't happen separately anymore, we also again enable the folding of `logic(cast(icmp), cast(icmp))` expressions to `cast(logic(icmp, icmp))` which had been disabled due to its interference with the unfolding transformation.

Tested via `make check` and `lnt`.

Background
==========

For a better understanding on how it came to this change we subsequently summarize its history. In commit r275989 we've already tried to enable the folding of `logic(cast(icmp), cast(icmp))` to `cast(logic(icmp, icmp))` which had to be reverted in r276106 because it could lead to an endless loop in InstCombine (also see http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160718/374347.html). The root of this problem is that in `visitZExt()` in InstCombineCasts.cpp there also exists a reverse of the above folding transformation, that unfolds `zext(or(icmp, icmp))` to `or(zext(icmp), zext(icmp))` in order to expose `zext(icmp)` operations which would then possibly be eliminated by subsequent iterations of InstCombine. However, before these `zext(icmp)` would be eliminated the folding from r275989 could kick in and cause InstCombine to endlessly switch back and forth between the folding and the unfolding transformation. This is the reason why we now combine the `zext`-unfolding and the elimination of the exposed `zext(icmp)` to happen at one go because this enables us to still allow the cast-folding in `logic(cast(icmp), cast(icmp))` without entering an endless loop again.

Details on the submitted changes
================================

- In `visitZExt()` we combine the unfolding and optimization of `zext` instructions.
- In `transformZExtICmp()` we have to use `Builder->CreateIntCast()` instead of `CastInst::CreateIntegerCast()` to make sure that the new `CastInst` is inserted in a `BasicBlock`. The new calls to `transformZExtICmp()` that we introduce in `visitZExt()` would otherwise cause according assertions to be triggered (in our case this happend, for example, with lnt for the MultiSource/Applications/sqlite3 and SingleSource/Regression/C++/EH/recursive-throw tests). The subsequent usage of `replaceInstUsesWith()` is necessary to ensure that the new `CastInst` replaces the `ZExtInst` accordingly.
- In InstCombineAndOrXor.cpp we again allow the folding of casts on `icmp` instructions.
- The instruction order in the optimized IR for the zext-or-icmp.ll test case is different with the introduced changes.
- The test cases in zext.ll have been adopted from the reverted commits r275989 and r276105.

Reviewers: grosser, majnemer, spatel

Subscribers: eli.friedman, majnemer, llvm-commits

Differential Revision: https://reviews.llvm.org/D22864

Contributed-by: Matthias Reisinger <d412vv1n@gmail.com>
llvm-svn: 277635
2016-08-03 19:30:35 +00:00
Sebastian Pop 031b1bc06f Pass EphValues by const-ref as it is not modified in the callee
Patch by Aditya Kumar.

Differential Revision: https://reviews.llvm.org/D22967

llvm-svn: 277634
2016-08-03 19:13:50 +00:00
Nicolai Haehnle fcac6f8376 [InstCombine] Cleanup select-bitext.ll tests
Follow-up to r277596.

llvm-svn: 277633
2016-08-03 19:10:13 +00:00
Simon Pilgrim 898f030f70 [X86][SSE] Enable target shuffle combining to combine multiple shuffle inputs.
We currently only support combining target shuffles that consist of a single source input (plus elements known to be undef/zero).

This patch generalizes the recursive combining of the target shuffle to collect all the inputs, merging any duplicates along the way, into a full set of src ops and its shuffle mask.

We uncover a number of cases where we have failed to combine a unary shuffle because the input has been duplicated and separated during lowering.

This will allow us to combine to 2-input shuffles in a future patch.

Differential Revision: https://reviews.llvm.org/D22859

llvm-svn: 277631
2016-08-03 19:08:24 +00:00
Vedant Kumar 4031d9f80e Reapply "More fixes to get good error messages for bad archives."
This reverts commit the revert commit r277627. The build errors
mentioned in r277627 were likely caused by an unclean build directory.
Sorry for the noise.

llvm-svn: 277630
2016-08-03 19:02:50 +00:00
Sanjay Patel 43aeb001c9 [InstCombine] use m_APInt to allow icmp (binop X, Y), C folds with constant splat vectors
This removes the restriction for the icmp constant, but as noted by the FIXME comments, 
we still need to change individual checks for binop operand constants.

llvm-svn: 277629
2016-08-03 18:59:03 +00:00
Vedant Kumar bfb6072d84 Revert "More fixes to get good error messages for bad archives."
This reverts commit r277540. It breaks the build with:

../lib/Object/Archive.cpp:264:41: error: return type of out-of-line definition of 'llvm::object::ArchiveMemberHeader::getUID' differs from that in the declaration
Expected<unsigned> ArchiveMemberHeader::getUID() const {
~~~~~~~~~~~~~~~~~~                      ^
include/llvm/Object/Archive.h:53:12: note: previous declaration is here
  unsigned getUID() const;
  ~~~~~~~~ ^

llvm-svn: 277627
2016-08-03 18:44:32 +00:00
Krzysztof Parzyszek 23ee12e173 [Hexagon] Generate COPY/REG_SEQUENCE more aggressively for vectors
llvm-svn: 277626
2016-08-03 18:35:48 +00:00
Duncan P. N. Exon Smith 9cbc69d1fe IR: Drop uniquing when an MDNode Value operand is deleted
This is a fix for PR28697.

An MDNode can indirectly refer to a GlobalValue, through a
ConstantAsMetadata.  When the GlobalValue is deleted, the MDNode operand
is reset to `nullptr`.  If the node is uniqued, this can lead to a
hard-to-detect cache invalidation in a Metadata map that's shared across
an LLVMContext.

Consider:

 1. A map from Metadata* to `T` called RemappedMDs.
 2. A node that references a global variable, `!{i1* @GV}`.
 3. Insert `!{i1* @GV} -> SomeT` in the map.
 4. Delete `@GV`, leaving behind `!{null} -> SomeT`.

Looking up the generic and uninteresting `!{null}` gives you `SomeT`,
which is likely related to `@GV`.  Worse, `SomeT`'s lifetime may be tied
to the deleted `@GV`.

This occurs in practice in the shared ValueMap used since r266579 in the
IRMover.  Other code that handles more than one Module (with different
lifetimes) in the same LLVMContext could hit it too.

The fix here is a partial revert of r225223: in the rare case that an
MDNode operand is a ConstantAsMetadata (i.e., wrapping a node from the
Value hierarchy), drop uniquing if it gets replaced with `nullptr`.
This changes step  above to leave behind `distinct !{null} -> SomeT`,
which can't be confused with the generic `!{null}`.

In theory, this can cause some churn in the LLVMContext's MDNode
uniquing map when Values are being deleted.  However:

  - The number of GlobalValues referenced from uniqued MDNodes is
    expected to be quite small.  E.g., the debug info metadata schema
    only references GlobalValues from distinct nodes.

  - Other Constants have the lifetime of the LLVMContext, whose teardown
    is careful to drop references before deleting the constants.

As a result, I don't expect a compile time regression from this change.

llvm-svn: 277625
2016-08-03 18:19:43 +00:00
Ehsan Amiri a538b0f023 Adding -verify-machineinstrs option to PowerPC tests
Currently we have a number of tests that fail with -verify-machineinstrs.
To detect this cases earlier we add the option to the testcases with the
exception of tests that will currently fail with this option. PR 27456 keeps
track of this failures.

No code review, as discussed with Hal Finkel.

llvm-svn: 277624
2016-08-03 18:17:35 +00:00
Krzysztof Parzyszek 623afbdbd7 [Hexagon-ish] Add function to print cell map contents in bit tracker
llvm-svn: 277622
2016-08-03 18:13:32 +00:00
David Majnemer fa8ef91748 [CloneFunction] Don't crash if the value map doesn't hold something
It is possible for the value map to not have an entry for some value
that has already been removed.

I don't have a testcase, this is fall-out from a buildbot.

llvm-svn: 277614
2016-08-03 17:37:10 +00:00
Sanjay Patel 51a767c6b8 use local variables; NFC
llvm-svn: 277612
2016-08-03 17:23:08 +00:00
David Majnemer fad0490869 [CloneFunction] Don't remove side effecting calls
We were able to figure out that the result of a call is some constant.
While propagating that fact, we added the constant to the value map.
This is problematic because it results in us losing the call site when
processing the value map.

This fixes PR28802.

llvm-svn: 277611
2016-08-03 17:12:47 +00:00
Weiming Zhao 57dc4cf0e1 [ARM] Constant Materialize: imms with specific value can be encoded into mov.w
Summary: Thumb2 supports encoding immediates with specific patterns into mov.w by splatting the low 8 bits into other bytes.

Reviewers: john.brawn, jmolloy

Subscribers: jmolloy, aemerson, rengolin, samparker, llvm-commits

Differential Revision: https://reviews.llvm.org/D23090

llvm-svn: 277610
2016-08-03 17:05:23 +00:00
Zachary Turner 8cf51c340d [msf] Make FPM reader use MappedBlockStream.
MappedBlockSTream can work with any sequence of block data where
the ordering is specified by a list of block numbers.  So rather
than manually stitch them together in the case of the FPM, reuse
this functionality so that we can treat the FPM as if it were
contiguous.

Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D23066

llvm-svn: 277609
2016-08-03 16:53:21 +00:00
Renato Golin f583097434 Revert "Teach CorrelatedValuePropagation to mark adds as no wrap"
This reverts commit r277592, trying to fix the AArch64 42VMA buildbot.

llvm-svn: 277607
2016-08-03 16:20:48 +00:00
Benjamin Kramer 0e4b7646c1 Hexagon: Use llvm_unreachable. NFC.
llvm-svn: 277605
2016-08-03 15:51:10 +00:00
Elliot Colp 82b1468a4d Disable shrinking of SNaN constants
When expanding FP constants, we attempt to shrink doubles to floats and perform an extending load.
However, on SystemZ, and possibly on other targets (I've only confirmed the problem on SystemZ), the FP extending load instruction may convert SNaN into QNaN, or may cause an exception. So in the general case, we would still like to shrink FP constants, but SNaNs should be left as doubles.

Differential Revision: https://reviews.llvm.org/D22685

llvm-svn: 277602
2016-08-03 15:09:21 +00:00
Krzysztof Parzyszek ed4e7827bb [Hexagon] Do not check alignment for unsized types in isLegalAddressingMode
When the same base address is used to load two different data types, LSR
would assume a memory type of "void". This type is not sized and has no
alignment information. Checking for it causes a crash.

llvm-svn: 277601
2016-08-03 15:06:18 +00:00
Sanjay Patel 91bab5364e add a vector variant of each test
llvm-svn: 277598
2016-08-03 14:25:55 +00:00
Nicolai Haehnle c1f1ad998a [InstCombine] Add select-bitext.ll tests
As requested for D22747.

llvm-svn: 277596
2016-08-03 13:37:56 +00:00
Gil Rapaport e7a8fab275 [Loop Vectorizer] Move store-predication into its own function, remove obsolete comment (NFC)
Differential Revision: https://reviews.llvm.org/D23013

llvm-svn: 277595
2016-08-03 13:23:43 +00:00
Artur Pilipenko 68cb947cc9 Teach CorrelatedValuePropagation to mark adds as no wrap
Use LVI to prove that adds do not wrap. The change is motivated by https://llvm.org/bugs/show_bug.cgi?id=28620 bug and it's the first step to fix that problem.

Reviewed By: sanjoy

Differential Revision: http://reviews.llvm.org/D23059

llvm-svn: 277592
2016-08-03 13:11:39 +00:00
Igor Breger c59b3a2236 [AVX512] Add aliases for vcvttss2si{l|q}, vcvttsd2si{l|q}, vcvttss2usi{l|q}, vcvttsd2usi{l|q} instructions.
Differential Revision: http://reviews.llvm.org/D23111

llvm-svn: 277586
2016-08-03 10:58:05 +00:00
Chandler Carruth fdc6ba1e45 [PM] Fix a mis-named parameter in parseLoopPass -- the pass manager was
called "FPM" instead of "LPM" in a hold-over from when the code was
modeled on that used to parse function passes.

llvm-svn: 277584
2016-08-03 09:14:03 +00:00
Chandler Carruth 1af98245f4 [PM] Add the explicit copy, move, swap, and assignment boilerplate
required by MSVC 2013.

This also makes the repeating pass wrapper assignable. Mildly
unfortunate as it means we can't use a const member for the int, but
that is a really minor invariant to try to preserve at the cost of loss
of regularity of the type. Yet another annoyance of the particular C++
object / move semantic model.

llvm-svn: 277582
2016-08-03 08:16:08 +00:00
Chandler Carruth 241bf2456f [PM] Add a generic 'repeat N times' pass wrapper to the new pass
manager.

While this has some utility for debugging and testing on its own, it is
primarily intended to demonstrate the technique for adding custom
wrappers that can provide more interesting interation behavior in
a nice, orthogonal, and composable layer.

Being able to write these kinds of very dynamic and customized controls
for running passes was one of the motivating use cases of the new pass
manager design, and this gives a hint at how they might look. The actual
logic is tiny here, and most of this is just wiring in the pipeline
parsing so that this can be widely used.

I'm adding this now to show the wiring without a lot of business logic.
This is a precursor patch for showing how a "iterate up to N times as
long as we devirtualize a call" utility can be added as a separable and
composable component along side the CGSCC pass management.

Differential Revision: https://reviews.llvm.org/D22405

llvm-svn: 277581
2016-08-03 07:44:48 +00:00
Dean Michael Berris 0b8f6c8777 [XRay] Make the xray_instr_map section specification more correct
Summary:
We also add a test to show what currently happens when we create a
section per function and emit an xray_instr_map. This illustrates the
relationship (or lack thereof) between the per-function section and the
xray_instr_map section.

We also change the code generation slightly so that we don't always
create group sections, but rather only do so if a function where the
table is associated with is in a group.

Also in this change:

  - Remove the "merge" flag on the xray_instr_map section.
  - Test that we're generating the right table for comdat and non-comdat functions.

Reviewers: echristo, majnemer

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23104

llvm-svn: 277580
2016-08-03 07:21:55 +00:00
Jonas Paulsson 196986ca95 [IfConversion] Bugfix: Don't use undef flag while adding use operands.
IfConversion used to always add the undef flag when adding a use operand
on a newly predicated instruction. This would be an operand for the register
being conditionally redefined. Due to the undef flag, the liveness of this
register prior to the predicated instruction would get lost.

This patch changes this so that such use operands are added only when the
register is live, without the undef flag.

This was reverted but pushed again now, for details follow link below.

Reviewed by Quentin Colombet.
http://reviews.llvm.org/D209077

llvm-svn: 277571
2016-08-03 05:46:35 +00:00
David Callahan cc5cd4dc65 [ADCE] Refactor anticipating new functionality (NFC)
Summary:
This is the first refactoring before adding new functionality.
Add a class wrapper for the functions and container for
state associated with the transformation.

No functional change

Reviewers: majnemer, nadav, mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23065

llvm-svn: 277565
2016-08-03 04:28:39 +00:00
Mehdi Amini f9721ba5f1 RecordStreamer: handle inline asm "lazy_reference" and mark symbols as "used"
llvm-svn: 277564
2016-08-03 03:51:42 +00:00
Chandler Carruth 4c3e3bf9fb [PM] Remove the NDEBUG condition around isModulePassName.
I forgot to do this initially, and added when I saw this fail in
a no-asserts build, but managed to loose the diff from the actual patch
that got submitted. Very sorry.

llvm-svn: 277562
2016-08-03 03:26:09 +00:00