ffb9d14bb3
* declare local common symbols as such (.lcomm, not merely .common)
...
* begin great adventure into correct function descriptor materialization
llvm-svn: 20956
2005-03-31 07:40:24 +00:00
8106f12d33
daintyness
...
llvm-svn: 20955
2005-03-31 07:36:43 +00:00
73c2777a0e
add what we need to fudge a 'floating point conditional move', this is
...
used to get FP div-by-zero working properly (shunt the right answer
depending on how frcpa sets its predicate output)
llvm-svn: 20954
2005-03-31 07:32:32 +00:00
eddfff338a
Pass the correct values to the chain argument for node construction during
...
LowerCallTo.
Handle ISD::ADD in SelectAddr, allowing us to have nonzero immediates for
loads and stores, amazing!
llvm-svn: 20946
2005-03-31 02:05:53 +00:00
9de7ddf7d5
Rewrite LowerCallTo and Select(ISD::CALL) to properly handle float varargs
...
Tell the SelectionDAG ISel to expand SEXTLOAD of i1 and i8, rather than
complicate the code in ISD::SEXTLOAD to do it by hand
Combine the FP and Int ISD::LOAD codegen
Generate better code for constant pool loads
As a result, all of Shootout, and likely many other programs are now
working.
llvm-svn: 20945
2005-03-31 00:15:26 +00:00
4c0780cf42
Fix calls whose arguments fit entirely in registers to not break the Chain.
...
Implement SINT_TO_FP and UINT_TO_FP
Remove some dead code from the simple ISel
llvm-svn: 20944
2005-03-30 19:38:35 +00:00
e3d9f8c4f9
yea, fine Duraid
...
llvm-svn: 20942
2005-03-30 18:22:52 +00:00
a8114a0f48
Fix frame index code to generate legal PowerPC instructions. About half of
...
Shootout now works.
llvm-svn: 20940
2005-03-30 02:23:08 +00:00
5851a66128
Fix external symbol printing in the AsmPrinter. Tell the ISel that we
...
don't support things like memcpy directly. This allows a handful of the
Shootout programs to work, yay!
llvm-svn: 20939
2005-03-30 01:45:43 +00:00
472a265ef6
don't depend on the cfg being set up yet
...
llvm-svn: 20936
2005-03-30 01:10:00 +00:00
9c40e9c61f
Fix BranchCC (it's still dumb), and implement FP select (also dumb)
...
llvm-svn: 20935
2005-03-29 22:48:55 +00:00
28145edd30
Implement integer select and i1 sign extend
...
llvm-svn: 20934
2005-03-29 22:24:51 +00:00
28c5ac9ff4
Implement SetCC, fix ZERO_EXTEND_INREG
...
llvm-svn: 20933
2005-03-29 21:54:38 +00:00
91964490e2
Compare dependence analysis with llvm instructions versus machine instrutions. the problem with using machine instructions and alias analysis is that aa does not handle tmp instructions.
...
llvm-svn: 20931
2005-03-29 20:35:10 +00:00
6e19b21e30
Dependence analyzer that just determines dependences within a loop for loads and stores using alias analysis.
...
llvm-svn: 20930
2005-03-29 20:33:42 +00:00
93d008990e
Fix up some types and constants
...
llvm-svn: 20928
2005-03-29 19:24:04 +00:00
1ce9aacf2e
fix a warning in the optimized build
...
llvm-svn: 20920
2005-03-29 15:13:27 +00:00
60956dd52f
Implement div, rem, and frameindex
...
llvm-svn: 20907
2005-03-29 00:03:27 +00:00
731bed10c7
Pattern ISel: fix argument loading for i64s (thanks chris)
...
Simple ISel: fix i64 subtract
llvm-svn: 20903
2005-03-28 23:08:54 +00:00
66acad746f
Remove fake instruction 'subc' (mnemonic for subfc).
...
More pattern isel updates
llvm-svn: 20902
2005-03-28 22:28:37 +00:00
5bdfc63516
Implement proper loads and zero-extends of all types
...
llvm-svn: 20897
2005-03-28 19:36:43 +00:00
bdbf8ba2d0
Emit .global @function and .global @object entries so the Intel ias
...
assembler may be used; identify LLVM output as such.
llvm-svn: 20892
2005-03-28 15:21:43 +00:00
518a994b7d
Fix that pesky floats in integer regs problem by assigning the f32 type to
...
the correct register class. Also remove the loading of float data into int
regs part of varargs; it will need to be implemented differently later.
llvm-svn: 20857
2005-03-26 08:25:22 +00:00
dcad53e7bd
Get closer to having varargs working. There's still something strange
...
going on with copies between floating point and integer register files
being generated. Once that is solved, varargs will be done.
llvm-svn: 20856
2005-03-26 07:46:36 +00:00
c95bf7b226
Make 64bit args and float args work correct with calls. Thanks to Chris
...
for explaining EXTRACT_ELEMENT to me.
llvm-svn: 20847
2005-03-26 02:17:46 +00:00
f656525cb6
Change interface to LowerCallTo to take a boolean isVarArg argument.
...
llvm-svn: 20842
2005-03-26 01:29:23 +00:00
e70b5c79f8
Next round of pattern isel changes, mostly dealing with calls.
...
llvm-svn: 20841
2005-03-26 01:28:53 +00:00
5d7610de65
Correct a documention link
...
llvm-svn: 20840
2005-03-26 01:28:05 +00:00
0ad33afe22
Support global addresses and fix call returns. Varargs still aren't
...
handled correctly for floating point arguments, or more than 8 arguemnts.
This does however, allow hello world to run.
llvm-svn: 20832
2005-03-25 08:34:25 +00:00
ad5151d785
Implement next round of Pattern ISel fixes
...
1. void returns
2. multiplies
3. calls
llvm-svn: 20822
2005-03-24 23:35:30 +00:00
3a9a2f9ec7
Fix an incorrect argument being passed to BuildMI for indirect calls.
...
llvm-svn: 20821
2005-03-24 23:34:38 +00:00
d73c87a424
Commit Gabor Greif's patch to use iterators in lowering intrinsics.
...
llvm-svn: 20816
2005-03-24 20:07:16 +00:00
b15317b74a
eliminate dead variables, patch contributed by Gabor Greif!
...
llvm-svn: 20812
2005-03-24 17:32:20 +00:00
7ec19b4d5a
Implement more of the PPC32 Pattern ISel:
...
1) dynamic stack alloc
2) loads
3) shifts
4) subtract
5) immediate form of add, and, or, xor
6) change flag from -pattern-isel to -enable-ppc-pattern-isel
Remove dead arguments from getGlobalBaseReg in the simple ISel
llvm-svn: 20810
2005-03-24 06:28:42 +00:00
a3abb4c01a
Fix silly "no newline at end of file" warning
...
llvm-svn: 20809
2005-03-24 06:16:18 +00:00
d6888355fa
Fix compilation errors, patch contributed by the fabulous Bill Wendling!
...
llvm-svn: 20808
2005-03-24 05:13:53 +00:00
fed2a42895
fix a compilation error, patch contributed by Bill Wendling!
...
llvm-svn: 20807
2005-03-24 05:12:48 +00:00
20e7e28ee7
Addition of the PPC32 Pattern ISel. While it is far from complete, it will
...
be brought up to parity with the current simple ISel in the coming days.
Currently, -pattern-isel is required to trigger it.
llvm-svn: 20805
2005-03-24 04:41:43 +00:00
952105220e
Remove comments that are now meaningless from the pattern ISels, at Chris's
...
request.
llvm-svn: 20804
2005-03-24 04:39:54 +00:00
82f364515c
don't lie to the register allocator
...
llvm-svn: 20784
2005-03-23 15:20:01 +00:00
13417b5be3
Added alias analysis.
...
Fixed many many bugs.
This now works on almost all Singlesource , and most of MultiSource.
llvm-svn: 20780
2005-03-23 01:47:20 +00:00
8180e87e51
hum, it is good to use real instructions
...
llvm-svn: 20769
2005-03-22 16:42:52 +00:00
6294dee913
two things: 1)evilness reduction patch, reduces the number of instructions hiding in the small jump CC moving code. 2)implement div of small data types by FP DIV (also reduces evilness and should speed things up)
...
llvm-svn: 20756
2005-03-22 00:24:07 +00:00
82ae9e1dda
We may be adding functions to the Module during initialization, so
...
conservatively, it's modified
llvm-svn: 20735
2005-03-21 19:22:14 +00:00
87ee2ba48d
Make this method non-const. Making it const causes the const version of
...
getIGroup to be called instead of the non-const one. These two methods
have (??) different behavior, so this change fixes bugs.
llvm-svn: 20724
2005-03-21 06:07:43 +00:00
484bfc4d26
Fix the 3 regressions last night, due to my buggy patch from yesterday.
...
llvm-svn: 20689
2005-03-19 17:35:11 +00:00
1a48561432
Stop using deprecated interface.
...
llvm-svn: 20679
2005-03-19 09:22:17 +00:00
bed9657ff6
remove use of getPrev() and getNext() on ilist nodes.
...
llvm-svn: 20673
2005-03-18 16:12:37 +00:00
8a3aa43422
typo/denial
...
llvm-svn: 20663
2005-03-17 20:23:27 +00:00
df642ff2ae
clean up warnings when building in release mode
...
llvm-svn: 20658
2005-03-17 19:00:40 +00:00
a06265a119
OK, IA64 is statically linked into llc
...
llvm-svn: 20655
2005-03-17 18:37:05 +00:00
f5cc2c453d
build the IA64 target as a .so for now
...
llvm-svn: 20654
2005-03-17 18:29:04 +00:00
91ed0a11cf
and so it begins...
...
PHASE 1: write instruction selector
PHASE 2: ???
PHASE 3: profit!
llvm-svn: 20652
2005-03-17 18:17:03 +00:00
43832b049e
Don't emit two comparisons when comparing a FP value against zero!
...
llvm-svn: 20651
2005-03-17 16:29:26 +00:00
7b9020a059
Fix the missing symbols problem Bill was hitting. Patch contributed by
...
Bill Wendling!!
llvm-svn: 20649
2005-03-17 15:38:16 +00:00
aa254d5f79
sure, I can set a flag, but if I never check it, why bother setting it? Should fix 20 programs :)
...
llvm-svn: 20623
2005-03-15 19:51:19 +00:00
fb972add4f
stop using arg_front
...
llvm-svn: 20599
2005-03-15 05:03:36 +00:00
31c8a9d41a
stop using arg_back
...
llvm-svn: 20598
2005-03-15 04:59:17 +00:00
531f9e92d4
This mega patch converts us from using Function::a{iterator|begin|end} to
...
using Function::arg_{iterator|begin|end}. Likewise Module::g* -> Module::global_*.
This patch is contributed by Gabor Greif, thanks!
llvm-svn: 20597
2005-03-15 04:54:21 +00:00
0b9096bcc5
FP 0.0 setcc optimization, and generate short branch sequence for setcc(FP) rather than stack usage
...
llvm-svn: 20589
2005-03-14 19:23:45 +00:00
3434004dce
add a StructLayout::getElementContainingOffset method.
...
llvm-svn: 20579
2005-03-13 19:04:41 +00:00
af9a15fe64
Should fix mesa
...
llvm-svn: 20577
2005-03-13 00:43:20 +00:00
27a3df07a0
remove a pseudo instruction and improve inline constant generation
...
llvm-svn: 20563
2005-03-11 17:48:05 +00:00
7728eb7b80
some typoes and .bss isn't liked, at all
...
llvm-svn: 20542
2005-03-10 19:02:02 +00:00
8145fec740
minor correction for Register that isn't used
...
llvm-svn: 20535
2005-03-09 20:48:23 +00:00
1f1462fafa
Fix a crash handling 'undef bool', fixing an llc crash on 186.crafty
...
llvm-svn: 20523
2005-03-08 22:53:09 +00:00
00658b80fb
Patch to make assembly output compatible with mingw compilation (identical
...
to cygwin)
llvm-svn: 20520
2005-03-08 17:02:05 +00:00
ea50620eec
Make sure to remove all dead type names from the symbol table, not just
...
struct types. This fixes Regression/CodeGen/CBackend/2005-03-08-RecursiveTypeCrash.ll,
a crash on Java output that Alkis reported.
llvm-svn: 20519
2005-03-08 16:19:59 +00:00
20238eb963
Single characters should be printed out as chars, not strings.
...
llvm-svn: 20515
2005-03-08 00:26:08 +00:00
c9b0984666
simplify some code.
...
llvm-svn: 20471
2005-03-06 02:28:23 +00:00
f246ef3e2f
don't break the build on 32-bit hosts.
...
llvm-svn: 20455
2005-03-05 17:47:38 +00:00
7c954c6d13
fix data size stuff for architectures with bit challenged data types
...
llvm-svn: 20453
2005-03-05 15:30:33 +00:00
f3cd1477c3
fix up stack pointer adjustments
...
llvm-svn: 20442
2005-03-04 21:40:02 +00:00
8df62dda57
fix FCMOVxx typo, set rem and div to hardcode target reg to be the same as the one the assembler uese, update ISel to put values in regs used by assembler for rem and div
...
llvm-svn: 20434
2005-03-04 20:09:23 +00:00
f0ab14aa24
turn on IEEE for compares
...
llvm-svn: 20425
2005-03-03 22:12:11 +00:00
6a5f52d15a
beter Select on FP
...
llvm-svn: 20424
2005-03-03 21:47:53 +00:00
00ee68c612
Print -X like this:
...
double test(double l1_X) {
return (-l1_X);
}
instead of like this:
double test(double l1_X) {
return (-0x0p+0 - l1_X);
}
llvm-svn: 20423
2005-03-03 21:12:04 +00:00
00348ce902
LSR cleanup patch
...
llvm-svn: 20422
2005-03-03 19:03:21 +00:00
1a678c67c9
Do not lower malloc's to pass "sizeof" expressions like this:
...
ltmp_0_7 = malloc(((unsigned )(&(((signed char (*)[784])/*NULL*/0)[1u]))));
Instead, just emit the literal constant, like this:
ltmp_0_7 = malloc(784u);
This works around a bug in ICC 8.1 compiling the CBE generated code. :-(
llvm-svn: 20415
2005-03-03 01:04:50 +00:00
5b5caaf3cd
cleanup the cfg after lsr
...
llvm-svn: 20410
2005-03-02 21:56:00 +00:00
180a04a4bb
remove 32 sign extend after 32 sextload and handle small negative constant
...
llvm-svn: 20408
2005-03-02 17:23:03 +00:00
ed4b6488a7
Added LSR as a beta pass for alpha
...
llvm-svn: 20407
2005-03-02 17:21:38 +00:00
c8bb99760a
Add a temporary option for llc-beta: -enable-lsr-for-ppc, which turns on
...
Loop Strength Reduction.
llvm-svn: 20399
2005-03-02 06:19:22 +00:00
12328e9378
Remove tabs from file.
...
llvm-svn: 20380
2005-02-28 19:36:15 +00:00
811107350a
Add support to the C backend for llvm.prefetch. Patch contributed by
...
Justin Wick!
llvm-svn: 20378
2005-02-28 19:29:46 +00:00
76eff48195
fix integer division and stuff
...
llvm-svn: 20372
2005-02-28 17:22:18 +00:00
0ce80cd542
Fix spelling, patch contributed by Gabor Greif!
...
llvm-svn: 20343
2005-02-27 06:18:25 +00:00
10bc4c0ff6
make BB labels be exported for debuging, add fp negation optimization, further pecimise the FP instructions
...
llvm-svn: 20332
2005-02-25 22:55:15 +00:00
904650cdd0
fix Allocas. Really. I mean it this time.
...
llvm-svn: 20306
2005-02-24 18:36:32 +00:00
ee47100d44
Only print out machine instructions before modulo scheduling if we are actually doing modulo scheduling! :)
...
llvm-svn: 20292
2005-02-24 02:14:44 +00:00
27cf4eb1c7
Ah the problems you have to fix when you stray from the One True Way (TM)
...
llvm-svn: 20290
2005-02-23 17:33:42 +00:00
80c5b97046
Silence some uninit variable warnings.
...
llvm-svn: 20284
2005-02-23 05:57:21 +00:00
a31ad5172e
Fixed bug in findAllcircuits. Fixed branch addition to schedule. Added debug information.
...
llvm-svn: 20280
2005-02-23 02:01:42 +00:00
ccdfdd7aee
oops
...
llvm-svn: 20278
2005-02-22 23:29:25 +00:00
7ac0143fa6
dynamic stack allocas
...
llvm-svn: 20273
2005-02-22 21:59:48 +00:00
5ab3986e49
no longer build as a shared library
...
llvm-svn: 20264
2005-02-22 04:58:26 +00:00
20430321c2
Fix compilation errors with VS 2005, patch contributed by Aaron Gray.
...
llvm-svn: 20232
2005-02-17 21:40:27 +00:00
c28fd0db2e
Fixed node deletion bug.
...
llvm-svn: 20207
2005-02-16 04:00:59 +00:00
915fd0de4b
Fix a problem where the PPC backend lost track of the fact that it had
...
to save and restore the LR register on entry and exit of a leaf function
that needed to access globals or the constant pool. This should hopefully
fix oscar from sending the PPC tester spinning out of control.
llvm-svn: 20197
2005-02-15 20:26:49 +00:00
3bef66fcf3
Fix volatile load/store of pointers. Consider this testcase:
...
void %test(int** %P) {
%A = volatile load int** %P
ret void
}
void %test2(int*** %Q) {
%P = load int*** %Q
volatile store int** %P, int*** %Q
ret void
}
instead of emitting:
void test(int **l1_P) {
int *l2_A;
l2_A = (int **((volatile int **)l1_P));
return;
}
void test2(int ***l2_Q) {
int **l1_P;
l1_P = *l2_Q;
*((volatile int ***)l2_Q) = l1_P;
return;
}
... which is loading/storing volatile pointers, not through volatile pointers,
emit this (which is right):
void test(int **l1_P) {
int *l3_A;
l3_A = *((int * volatile*)l1_P);
return;
}
void test2(int ***l2_Q) {
int **l1_P;
l1_P = *l2_Q;
*((int ** volatile*)l2_Q) = l1_P;
return;
}
llvm-svn: 20191
2005-02-15 05:52:14 +00:00
2b1e10031f
Write out single characters as chars, not strings.
...
llvm-svn: 20179
2005-02-14 18:52:35 +00:00
7afbdcad15
Implement CodeGen/CBackend/2005-02-14-VolatileOperations.ll
...
Volatile loads and stores need to emit volatile pointer operations in C.
llvm-svn: 20177
2005-02-14 16:47:52 +00:00
cae2f21e3b
fix setcc on floats, fixes singlesource:pi, perhaps others
...
llvm-svn: 20172
2005-02-14 05:41:43 +00:00
d39febfc66
try to do better match for i32 adds
...
llvm-svn: 20143
2005-02-12 21:11:17 +00:00
ab4db0522a
make FP conversion more conservative (matches gcc)
...
llvm-svn: 20142
2005-02-12 21:10:58 +00:00
df5cd0868f
oops, I was sure this had already gond though the nightly tester
...
llvm-svn: 20141
2005-02-12 20:42:09 +00:00
76c5d97750
added sign extend for boolean
...
llvm-svn: 20137
2005-02-12 19:35:12 +00:00
b301af712e
fix a bunch of regressions due to call behavior
...
llvm-svn: 20110
2005-02-10 20:10:38 +00:00
56807c6f4a
Added new circuit finding alogrithm.
...
Fixed bug in graph so that phi ite diff edges are added.
llvm-svn: 20108
2005-02-10 17:02:58 +00:00
1137d7c6a1
Allow modsched and local scheduling to both be run.
...
llvm-svn: 20107
2005-02-10 17:02:06 +00:00
e0b789fdf5
so, if you beat on it, you too can talk emacs into having a sane indenting policy... Also, optimize many function calls with pc-relative calls (partial prologue skipping for that case coming soon), try to fix the random jumps to strange places problem by pesimizing div et. al. register usage and fixing up GP before using, some calling convention tweaks, and make frame pointer unallocatable (not strickly necessary, but let's go for correctness first)
...
llvm-svn: 20106
2005-02-10 06:25:22 +00:00
f70ef47ee1
fix fp branch
...
llvm-svn: 20105
2005-02-10 05:17:38 +00:00
06a1d47f96
* Fix spelling of `volatile'
...
* Align comments with tablegen elements
llvm-svn: 20103
2005-02-10 01:52:22 +00:00
8ec0a2b13a
BranchCC, nifty
...
llvm-svn: 20067
2005-02-08 00:40:03 +00:00
d4f440de0f
fix store issue and an FP conversion (segfault) issue
...
llvm-svn: 20066
2005-02-07 23:02:23 +00:00
9d3f7704fd
copytoreg fix
...
llvm-svn: 20063
2005-02-07 06:31:44 +00:00
57047720ce
copyfromreg fix
...
llvm-svn: 20062
2005-02-07 06:21:37 +00:00
351df0c2dc
fix load bug
...
llvm-svn: 20061
2005-02-07 05:55:55 +00:00
5d004edc3d
more FP load store fixes and Load store simplifications
...
llvm-svn: 20060
2005-02-07 05:33:15 +00:00
5fb9b53060
clean up load and stores alot
...
llvm-svn: 20059
2005-02-07 05:18:02 +00:00
a9e02156ce
teach all loads and stores about the stack
...
llvm-svn: 20058
2005-02-07 05:07:00 +00:00
0021f55863
prefer FP scratch registers and more check in LowerArguments
...
llvm-svn: 20057
2005-02-06 21:07:31 +00:00
eefd410522
fix oopso
...
llvm-svn: 20056
2005-02-06 16:22:15 +00:00
6c018f77d1
smarter loads and stores. can now handle base+offset.
...
llvm-svn: 20055
2005-02-06 15:40:40 +00:00
d9bf7b81eb
fix build
...
llvm-svn: 20053
2005-02-05 19:46:51 +00:00
7be9854594
clean up
...
llvm-svn: 20051
2005-02-05 17:41:39 +00:00
ea9224a69a
fix f32 setcc, and fp select
...
llvm-svn: 20050
2005-02-05 16:41:03 +00:00
060d58b88f
added ugly support for fp compares
...
llvm-svn: 20049
2005-02-05 13:19:12 +00:00
ffe9968b5a
Make the rest of file header comments consistent in format and style
...
llvm-svn: 20048
2005-02-05 02:24:26 +00:00
076b9f4507
Make file header comment consistent: extend the whole 80 cols to fill the line
...
llvm-svn: 20039
2005-02-04 20:25:52 +00:00
5152be292a
alignment
...
llvm-svn: 20028
2005-02-04 14:09:38 +00:00
202011fcc7
get alignment printing correctly and get rid of __main hack
...
llvm-svn: 20027
2005-02-04 14:01:21 +00:00
799479138e
FP fixes
...
llvm-svn: 20019
2005-02-03 21:01:15 +00:00
75c6225f32
Store fix
...
llvm-svn: 20004
2005-02-02 17:32:39 +00:00
cf2e21e879
oops
...
llvm-svn: 20003
2005-02-02 17:01:31 +00:00
fe6e7a30c0
prevent register allocator from using the stack pointer :)
...
llvm-svn: 20002
2005-02-02 17:00:21 +00:00
c7042c2d8b
fix loading of floats
...
llvm-svn: 19997
2005-02-02 15:05:33 +00:00
0f42d92ca0
marked mem* as not supported
...
llvm-svn: 19992
2005-02-02 05:49:42 +00:00
07c0b0d92b
fix Load bug
...
llvm-svn: 19987
2005-02-02 04:35:44 +00:00
c7e55f430c
try to make a bug bugpointable, add yet more constant pool stuff, fixup constant loads for FP
...
llvm-svn: 19985
2005-02-02 03:36:35 +00:00
ae88b6a8a8
better constant handling, should fix many remaining cases
...
llvm-svn: 19984
2005-02-02 00:51:15 +00:00
9df6a764b9
fix FP arg passing bug, Add unsigned to/from int, fix SELECT, fix Constant pool
...
llvm-svn: 19976
2005-02-01 20:40:27 +00:00
20d8b2ff71
Print the Constant pool
...
llvm-svn: 19975
2005-02-01 20:38:53 +00:00
32124c0a70
Make cmov work right and loads for fp from constant pool
...
llvm-svn: 19974
2005-02-01 20:36:44 +00:00
c777d4f03d
Correct stack stuff for FP
...
llvm-svn: 19973
2005-02-01 20:35:57 +00:00
8fb0d5002b
try to match alpha pattern
...
llvm-svn: 19972
2005-02-01 20:35:11 +00:00
7703d1ab25
fix register names
...
llvm-svn: 19971
2005-02-01 20:34:29 +00:00
cdc9e33ae5
pecimise loads, put indirect call addr in right register. still doesn't fix methcall
...
llvm-svn: 19963
2005-02-01 01:37:24 +00:00
8dfa2e4465
Fix hyphenation in output comment
...
llvm-svn: 19954
2005-01-31 06:19:57 +00:00
ae25bb1dc5
indirect call fix
...
llvm-svn: 19945
2005-01-31 03:19:31 +00:00
c40d156dc9
fp to int and back conversion sequences
...
llvm-svn: 19944
2005-01-31 01:44:26 +00:00
7141334f98
added fp extend and removed a forgotten assert in more than 6 arg support (should break somewhere else now :) ) and fix an incorrect asm sequence for indirect calls
...
llvm-svn: 19938
2005-01-30 20:42:36 +00:00
8e62f434cd
This code is really unreachable.
...
llvm-svn: 19934
2005-01-30 16:33:46 +00:00
bfa060c5d2
Fix warnings.
...
llvm-svn: 19933
2005-01-30 16:32:48 +00:00
918a29fc51
support for larger calls
...
llvm-svn: 19932
2005-01-30 00:35:27 +00:00
fdec565f1f
Unbreak the build :(
...
llvm-svn: 19926
2005-01-29 19:27:28 +00:00
41bc2c2897
first step towards a correct and complete stack. also add some forms for things that were getting stuck in the nightly tester.
...
llvm-svn: 19914
2005-01-29 15:42:07 +00:00
3479f9cca8
Finegrainify namespacification.
...
Adjust TmpInstruction to work with the new User model.
llvm-svn: 19896
2005-01-29 00:36:59 +00:00
68afd89730
add namespace qualifier
...
llvm-svn: 19895
2005-01-29 00:36:38 +00:00
4a0d200c13
fix ExprMap, partially teach about add long
...
llvm-svn: 19882
2005-01-28 23:17:54 +00:00
579a324137
fix ExprMap and constant check in setcc
...
llvm-svn: 19870
2005-01-28 14:06:46 +00:00
479bc61455
move FP into it's own select
...
llvm-svn: 19867
2005-01-28 06:57:18 +00:00
7c538a6593
stack frame fix and zero FP reg fix
...
llvm-svn: 19857
2005-01-27 08:31:19 +00:00
96515adad6
Floating point instructions like Floating point registers
...
llvm-svn: 19856
2005-01-27 07:58:15 +00:00
0cceb5165e
int to float conversion and another setcc
...
llvm-svn: 19855
2005-01-27 07:50:35 +00:00
3c361fd6f7
teach isel about comparison with constants and zero extending bits
...
llvm-svn: 19853
2005-01-27 03:49:45 +00:00
5374789198
perhaps this will let me have calls again
...
llvm-svn: 19851
2005-01-27 01:22:48 +00:00
9e27e54d70
minor bug fix
...
llvm-svn: 19850
2005-01-27 00:52:26 +00:00
9748b623a4
minor bug fix
...
llvm-svn: 19849
2005-01-27 00:51:05 +00:00
267908ad47
added instructions for fp to int to fp moves
...
llvm-svn: 19848
2005-01-26 23:56:48 +00:00
5ae5f81720
initial fp support
...
llvm-svn: 19847
2005-01-26 21:54:09 +00:00
589304de7f
hum, writing on one machine, testing on another...
...
llvm-svn: 19844
2005-01-26 02:53:56 +00:00
02c5459948
add some operations, fix others. should compile several more tests now
...
llvm-svn: 19843
2005-01-26 01:24:38 +00:00
1b20615173
We can fold promoted and non-promoted loads into divs also!
...
llvm-svn: 19835
2005-01-25 20:35:10 +00:00
30607ec66e
Fold promoted loads into binary ops for FP, allowing us to generate m32 forms
...
of FP ops.
llvm-svn: 19834
2005-01-25 20:03:11 +00:00
ba2bcd867f
problems with bools, and their work arounds
...
llvm-svn: 19833
2005-01-25 19:58:40 +00:00
122489bcab
more load choices, better add with imm
...
llvm-svn: 19821
2005-01-25 00:35:34 +00:00
2f0f845534
Clean ups, and taught the instruction selector about immediate forms
...
llvm-svn: 19816
2005-01-24 19:44:07 +00:00
6d1a96bccc
Alpha JIT prune
...
llvm-svn: 19815
2005-01-24 18:48:22 +00:00
3c12772190
include prune and JIT prune
...
llvm-svn: 19814
2005-01-24 18:45:41 +00:00
4680f89526
Pruned includes
...
llvm-svn: 19813
2005-01-24 18:37:48 +00:00
39837024ae
Fix a spurious warning.
...
llvm-svn: 19799
2005-01-24 01:40:18 +00:00
0e1de101a1
Silence a warning.
...
llvm-svn: 19798
2005-01-23 23:20:06 +00:00
debae1e3c3
Allow the FP stackifier to completely ignore functions that do not use FP at
...
all. This should speed up the X86 backend fairly significantly on integer
codes. Now if only we didn't have to compute livevar still... ;-)
llvm-svn: 19796
2005-01-23 23:13:59 +00:00
28939a222e
Build Alpha by default.
...
llvm-svn: 19777
2005-01-23 04:34:46 +00:00
d5d45b8d1a
Fix alloca support for Cygwin. On cygwin its __alloca not __builtin_alloca
...
llvm-svn: 19776
2005-01-23 04:32:47 +00:00
30226da5b3
Support Cygwin assembly generation. The cygwin version of Gnu ASsembler
...
doesn't support certain directives and symbols on cygwin are prefixed with
an underscore. This patch makes the necessary adjustments to the output.
llvm-svn: 19775
2005-01-23 03:52:14 +00:00
a1b5ca2b9d
Let me introduce you to the early stages of the llvm backend for the alpha processor
...
llvm-svn: 19764
2005-01-22 23:41:55 +00:00
e70eb9da7d
Speed up folding operations into loads.
...
llvm-svn: 19733
2005-01-21 21:43:02 +00:00
e1e844c416
The ever-important vanity pass name :)
...
llvm-svn: 19731
2005-01-21 21:35:14 +00:00
c78776d209
Fix a FIXME: realize that argument stores are all independent (don't alias)
...
llvm-svn: 19728
2005-01-21 19:46:38 +00:00
2a631fa406
Implement ADD_PARTS/SUB_PARTS so that 64-bit integer add/sub work. This
...
fixes most of the remaining llc-beta failures.
llvm-svn: 19716
2005-01-20 18:53:00 +00:00
5b04f33405
Fix a crash compiling 134.perl.
...
llvm-svn: 19711
2005-01-20 16:50:16 +00:00
474aac4da9
Fix a problem where were were literally selecting for INCREASED register
...
pressure, not decreases register pressure. Fix problem where we accidentally
swapped the operands of SHLD, which caused fourinarow to fail. This fixes
fourinarow.
llvm-svn: 19697
2005-01-19 17:24:34 +00:00
25be208e02
When commuting these instructions, make sure to actually swap the operands too.
...
llvm-svn: 19694
2005-01-19 16:55:52 +00:00
de87d146ab
Implement Regression/CodeGen/X86/rotate.ll: emit rotate instructions (which
...
typically cost 1 cycle) instead of shld/shrd instruction (which are typically
6 or more cycles). This also saves code space.
For example, instead of emitting:
rotr:
mov %EAX, DWORD PTR [%ESP + 4]
mov %CL, BYTE PTR [%ESP + 8]
shrd %EAX, %EAX, %CL
ret
rotli:
mov %EAX, DWORD PTR [%ESP + 4]
shrd %EAX, %EAX, 27
ret
Emit:
rotr32:
mov %CL, BYTE PTR [%ESP + 8]
mov %EAX, DWORD PTR [%ESP + 4]
ror %EAX, %CL
ret
rotli32:
mov %EAX, DWORD PTR [%ESP + 4]
ror %EAX, 27
ret
We also emit byte rotate instructions which do not have a sh[lr]d counterpart
at all.
llvm-svn: 19692
2005-01-19 08:07:05 +00:00
0edf9535b9
Add rotate instructions.
...
llvm-svn: 19690
2005-01-19 07:50:03 +00:00
29f5819158
Match 16-bit shld/shrd instructions as well, implementing shift-double.llx:test5
...
llvm-svn: 19689
2005-01-19 07:37:26 +00:00
d54845f530
Improve coverage of the X86 instruction set by adding 16-bit shift doubles.
...
llvm-svn: 19687
2005-01-19 07:31:24 +00:00
2947801735
Teach the code generator that shrd/shld is commutable if it has an immediate.
...
This allows us to generate this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
shld %EDX, %EDX, 2
shl %EAX, 2
ret
instead of this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
mov %EDX, %EAX
shrd %EDX, %ECX, 30
shl %EAX, 2
ret
Note the magically transmogrifying immediate.
llvm-svn: 19686
2005-01-19 07:11:01 +00:00
f6932b700b
Finegrainify namespacification
...
Add default impl of commuteInstruction
Add notes about ugly V9 code.
llvm-svn: 19684
2005-01-19 06:53:34 +00:00
41fe201b61
Codegen long >> 2 to this:
...
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
shrd %EAX, %EDX, 2
sar %EDX, 2
ret
instead of this:
test1:
mov %ECX, DWORD PTR [%ESP + 4]
shr %ECX, 2
mov %EDX, DWORD PTR [%ESP + 8]
mov %EAX, %EDX
shl %EAX, 30
or %EAX, %ECX
sar %EDX, 2
ret
and long << 2 to this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
*** mov %EDX, %EAX
shrd %EDX, %ECX, 30
shl %EAX, 2
ret
instead of this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, %EAX
shr %ECX, 30
mov %EDX, DWORD PTR [%ESP + 8]
shl %EDX, 2
or %EDX, %ECX
shl %EAX, 2
ret
The extra copy (marked ***) can be eliminated when I teach the code generator
that shrd32rri8 is really commutative.
llvm-svn: 19681
2005-01-19 06:18:43 +00:00
d8d306601a
X86 shifts mask the amount.
...
llvm-svn: 19678
2005-01-19 03:36:30 +00:00
a05cd83d2f
Add a hook to find out how the target handles shift amounts that are out of
...
range. Either they are undefined (the default), they mask the shift amount
to the size of the register (X86, Alpha, etc), or they extend the shift (PPC).
This defaults to undefined, which is conservatively correct.
llvm-svn: 19677
2005-01-19 03:36:14 +00:00
14947c34cc
Code to handle FP_EXTEND is dead now. X86 doesn't support any data types to
...
FP_EXTEND from!
llvm-svn: 19674
2005-01-18 20:05:56 +00:00
c6e928cba5
Remove more dead code.
...
llvm-svn: 19673
2005-01-18 19:50:08 +00:00
0616fa6b9b
The selection dag code handles the promotions from F32 to F64 for us, so we
...
don't need to even think about F32 in the X86 code anymore.
llvm-svn: 19672
2005-01-18 19:46:54 +00:00
479c7118e4
Fix 124.m88ksim.
...
llvm-svn: 19667
2005-01-18 17:35:28 +00:00
ed246ec0d2
Do not emit loads multiple times, potentially in the wrong places.
...
llvm-svn: 19661
2005-01-18 04:18:32 +00:00
c227ad2640
Minor changes.
...
llvm-svn: 19660
2005-01-18 04:15:41 +00:00
28a205e01b
Eliminate bad assertions.
...
llvm-svn: 19659
2005-01-18 04:00:54 +00:00
78d3028350
* Eliminate the TokenSet and just use the ExprMap for both tokens and values.
...
* Insert some really pedantic assertions that will notice when we emit the
same loads more than one time, exposing bugs. This turns a miscompilation in
bzip2 into a compile-fail. yaay.
llvm-svn: 19658
2005-01-18 03:51:59 +00:00
d7f93950aa
Rely on the code in MatchAddress to do this work. Otherwise we fail to
...
match (X+Y)+(Z << 1), because we match the X+Y first, consuming the index
register, then there is no place to put the Z.
llvm-svn: 19652
2005-01-18 02:25:52 +00:00
a7acdda064
Fix a problem where probing for addressing modes caused expressions to be
...
emitted too early. In particular, this fixes
Regression/CodeGen/X86/regpressure.ll:regpressure3.
This also improves the 2nd basic block in 164.gzip:flush_block, which went from
.LBBflush_block_1: # loopentry.1.i
movzx %EAX, WORD PTR [dyn_ltree + 20]
movzx %ECX, WORD PTR [dyn_ltree + 16]
mov DWORD PTR [%ESP + 32], %ECX
movzx %ECX, WORD PTR [dyn_ltree + 12]
movzx %EDX, WORD PTR [dyn_ltree + 8]
movzx %EBX, WORD PTR [dyn_ltree + 4]
mov DWORD PTR [%ESP + 36], %EBX
movzx %EBX, WORD PTR [dyn_ltree]
add DWORD PTR [%ESP + 36], %EBX
add %EDX, DWORD PTR [%ESP + 36]
add %ECX, %EDX
add DWORD PTR [%ESP + 32], %ECX
add %EAX, DWORD PTR [%ESP + 32]
movzx %ECX, WORD PTR [dyn_ltree + 24]
add %EAX, %ECX
mov %ECX, 0
mov %EDX, %ECX
to
.LBBflush_block_1: # loopentry.1.i
movzx %EAX, WORD PTR [dyn_ltree]
movzx %ECX, WORD PTR [dyn_ltree + 4]
add %ECX, %EAX
movzx %EAX, WORD PTR [dyn_ltree + 8]
add %EAX, %ECX
movzx %ECX, WORD PTR [dyn_ltree + 12]
add %ECX, %EAX
movzx %EAX, WORD PTR [dyn_ltree + 16]
add %EAX, %ECX
movzx %ECX, WORD PTR [dyn_ltree + 20]
add %ECX, %EAX
movzx %EAX, WORD PTR [dyn_ltree + 24]
add %ECX, %EAX
mov %EAX, 0
mov %EDX, %EAX
... which results in less spilling in the function.
This change alone speeds up 164.gzip from 37.23s to 36.24s on apoc. The
default isel takes 37.31s.
llvm-svn: 19650
2005-01-18 01:06:26 +00:00
b93409f3e2
Fix indentation.
...
llvm-svn: 19649
2005-01-17 23:25:45 +00:00
a5d137f471
Don't bother using max here.
...
llvm-svn: 19647
2005-01-17 23:02:13 +00:00
ca318edb94
Do not give token factor nodes outrageous weights
...
llvm-svn: 19645
2005-01-17 22:56:09 +00:00
e86c933df7
Two changes:
...
1. Fold [mem] += (1|-1) into inc [mem]/dec [mem] to save some icache space.
2. Do not let token factor nodes prevent forming '[mem] op= val' folds.
llvm-svn: 19643
2005-01-17 22:10:42 +00:00
96113fd08f
Refactor load/op/store folding into it's own method, no functionality changes.
...
llvm-svn: 19641
2005-01-17 19:25:26 +00:00
9098879472
Fix a major regression last night that prevented us from producing [mem] op= reg
...
operations.
The body of the if is less indented but unmodified in this patch.
llvm-svn: 19638
2005-01-17 17:49:14 +00:00
b72ea1b719
Codegen this:
...
int %foo(int %X) {
%T = add int %X, 13
%S = mul int %T, 3
ret int %S
}
as this:
mov %ECX, DWORD PTR [%ESP + 4]
lea %EAX, DWORD PTR [%ECX + 2*%ECX + 39]
ret
instead of this:
mov %ECX, DWORD PTR [%ESP + 4]
mov %EAX, %ECX
add %EAX, 13
imul %EAX, %EAX, 3
ret
llvm-svn: 19633
2005-01-17 06:48:02 +00:00
a8b2929f45
Added tmp instructions to preserve ssa.
...
llvm-svn: 19632
2005-01-17 06:47:26 +00:00
a56d29d517
Fix test/Regression/CodeGen/X86/2005-01-17-CycleInDAG.ll and 132.ijpeg.
...
Do not fold a load into an operation if it will induce a cycle in the DAG.
Repeat after me: dAg.
llvm-svn: 19631
2005-01-17 06:26:58 +00:00
3be6cd57c9
Do not fold a load into a comparison that is used by more than one place.
...
The comparison will probably be folded, so this is not ok to do.
This fixed 197.parser.
llvm-svn: 19624
2005-01-17 01:34:14 +00:00
0cd6b9ae1e
Do not codegen 'xor bool, true' as 'not reg'. not reg inverts the upper bits
...
of the bytereg. This fixes yacr2, 300.twolf and probably others.
llvm-svn: 19622
2005-01-17 00:23:16 +00:00
c1f386c7b8
Set up the shift and setcc types.
...
If we emit a load because we followed a token chain to get to it, try to
fold it into its single user if possible.
llvm-svn: 19620
2005-01-17 00:00:33 +00:00
5f180e4645
Shift and setcc types default to the pointer type.
...
llvm-svn: 19619
2005-01-16 23:59:48 +00:00
e4872342db
Added paramters to a few functions in order to allow me to change the functions to preserve SSA
...
llvm-svn: 19615
2005-01-16 08:51:10 +00:00
b14a63aa1c
* Adjust to changes in TargetLowering interfaces.
...
* Remove custom promotion for bool and byte select ops. Legalize now
promotes them for us.
* Allow folding ConstantPoolIndexes into EXTLOAD's, useful for float immediates.
* Declare which operations are not supported better.
* Add some hacky code for TRUNCSTORE to pretend that we have truncstore
for i16 types. This is useful for testing promotion code because I can
just remove 16-bit registers all together and verify that programs work.
llvm-svn: 19614
2005-01-16 07:34:08 +00:00
6f8097951c
Use enums, move virtual dtor out of line.
...
llvm-svn: 19610
2005-01-16 07:28:11 +00:00
d0a65013ab
cycles_t -> CycleCount_t
...
llvm-svn: 19604
2005-01-16 04:20:30 +00:00
0e48bf8a19
Rename BUILD_* to PROJ_*
...
llvm-svn: 19592
2005-01-16 02:21:29 +00:00
7462d192b8
Fixed a couple of instructions that broke SSA.
...
llvm-svn: 19587
2005-01-16 02:14:17 +00:00
cebb964fef
Improve compatiblity with HPUX on Itanium, patch by Duraid Madina
...
llvm-svn: 19586
2005-01-16 01:31:31 +00:00
8ec1dc5fc0
Set up identity transforms.
...
llvm-svn: 19584
2005-01-16 01:20:18 +00:00
1bc93bac69
Move some information out of LegalizeDAG into the generic Target interface.
...
llvm-svn: 19581
2005-01-16 01:10:58 +00:00
9de5890211
Add a new target-independent code generator flag.
...
llvm-svn: 19567
2005-01-15 06:00:32 +00:00
e18a4c4c19
Add support for truncstore and *extload.
...
llvm-svn: 19566
2005-01-15 05:22:24 +00:00
720a62e8c7
Adjust to CopyFromREg changes.
...
llvm-svn: 19561
2005-01-14 22:37:41 +00:00
d7bffad559
Fix Regression/CodeGen/PowerPC/2005-01-14-UndefLong.ll
...
llvm-svn: 19557
2005-01-14 20:22:02 +00:00
c3ed31f837
Fix: Regression/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll
...
llvm-svn: 19555
2005-01-14 19:31:00 +00:00
e727af06c8
Add new ImplicitDef node, rename CopyRegSDNode class to RegSDNode.
...
llvm-svn: 19535
2005-01-13 20:50:02 +00:00
15bd19dd76
Codegen factor nodes more intelligently according to perceived register pressure.
...
llvm-svn: 19532
2005-01-13 19:56:00 +00:00
c251fb6441
Initial trivial (but stupid) codegen for this node.
...
llvm-svn: 19529
2005-01-13 18:01:36 +00:00
3676cd6fe2
Add some really pedantic assertions to the load folding code. Fix a bunch
...
of cases where we accidentally emitted a load folded once and unfolded
elsewhere.
llvm-svn: 19522
2005-01-13 05:53:16 +00:00
7b1dae8032
We can only fold a load into an op if there is exactly one use of the value.
...
Checking to see if the load has two uses is not equivalent, as the chain
value may have zero uses.
llvm-svn: 19518
2005-01-12 18:38:26 +00:00
1755360db6
Try both ways to fold an add together. This allows us to generate this code
...
imul %EAX, %EAX, 400
add %ECX, %EAX
add %ESI, DWORD PTR [%ECX + 4*%EDX]
inc %EDX
cmp %EDX, 100
instead of this:
imul %EAX, %EAX, 400
add %ECX, %EAX
mov %EAX, %EDX
shl %EAX, 2
add %ECX, %EAX
add %ESI, DWORD PTR [%ECX]
inc %EDX
cmp %EDX, 100
llvm-svn: 19513
2005-01-12 18:08:53 +00:00
42e7e98908
Fix a major miscompilation where we were overwriting the scale reg.
...
llvm-svn: 19511
2005-01-12 07:33:20 +00:00
db4b67c81e
Do not use the type of the RHS constant to determine the type of the operation.
...
This fails for shifts because the constant is always 8 bits.
llvm-svn: 19508
2005-01-12 05:22:07 +00:00
bdb2e9dabc
Do not lose the offset from teh global when peephole optimizing instructions.
...
This fixes FreeBench/pcompress
llvm-svn: 19507
2005-01-12 05:17:28 +00:00
407aa0198c
Fix C++ more compilatiom errors
...
llvm-svn: 19504
2005-01-12 04:29:05 +00:00
efe90209ef
Fix a compile error with VC++, which things that static const arrays need
...
to be dynamically initialized. :(
llvm-svn: 19503
2005-01-12 04:23:22 +00:00
6fba62d6ec
Fix a bug that caused us to crash on povray. We weren't emitting an FP_REG_KILL into a block that had a successor with a FP PHI node.
...
llvm-svn: 19502
2005-01-12 04:21:28 +00:00
bb4c14f270
Print a load of a null pointer (in intel mode) like this:
...
mov %AX, WORD PTR [0]
instead of like this:
mov %AX, WORD PTR []
llvm-svn: 19501
2005-01-12 04:07:11 +00:00
b372fab2be
Print a load of a null pointer like this:
...
movw 0, %ax
instead of like this:
movw , %ax
llvm-svn: 19500
2005-01-12 04:05:19 +00:00
f8f79c4192
Fix a crash compiling povray on UINT_TO_FP from i16.
...
llvm-svn: 19499
2005-01-12 04:00:00 +00:00
3278ce8871
There are no [mem] op= reg instructions for FP, so remove their entries.
...
llvm-svn: 19496
2005-01-12 03:16:09 +00:00
e49a335797
Fix a bug where we didn't insert FP_REG_KILL instructions into MBB's that
...
contain FP PHI nodes but no other FP defining instructions. This fixes
183.equake
llvm-svn: 19495
2005-01-12 02:57:10 +00:00
b7fe57a0f1
Fold TRUNCATE (LOAD P) into a smaller load from P.
...
llvm-svn: 19494
2005-01-12 02:19:06 +00:00
2cfce6853b
Be more careful about order of arg evalution for CopyToReg nodes. This shrinks
...
256.bzip2 from 7142 to 7103 lines of .s file.
Second, add initial support for folding loads into compares, though this code
is dynamically dead for now. :(
llvm-svn: 19493
2005-01-12 02:02:48 +00:00
021cfd2a80
Fold some more [mem] op= val operators. This allows us to things like this
...
several times in 256.bzip2:
mov %EAX, DWORD PTR [%ESP + 204]
- mov %EAX, DWORD PTR [%EAX]
- or %EAX, 2097152
- mov %ECX, DWORD PTR [%ESP + 204]
- mov DWORD PTR [%ECX], %EAX
+ or DWORD PTR [%EAX], 2097152
llvm-svn: 19492
2005-01-12 01:28:00 +00:00
b0eef82b82
Fold loads into sign/zero extends. instead of:
...
mov %AL, BYTE PTR [%EDX + l18_length_code]
movzx %EAX, %AL
Emit:
movzx %EAX, BYTE PTR [%EDX + l18_length_code]
llvm-svn: 19489
2005-01-11 23:33:00 +00:00
75bac9f786
Comment out debug code :)
...
Select [mem] += Val operations. For constants, we used to get:
mov %ECX, -32768
add %ECX, DWORD PTR [l4_match_start]
mov DWORD PTR [l4_match_start], %ECX
Now we get:
add DWORD PTR [l4_match_start], -32768
For other values we used to get:
mov %EBP, %EDI ;; because the add destroys the value
add %EBP, DWORD PTR [l4_input_len]
mov DWORD PTR [l4_input_len], %EBP
now we get:
add DWORD PTR [l4_input_len], %EDI
Both of these use less registers than the alternative, are faster and smaller.
llvm-svn: 19488
2005-01-11 23:21:30 +00:00
d28ae12168
Handle the global address case here, not just the offset case.
...
llvm-svn: 19487
2005-01-11 22:58:43 +00:00
8aa10fcd1b
Treat int constants as not requiring a register, since they are almost always
...
folded into an instruction.
llvm-svn: 19486
2005-01-11 22:29:12 +00:00
62b22420be
* Factor a bunch of binary operator cases into shared code.
...
* Fold loads into Add, sub, and, or, xor and mul when possible.
* Codegen shl X, 1 as add X, X
llvm-svn: 19483
2005-01-11 21:19:59 +00:00
4cbf1f0038
Clear the whole array, always.
...
llvm-svn: 19482
2005-01-11 20:25:26 +00:00
8cf9cdae3d
Fold multiplies by 3,5,9 into addressing modes when possible.
...
llvm-svn: 19480
2005-01-11 19:37:02 +00:00
b74ec4cd24
Instead of generating stuff like this:
...
mov %ECX, %EAX
add %ECX, 32768
mov %SI, WORD PTR [2*%ECX + l13_prev]
Generate this:
mov %SI, WORD PTR [2*%ECX + l13_prev + 65536]
This occurs when you have a GEP instruction where an index is
"something + imm".
llvm-svn: 19472
2005-01-11 06:36:20 +00:00
c07164e909
Implement MEMCPY natively in terms of rep movs*
...
llvm-svn: 19468
2005-01-11 06:19:26 +00:00
36f7848b26
Implement memset -> rep stos*
...
llvm-svn: 19467
2005-01-11 06:14:36 +00:00
a19f84240f
Announce that we don't support mem ops yet.
...
llvm-svn: 19466
2005-01-11 05:57:36 +00:00
378262d33b
Teach the address selector to make 'reg+reg' addressing modes.
...
llvm-svn: 19457
2005-01-11 04:40:19 +00:00
9d7cf998ca
Emit NOT instructions.
...
llvm-svn: 19455
2005-01-11 04:31:30 +00:00
37ed28558f
Fix a bug emitting branches that broke a lot of programs.
...
llvm-svn: 19452
2005-01-11 04:06:27 +00:00
e44e6d16fb
Be more careful where we set ContainsFPCode. We were missing a set in the
...
int -> FP casting code. Note that we don't have to set it for FP operations
that take FP values as operands: whatever produces the FP value will set the
flag.
llvm-svn: 19451
2005-01-11 03:50:45 +00:00
8fea42bd6d
Fix a major bug in setcc/cmov folding, where we accidentally
...
inverted the sense of the comparison.
llvm-svn: 19450
2005-01-11 03:37:59 +00:00
0d1f82ac2f
Take register pressure into account when we have to decide whether to
...
evaluate the LHS or the RHS of an operation first. This causes good things
to happen. For example, instead of compiling a loop to this:
.LBBstrength_result7_1: # loopentry
movl 16(%esp), %edi
movl (%edi), %edi ;;; LOAD
movl (%ecx), %ebx
movl $2, (%eax,%ebx,4)
movl (%edx), %ebx
movl %esi, %ebp
addl $21, %ebp
addl $42, %esi
cmpl $0, %edi ;;; USE
cmovne %esi, %ebp
cmpl %ebp, %ebx
movl %ebp, %esi
jg .LBBstrength_result7_1
We now compile it to this:
.LBBstrength_result7_1: # loopentry
movl %edi, %ebx
addl $42, %ebx
addl $21, %edi
movl (%ecx), %ebp ;; LOAD
cmpl $0, %ebp ;; USE
cmovne %ebx, %edi
movl (%edx), %ebx
movl $2, (%eax,%ebx,4)
movl (%esi), %ebx
cmpl %edi, %ebx
jg .LBBstrength_result7_1
Which reduces register pressure enough (in this case) to avoid spilling in the
loop.
As another example, consider the CodeGen/X86/regpressure.ll testcase. We
used to generate this code for both cases:
regpressure1:
subl $32, %esp
movl %esi, 12(%esp)
movl %edi, 8(%esp)
movl %ebx, 4(%esp)
movl %ebp, (%esp)
movl 36(%esp), %ecx
movl (%ecx), %eax
movl 4(%ecx), %edx
movl %edx, 24(%esp)
movl 8(%ecx), %edx
movl %edx, 16(%esp)
movl 12(%ecx), %edx
movl 16(%ecx), %esi
movl 20(%ecx), %edi
movl 24(%ecx), %ebx
movl %ebx, 28(%esp)
movl 28(%ecx), %ebx
movl 32(%ecx), %ebp
movl %ebp, 20(%esp)
movl 36(%ecx), %ecx
imull 24(%esp), %eax
imull 16(%esp), %eax
imull %edx, %eax
imull %esi, %eax
imull %edi, %eax
imull 28(%esp), %eax
imull %ebx, %eax
imull 20(%esp), %eax
imull %ecx, %eax
movl (%esp), %ebp
movl 4(%esp), %ebx
movl 8(%esp), %edi
movl 12(%esp), %esi
addl $32, %esp
ret
This code is basically trying to do all of the loads first, then execute all
of the multiplies. Because we run out of registers, lots of spill code happens.
We now generate this code for both cases:
regpressure1:
movl 4(%esp), %ecx
movl (%ecx), %eax
movl 4(%ecx), %edx
imull %edx, %eax
movl 8(%ecx), %edx
imull %edx, %eax
movl 12(%ecx), %edx
imull %edx, %eax
movl 16(%ecx), %edx
imull %edx, %eax
movl 20(%ecx), %edx
imull %edx, %eax
movl 24(%ecx), %edx
imull %edx, %eax
movl 28(%ecx), %edx
imull %edx, %eax
movl 32(%ecx), %edx
imull %edx, %eax
movl 36(%ecx), %ecx
imull %ecx, %eax
ret
which is much nicer (when we fold loads into the muls it will be even better).
The old instruction selector used to produce the good code for regpressure1
but not for regpressure2, as it depended on the order of operations in the
LLVM code.
llvm-svn: 19449
2005-01-11 03:11:44 +00:00
1d13a92af4
Fold setcc instructions into selects.
...
llvm-svn: 19438
2005-01-10 22:10:13 +00:00
5b589ec0c4
Add conditional moves for the parity flag.
...
llvm-svn: 19437
2005-01-10 22:09:33 +00:00
750d38b5b7
Implement 8-bit multiply for X86.
...
llvm-svn: 19435
2005-01-10 20:55:48 +00:00
cf8fd0c0db
Codegen (Reg|imm)+&GV as an LEA, because we cannot put it into the immediate field
...
of an ADDri (due to current restrictions on MachineOperand :( ). This allows
us to generate:
leal Data+16000, %edx
instead of:
movl $Data, %edx
addl $16000, %edx
llvm-svn: 19420
2005-01-09 20:20:29 +00:00
66d3430236
Fix copy and pasto's for FP -> Int. This fixes fldry
...
llvm-svn: 19418
2005-01-09 19:49:59 +00:00
282781c797
Initial implementation of FP->INT and INT->FP casts
...
Also, fix zero_extend from bool to i8, which fixes Shootout/objinst.
llvm-svn: 19414
2005-01-09 18:52:44 +00:00
fb217c6b94
Fix a subtle bug involving constant expr casts from int to fp
...
llvm-svn: 19410
2005-01-09 01:49:29 +00:00
9f59d28d67
Implement varargs and returnaddress/frameaddress intrinsics. With this
...
patch, all of SingleSource/UnitTests passes.
llvm-svn: 19408
2005-01-09 00:01:27 +00:00
313ddb59c9
Okay 15th time is the charm. Looking at the vector size is useless as it
...
gets clobbered by a previous statement. This fixes all calls finally.
llvm-svn: 19399
2005-01-08 20:51:36 +00:00
f5bbe85879
Okay, my off by one was actually off by two. This fixes Generic/2003-07-07-BadLongConst.ll
...
llvm-svn: 19398
2005-01-08 20:39:31 +00:00
a183eb75eb
Fix off by one error
...
llvm-svn: 19396
2005-01-08 20:31:34 +00:00
b52e041c80
Adjust to changes in LowerCallTo interface
...
Minor bugfixes
llvm-svn: 19376
2005-01-08 19:28:19 +00:00
8da67af979
Wrap long line.
...
llvm-svn: 19367
2005-01-08 06:59:50 +00:00
b923438fe6
The X86 instruction selector already handles codegen of:
...
store float 123.45, float* %P
as an integer store. This adds handling of float immediate stores as integers
for arguments passed function calls.
This is now tested by CodeGen/X86/store-fp-constant.ll
llvm-svn: 19364
2005-01-08 05:45:24 +00:00
ca4ca5520b
Allow the selection-dag based selector to be diabled with -disable-pattern-isel.
...
For now, this is the default, as the current selector is missing some big pieces.
To enable the new selector, pass -disable-pattern-isel=false to llc or lli.
llvm-svn: 19335
2005-01-07 07:50:50 +00:00
88c8a23891
Reimplementation of the X86 pattern isel. This is still missing many large
...
pieces, but can already do amazing things in some cases.
llvm-svn: 19334
2005-01-07 07:49:41 +00:00
ce413c8c9f
This file is now dead.
...
llvm-svn: 19333
2005-01-07 07:49:05 +00:00
ff9e21c8d3
Add a new prototype
...
llvm-svn: 19332
2005-01-07 07:48:33 +00:00
3a4d1b2721
First draft of new Target interface
...
llvm-svn: 19324
2005-01-07 07:44:53 +00:00
ae15482076
Codegen -1 and -0.0 more efficiently. This implements CodeGen/X86/negatize_zero.ll
...
llvm-svn: 19313
2005-01-06 21:19:16 +00:00
b56965be08
Fix CBE code so that it compiles with VC++.
...
llvm-svn: 19303
2005-01-06 04:21:49 +00:00
1ee6dfa501
1. If a double FP constant must be put into a constant pool, but it can be
...
precisely represented as a float, put it into the constant pool as a
float.
2. Use the cbw/cwd/cdq instructions instead of an explicit SAR for signed
division.
llvm-svn: 19291
2005-01-05 16:30:14 +00:00
0f7e786a6b
Minor optimization to allocate R8 registers in a better order.
...
llvm-svn: 19289
2005-01-05 16:09:16 +00:00
68f28730b7
Revert elimination of global variable hack... still needed.
...
llvm-svn: 19273
2005-01-03 16:34:19 +00:00
d4bb2bbce1
ADC and IMUL are also commutable.
...
llvm-svn: 19264
2005-01-03 01:27:59 +00:00
82787e90f3
This hunk:
...
- unsigned TrueValue = getReg(TrueVal, BB, BB->begin());
+ unsigned TrueValue = getReg(TrueVal);
Fixes the PPC regressions from last night.
The other hunk is just a clarity improvement.
llvm-svn: 19263
2005-01-02 23:07:31 +00:00
2cf40e142c
Eliminate the use of the global variable hack in the X86 target that was used
...
to get Visual Studio to link in X86.lib to the executables that need it. There
is another way of doing it.
llvm-svn: 19252
2005-01-02 04:23:12 +00:00
733aac1270
Disable 2->3 address promotion of add and inc instructions to LEA's. In
...
addition to being three address, LEA's don't set the flags.
This fixes 186.crafty.
llvm-svn: 19251
2005-01-02 04:18:17 +00:00
e7228736e0
Add a new method.
...
llvm-svn: 19249
2005-01-02 02:38:18 +00:00
b62b45b3fc
Add support for SETNPr to lower to memory form.
...
llvm-svn: 19248
2005-01-02 02:37:46 +00:00
b7782d77c1
Implement the convertToThreeAddress method, add support for inverting JP/JNP
...
branches.
llvm-svn: 19247
2005-01-02 02:37:07 +00:00
295e45e60e
Two changes here:
...
1. Add new instructions for checking parity flags: JP, JNP, SETP, SETNP.
2. Set the isCommutable and isPromotableTo3Address bits on several
instructions.
llvm-svn: 19246
2005-01-02 02:35:46 +00:00
182db0cac0
Add some bits that can be set for instructions.
...
llvm-svn: 19241
2005-01-02 02:27:48 +00:00
83df5d25b7
Fix a FIXME: Select instructions on longs were miscompiled.
...
While we're at it, improve codegen of select instructions. For this
testcase:
int %test(bool %C, int %A, int %B) {
%D = select bool %C, int %A, int %B
ret int %D
}
We used to generate this code:
_test:
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
b .LBB_test_3 ;
.LBB_test_2: ;
or r5, r4, r4
.LBB_test_3: ;
or r3, r5, r5
blr
Now we emit:
_test:
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
or r4, r5, r5
.LBB_test_2: ;
or r3, r4, r4
blr
-Chris
llvm-svn: 19214
2005-01-01 16:10:12 +00:00
78394258ae
Substantially improve the code generated by non-folded setcc instructions.
...
In particular, instead of compiling this:
bool %test(int %A, int %B) {
%C = setlt int %A, %B
ret bool %C
}
to this:
test:
save %sp, -96, %sp
subcc %i0, %i1, %g0
bl .LBBtest_1 !
nop
ba .LBBtest_2 !
nop
.LBBtest_1: !
or %g0, 1, %i0
ba .LBBtest_3 !
nop
.LBBtest_2: !
or %g0, 0, %i0
ba .LBBtest_3 !
nop
.LBBtest_3: !
restore %g0, %g0, %g0
retl
nop
We now compile it to this:
test:
save %sp, -96, %sp
subcc %i0, %i1, %g0
or %g0, 1, %i0
bl .LBBtest_2 !
nop
.LBBtest_1: !
or %g0, %g0, %i0
.LBBtest_2: !
restore %g0, %g0, %g0
retl
nop
llvm-svn: 19213
2005-01-01 16:06:57 +00:00
93feeb18f1
Fix PR490
...
Fix testcase CodeGen/CBackend/2004-12-28-LogicalConstantExprs.ll
llvm-svn: 19176
2004-12-29 04:00:09 +00:00
45382d34cc
Remove unused enum value
...
llvm-svn: 19024
2004-12-17 22:41:46 +00:00
227010bb31
Remove unused #include
...
llvm-svn: 19021
2004-12-17 19:07:04 +00:00
db0bf10e4a
Change the sentinal
...
llvm-svn: 19007
2004-12-17 00:46:51 +00:00
979b903916
Create a stack slot for the return address lazily instead of eagerly. This
...
save small amounts of time for functions that don't call llvm.returnaddress
or llvm.frameaddress (which is almost all functions).
llvm-svn: 19006
2004-12-17 00:07:46 +00:00
991b5e9457
Chris is a pain ;) Removing reassociate.
...
llvm-svn: 19005
2004-12-16 23:16:16 +00:00
a5528e89fd
Removing commented out lines.
...
llvm-svn: 19004
2004-12-16 23:13:16 +00:00
08e19bb412
Removed LICM and GCSE.
...
llvm-svn: 19003
2004-12-16 23:07:36 +00:00
5a4c66cfe9
Remove dead #include
...
llvm-svn: 18994
2004-12-16 19:32:38 +00:00
20d74fd986
Adjust to changes in asmwriter filenames
...
llvm-svn: 18987
2004-12-16 17:33:24 +00:00
a38954dd64
Specify all of the targets built.
...
llvm-svn: 18985
2004-12-16 17:26:44 +00:00
03227509c0
Use the rules in Makefile.rules to build SparcV9GenCodeEmitter.inc instead
...
of custom rules.
llvm-svn: 18984
2004-12-16 16:47:56 +00:00
0bc3333ff4
Fix header
...
llvm-svn: 18983
2004-12-16 16:47:03 +00:00
0782e27d85
Factor out common .td file chunks.
...
llvm-svn: 18982
2004-12-16 16:31:57 +00:00
298a7f8d8b
Fix PR485, instead of emitting zero sized arrays, emit arrays of size 1.
...
llvm-svn: 18974
2004-12-15 23:13:15 +00:00
4bc39bef79
The mystery of Olden/tsp solved, and more opportunities for speedup.
...
llvm-svn: 18932
2004-12-14 09:10:10 +00:00
36c14da84f
Get rid of shifts by zero in most cases.
...
llvm-svn: 18931
2004-12-14 08:21:02 +00:00
b3b1c279a2
When generating code for X86 targets, make sure the fp control word is set
...
to 64-bit precision, not 80 bits.
llvm-svn: 18915
2004-12-13 21:52:52 +00:00
951e94e867
Add some notes
...
llvm-svn: 18911
2004-12-13 20:13:10 +00:00
c97cac3d32
Set the rounding mode for the X86 FPU to 64-bits instead of 80-bits. We
...
don't support long double anyway, and this gives us FP results closer to
other targets.
This also speeds up 179.art from 41.4s to 18.32s, by eliminating a problem
with extra precision that causes an FP == comparison to fail (leading to
extra loop iterations).
llvm-svn: 18895
2004-12-13 17:23:11 +00:00
cf2c1866cb
Add V8 SPEC status.
...
llvm-svn: 18844
2004-12-13 00:27:35 +00:00
cbd47631ea
Fix Regression/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll, and all programs
...
when compiled with debug information.
llvm-svn: 18835
2004-12-12 20:36:19 +00:00
10b637eade
CSE calls to getTypeSize.
...
llvm-svn: 18833
2004-12-12 20:31:00 +00:00
17550c456c
Use the target triple to pick this target.
...
llvm-svn: 18830
2004-12-12 17:40:28 +00:00
23b2bc54b0
Complete the list of MultiSource failures.
...
llvm-svn: 18826
2004-12-12 08:22:11 +00:00
ed9346820d
hbd should be working now.
...
llvm-svn: 18824
2004-12-12 07:42:59 +00:00
27358a44d1
Finally enable the setcc-branch folding code.
...
Also, fix a bug where ubyte 255 would sometimes be output as -1. This
was afflicting hbd.
llvm-svn: 18823
2004-12-12 07:42:58 +00:00
e5351ad5f0
Add (currently disabled) code for canFoldSetCC
...
llvm-svn: 18820
2004-12-12 06:22:30 +00:00
aa40b7d080
Add stubs for setcc-branch folding support.
...
llvm-svn: 18818
2004-12-12 06:01:26 +00:00
25ac83565e
Print llvm code one function at a time.
...
llvm-svn: 18805
2004-12-11 22:17:07 +00:00
72daaa46eb
JIT should print LLVM each function before selecting instructions for it.
...
llvm-svn: 18803
2004-12-11 18:41:09 +00:00
b3095dd88f
Bools are *also* not ints. Sigh. Furthermore, most of the TargetMachine
...
ctor parameters can be defaulted.
Print the transformed llvm code input to the instruction selector
when -print-machineinstrs is on, just like V9.
llvm-svn: 18794
2004-12-11 05:19:04 +00:00
ba5e9f107c
Look for many more moves to fold (previously, we only
...
*or g0, x add g0, x recognized * as a move)
or x, g0 add x, g0
or 0, x add 0, x
or x, 0 add x, 0
llvm-svn: 18793
2004-12-11 05:19:03 +00:00
52a9ed63b5
Make GEPs not suck so much:
...
* Don't emit the Index * ElementSize multiply if Index is a constant.
* Use a shift, not a multiply, if ElementSize is 1/2/4/8.
* If ElementSize fits in the immediate field of SMUL, then put it there.
Fix a bug where struct offsets might be truncated (ConstantSInt::get is
now used instead of ConstantInt::get).
llvm-svn: 18792
2004-12-11 05:19:02 +00:00
cba3135ba8
Update lists of failing benchmarks, including info on which
...
ones are failing in cbe.
llvm-svn: 18791
2004-12-11 05:19:01 +00:00
2e2f3e26ba
Move -lowerselect later in the chain; some select instructions were
...
slipping through into the instruction selector, which can't deal with
them yet.
llvm-svn: 18758
2004-12-10 08:39:30 +00:00
2ccff7c256
Add the rest of the multiply instructions.
...
llvm-svn: 18757
2004-12-10 08:39:29 +00:00
Duraid Madina