Commit Graph

170521 Commits

Author SHA1 Message Date
Craig Topper 0aca35df77 [X86] Add additional CPUs and features to Host.cpp and X86TargetParser.def to match compiler-rt and enable __builtin_cpu_supports/__builtin_cpu_is support in clang
Summary: This matches LLVM to D53461 for compiler-rt.

Reviewers: echristo, erichkeane

Reviewed By: echristo

Subscribers: dberris, llvm-commits

Differential Revision: https://reviews.llvm.org/D53462

llvm-svn: 344831
2018-10-20 03:51:43 +00:00
Thomas Lively 5ea17d450e [WebAssembly] Implement vector sext_inreg and tests with comparisons
Summary: Depends on D53251.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53252

llvm-svn: 344826
2018-10-20 01:35:23 +00:00
Thomas Lively 55735d522d [WebAssembly] Custom lower i64x2 constant shifts to avoid wrap
Summary: Depends on D53057.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53251

llvm-svn: 344825
2018-10-20 01:31:18 +00:00
Roman Tereshin 8d6ff4c0af [MachineCSE][GlobalISel] Making sure MachineCSE works mid-GlobalISel (again)
Change of approach, it looks like it's a much better idea to deal with
the vregs that have LLTs and reg classes both properly, than trying to
avoid creating those across all GlobalISel passes and all targets.

The change mostly touches MachineRegisterInfo::constrainRegClass,
which is apparently only used by MachineCSE. The changes are NFC for
any pipeline but one that contains MachineCSE mid-GlobalISel.

NOTE on isCallerPreservedOrConstPhysReg change in MachineCSE:

    There is no test covering it as the only way to insert a new pass
(MachineCSE) from a command line I know of is llc's -run-pass option,
which only works with MIR, but MIRParser freezes reserved registers upon
MachineFunctions creation, making it impossible to reproduce the state
that exposes the issue.

Reviwed By: aditya_nandakumar

Differential Revision: https://reviews.llvm.org/D53144

llvm-svn: 344822
2018-10-20 00:06:15 +00:00
Petar Jovanovic 8d947bad09 [llvm-objdump] Fix --file-headers (-f) option
Changed the format call to match the surrounding code. Previously it was
printing an unsigned int while the return type being printed was
long unsigned int or wider. This caused problems for big-endian systems
which were discovered on mips64.
Also, the printed address had less characters than it should because the
character count was directly obtained from the number of bytes in the
address.
The tests were adapted to fit this fix and now use longer addresses.

Patch by Milos Stojanovic.

Differential Revision: https://reviews.llvm.org/D53403

llvm-svn: 344818
2018-10-19 22:16:49 +00:00
Thomas Lively 8a91cf1cc5 [LoopVectorize] Loop vectorization for minimum and maximum
Summary: Depends on D52766.

Reviewers: aheejin, dschuff

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52767

llvm-svn: 344816
2018-10-19 21:11:43 +00:00
Changpeng Fang f95f763ea5 AMDGPU: Add support pattern for SUB of one bit
Summary:
  Add selection patterns to support one bit Sub.

Reviewers:
  rampitec, arsenm

Differential Revision:
  https://reviews.llvm.org/D52946

llvm-svn: 344815
2018-10-19 21:09:21 +00:00
Evandro Menezes 164ea101ab [NFC][InstCombine] Undo stray change
Undo stray change introduced by r344725.

llvm-svn: 344814
2018-10-19 20:57:45 +00:00
Craig Topper 5ed1099962 [X86] Remove some left over code from when MVT:i1 was a legal type for AVX512.
llvm-svn: 344813
2018-10-19 20:44:33 +00:00
Matt Arsenault 6dbdbf4055 Fix typos in assert message
llvm-svn: 344812
2018-10-19 20:17:05 +00:00
Aditya Nandakumar cd04e366d7 [GISel]: Allow PHIs to be DCEd
https://reviews.llvm.org/D53304

Currently dead phis are not cleaned up during DCE. This patch allows
dead PHI and G_PHI insts to be deleted.

Reviewed by: dsanders

llvm-svn: 344811
2018-10-19 20:11:52 +00:00
Craig Topper 5c81c68385 [X86] In PostprocessISelDAG, start from allnodes_end, not the root.
There is no guarantee the root is at the end if isel created any nodes without morphing them. This includes the nodes created by manual isel from C++ code in X86ISelDAGToDAG.

This is similar to r333415 from PowerPC which is where I originally stole the peephole loop from.

I don't have a test case, but without this a future patch doesn't work which is how I found it.

llvm-svn: 344808
2018-10-19 19:24:42 +00:00
Wolfgang Pieb 6214c11cb7 [DWARF] Make llvm-dwarfdump display location lists in a .dwp file correctly. Fixes PR38990.
Considers the index when extracting location lists from a .dwp file.
Majority of the patch by David Blaikie.

Reviewers: dblaikie

Differential revision: https://reviews.llvm.org/D53155

llvm-svn: 344807
2018-10-19 19:23:16 +00:00
Thomas Lively 11a332d08d [WebAssembly] Handle undefined lane indices in SIMD patterns
Summary:
Undefined indices in shuffles can be used when not all lanes of the
output vector will be used. This happens for example in the expansion
of vector reduce operations. Regardless, undefs are legal as lane
indices in IR and should be supported.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53057

llvm-svn: 344803
2018-10-19 19:08:06 +00:00
Krzysztof Pszeniczny 2bfe759a8d Fix a use-after-RAUW bug in large GEP splitting
Summary:
Large GEP splitting, introduced in rL332015, uses a `DenseMap<AssertingVH<Value>, ...>`. This causes an assertion to fail (in debug builds) or undefined behaviour to occur (in release builds) when a value is RAUWed.

This manifested itself in the 7zip benchmark from the llvm test suite built on ARM with `-fstrict-vtable-pointers` enabled while RAUWing invariant group launders and splits in CodeGenPrepare.

This patch merges the large offsets of the argument and the result of an invariant.group strip/launder intrinsic before RAUWing.

Reviewers: Prazek, javed.absar, haicheng, efriedma

Reviewed By: Prazek, efriedma

Subscribers: kristof.beyls, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D51936

llvm-svn: 344802
2018-10-19 19:02:16 +00:00
Thomas Lively c339250e12 [InstCombine] InstCombine and InstSimplify for minimum and maximum
Summary: Depends on D52765

Reviewers: aheejin, dschuff

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52766

llvm-svn: 344799
2018-10-19 19:01:26 +00:00
Andrea Di Biagio d294b92dba [llvm-mca] Remove a stale TODO comment. NFC
Starting from revision r344334, we can now describe optimizable
register-register moves in the machine scheduling models.

llvm-svn: 344797
2018-10-19 18:39:29 +00:00
Thomas Lively fa54e56d84 [ConstantFolding] Constant fold minimum and maximum intrinsics
Summary: Depends on D52764

Reviewers: aheejin, dschuff

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52765

llvm-svn: 344796
2018-10-19 18:15:32 +00:00
Jonas Devlieghere 344cac5efd [dwarfdump] Hide ranges in diff-mode.
llvm-dwarfdump --diff should not print DW_AT_ranges. This patch fixes
that.

Differential revision: https://reviews.llvm.org/D53353

llvm-svn: 344794
2018-10-19 17:57:53 +00:00
Sanjay Patel 70daf85bc2 [InstCombine] use m_Neg() in dyn_castNegVal() to match vectors with undef elts
llvm-svn: 344793
2018-10-19 17:54:53 +00:00
Krzysztof Parzyszek 6bfc6577f2 [Hexagon] Remove support for V4
llvm-svn: 344791
2018-10-19 17:31:11 +00:00
Sanjay Patel ce3f1915f3 [InstCombine] move/add tests for sub/neg; NFC
These should all be handled using "dyn_castNegVal",
but that misses vectors with undef elements.

llvm-svn: 344790
2018-10-19 17:26:22 +00:00
Clement Courbet 8d0dd0ba0e [llvm-exegesis] Mark second-form X87 instructions as unsupported.
Summary:
We only support the first form because we rely on information that is
only available there.

Reviewers: gchatelet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D53430

llvm-svn: 344782
2018-10-19 12:24:49 +00:00
Kristina Brooks 1a41a116ec [MC][DWARF][AsmParser] Ensure nested CFI frames are diagnosed.
This avoids a crash (with asserts) or bad codegen (without asserts)
in Dwarf streamer later on. This patch fixes this condition in 
MCStreamer and propogates SMLoc down when it's available with an
added bonus of source locations for those specific types of errors.

Further patches could use similar improvements as currently most
non-Windows CFI directives lack an SMLoc parameter.

Modified an existing test to verify source location propogation and
added an object-file version of it to verify that it does not crash in
addition to a standalone test to only ensure it does not crash.

Differential Revision: https://reviews.llvm.org/D51695

llvm-svn: 344781
2018-10-19 12:14:30 +00:00
Clement Courbet 22bad0497e [llvm-exegesis] Re-enable liveliness tracker.
Reviewers: gchatelet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D53429

llvm-svn: 344780
2018-10-19 12:08:05 +00:00
Clement Courbet c51f45239d [llvm-exegesis] X87 RFP setup code.
Summary:
This was lost during refactoring in rL342644.

Fix and simplify simplify value size handling: always go through a 80 bit value,
because the value can be 1 byte). Add unit tests.

Reviewers: gchatelet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D53423

llvm-svn: 344779
2018-10-19 09:56:54 +00:00
Fangrui Song d243ac6c4b [pipeliner] Fix test added in rL344748 to require asserts
llvm-svn: 344775
2018-10-19 06:20:01 +00:00
Fangrui Song 2e83b2e9ee Use llvm::{all,any,none}_of instead std::{all,any,none}_of. NFC
llvm-svn: 344774
2018-10-19 06:12:02 +00:00
Hsiangkai Wang 392e006129 [CodeGen] Fix for PR39094.
When using MachineInstr to get SlotIndex, the MI could not be a debug
instruction. mi2iMap does not contain debug instructions in it.

After enabling DBG_LABEL in the generated code, the first instruction in
the bundle may be a debug instruction. In this patch, I use the first
non-debug instruction in the bundle to query SlotIndex in mi2iMap.

Bugzilla report: https://bugs.llvm.org/show_bug.cgi?id=39094

Differential revision: https://reviews.llvm.org/D52927

llvm-svn: 344770
2018-10-19 01:52:54 +00:00
Chandler Carruth 509e20e029 [TI removal] Remove `TerminatorInst` from the IR type system!
llvm-svn: 344769
2018-10-19 00:22:37 +00:00
Chandler Carruth 608e6faa06 [TI removal] Switch some newly added code over to use `Instruction`
directly.

llvm-svn: 344768
2018-10-19 00:22:10 +00:00
Chandler Carruth 7c80c3a8e4 [TI removal] Update the C API for the move away from `TerminatorInst`.
This updates the C API for the removal of `TerminatorInst`. It converts
the type query to a predicate query and moves the generic methods to
work on `Instruction` instances that satisfy this predicate rather than
requiring a specific type. It also clarifies that the C API wrapping
`BasicBlock::getTerminator` just returns an `Instruction`. Because this
was always wrapped opaquely as a value and the functions consuming these
values will work on `Instruction` objects, this shouldn't break any
clients.

This is a completely compatible change to the C API.

Differential Revision: https://reviews.llvm.org/D52968

llvm-svn: 344764
2018-10-18 23:03:55 +00:00
Lang Hames 96079a368a [ORC] Add a createJITDylib method to LLJIT.
Because I'm about to get on stage at the dev meeting and claim that it exists.

This method creates a JITDylib instance with the given name and returns a
reference to it.

llvm-svn: 344763
2018-10-18 22:42:32 +00:00
Sylvestre Ledru a9b271b320 Support of hurd in llvm-shlib
Svante Signell

llvm-svn: 344756
2018-10-18 20:07:44 +00:00
Mircea Trofin 87b6725c0e Make Function::getInstructionCount const
Summary: Function::getInstructionCount can be const.

Reviewers: davidxl, paquette

Reviewed By: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D53378

llvm-svn: 344754
2018-10-18 19:49:44 +00:00
Eli Friedman b09c778715 Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")
Still causing failures on the polly-aosp buildbot; I'll follow up
with a reduced testcase.

llvm-svn: 344752
2018-10-18 19:34:30 +00:00
Sumanth Gundapaneni 62ac69d45c [Pipeliner] copyToPhi DAG Mutation to improve scheduling.
In a loop, create artificial dependences between the source of a
COPY/REG_SEQUENCE to the use in next iteration.

Eg:
SRC ----Data Dep--> COPY
COPY ---Anti Dep--> PHI (implies, to be used in next iteration)
PHI ----Data Dep--> USE

This patches creates
USE ----Artificial Dep---> SRC

This will effectively schedule the COPY late to eliminate additional copies.
Before this patch, the schedule can be
SRC, COPY, USE : The COPY is used in next iteration and it needs to be
preserved.

After this patch, the schedule can be
USE, SRC, COPY : The COPY is used in next iteration and the live interval is
reduced.

Differential Revision: https://reviews.llvm.org/D53303

llvm-svn: 344748
2018-10-18 15:51:16 +00:00
Ayal Zaks b0b5312e67 [LV] Fold tail by masking to vectorize loops of arbitrary trip count under opt for size
When optimizing for size, a loop is vectorized only if the resulting vector loop
completely replaces the original scalar loop. This holds if no runtime guards
are needed, if the original trip-count TC does not overflow, and if TC is a
known constant that is a multiple of the VF. The last two TC-related conditions
can be overcome by
1. rounding the trip-count of the vector loop up from TC to a multiple of VF;
2. masking the vector body under a newly introduced "if (i <= TC-1)" condition.

The patch allows loops with arbitrary trip counts to be vectorized under -Os,
subject to the existing cost model considerations. It also applies to loops with
small trip counts (under -O2) which are currently handled as if under -Os.

The patch does not handle loops with reductions, live-outs, or w/o a primary
induction variable, and disallows interleave groups.

(Third, final and main part of -)
Differential Revision: https://reviews.llvm.org/D50480

llvm-svn: 344743
2018-10-18 15:03:15 +00:00
Nicolai Haehnle 7052cb35a1 DivergenceAnalysisTest: fix use of uninitialized memory
Thanks to Simon Moll for chasing it down.

Change-Id: If188f07c4aaec217f40a7a2ca029818f9202f1cb
llvm-svn: 344738
2018-10-18 12:54:39 +00:00
Nicolai Haehnle 59041687be [DA] DivergenceAnalysis for unstructured, reducible CFGs
Summary:
This is patch 2 of the new DivergenceAnalysis (https://reviews.llvm.org/D50433).

This patch contains a generic divergence analysis implementation for
unstructured, reducible Control-Flow Graphs. It contains two new classes.
The `SyncDependenceAnalysis` class lazily computes sync dependences, which
relate divergent branches to points of joining divergent control. The
`DivergenceAnalysis` class contains the generic divergence analysis
implementation.

Reviewers: nhaehnle

Reviewed By: nhaehnle

Subscribers: sameerds, kristina, nhaehnle, xbolva00, tschuett, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D51491

llvm-svn: 344734
2018-10-18 09:38:44 +00:00
Sam McCall 5ee0188f2b [Support] json::Value construction from std::vector<T> and std::map<string,T>.
Summary: Previously this required a conversion to json::Array/json::Object first.

Reviewers: ioeric

Subscribers: kristina, llvm-commits

Differential Revision: https://reviews.llvm.org/D53385

llvm-svn: 344732
2018-10-18 08:47:24 +00:00
Guillaume Chatelet 6a208e8c5f [llvm-exegesis] Fix off by one error
llvm-svn: 344731
2018-10-18 08:20:50 +00:00
Chandler Carruth 7d832f3650 [TI removal] Remove discussion of `TerminatorInst` from the LLVM
documentation.

llvm-svn: 344727
2018-10-18 07:40:24 +00:00
Chandler Carruth 11add31341 [TI removal] Remove TerminatorInst references from bindings.
For the Go bindings, this just removes the no longer useful "isa"-style
wrapper. If there is a user that is interested, they can add a wrapper
for `Instruction::isTerminator`.

For the OCaml bindings, this is just a documentation update.

llvm-svn: 344726
2018-10-18 07:40:03 +00:00
Mikael Holmen e3605d0f70 Add a emitUnaryFloatFnCall version that fetches the function name from TLI
Summary:
In several places in the code we use the following pattern:

  if (hasUnaryFloatFn(&TLI, Ty, LibFunc_tan, LibFunc_tanf, LibFunc_tanl)) {
    [...]
    Value *Res = emitUnaryFloatFnCall(X, TLI.getName(LibFunc_tan), B, Attrs);
    [...]
  }

In short, we check if there is a lib-function for a certain type, and then
we _always_ fetch the name of the "double" version of the lib function and
construct a call to the appropriate function, that we just checked exists,
using that "double" name as a basis.

This is of course a problem in cases where the target doesn't support the
"double" version, but e.g. only the "float" version.

In that case TLI.getName(LibFunc_tan) returns "", and
emitUnaryFloatFnCall happily appends an "f" to "", and we erroneously end
up with a call to a function called "f".

To solve this, the above pattern is changed to

  if (hasUnaryFloatFn(&TLI, Ty, LibFunc_tan, LibFunc_tanf, LibFunc_tanl)) {
    [...]
    Value *Res = emitUnaryFloatFnCall(X, &TLI, LibFunc_tan, LibFunc_tanf,
                                      LibFunc_tanl, B, Attrs);
    [...]
  }

I.e instead of first fetching the name of the "double" version and then
letting emitUnaryFloatFnCall() add the final "f" or "l", we let
emitUnaryFloatFnCall() fetch the right name from TLI.

Reviewers: eli.friedman, efriedma

Reviewed By: efriedma

Subscribers: efriedma, bjope, llvm-commits

Differential Revision: https://reviews.llvm.org/D53370

llvm-svn: 344725
2018-10-18 06:27:53 +00:00
Kristina Brooks 312fcc116b [X86] Support for the mno-tls-direct-seg-refs flag
Allows to disable direct TLS segment access (%fs or %gs). GCC supports
a similar flag, it can be useful in some circumstances, e.g. when a thread
context block needs to be updated directly from user space. More info
and specific use cases: https://bugs.llvm.org/show_bug.cgi?id=16145

There is another revision for clang as well.
Related: D53102

All X86 CodeGen tests appear to pass:
```
[46/47] Running lit suite /SourceCache/llvm-trunk-8.0/test/CodeGen
Testing Time: 23.17s
  Expected Passes    : 3801
  Expected Failures  : 15
  Unsupported Tests  : 8021
```

Reviewed by: Craig Topper.

Patch by nruslan (Ruslan Nikolaev).

Differential Revision: https://reviews.llvm.org/D53103

llvm-svn: 344723
2018-10-18 03:14:37 +00:00
Krasimir Georgiev 11bc3a18e2 [llvm-exegesis] Mark destructor virtual after r344695
This was causing a -Wnon-virtual-dtor warning.

llvm-svn: 344721
2018-10-18 02:06:16 +00:00
Lang Hames 33a2f5e8dd [BuildingAJIT] Update the Ch1 KaleidoscopeJIT class to expose errors to clients.
Returning the error to clients provides an opportunity to introduce readers to
the Expected and Error APIs and makes the tutorial more useful as a starting
point for a real JIT class, while only slightly complicating the code.

llvm-svn: 344720
2018-10-18 00:51:38 +00:00
Chandler Carruth 60b2e054dc [TI removal] Switch simple loop unswitch to `Instruction`.
llvm-svn: 344719
2018-10-18 00:40:26 +00:00
Chandler Carruth c6cad4251e [TI removal] Switch NewGVN to directly use `Instruction`.
llvm-svn: 344718
2018-10-18 00:39:46 +00:00