51fa0a87c3
Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT.
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FileCheck actually doesn't support combo suffixes.
Differential Revision: http://reviews.llvm.org/D17588
llvm-svn: 262054
2016-02-26 19:40:34 +00:00
cd2be7f084
[AArch64] Add support for Qualcomm Kryo CPU.
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Machine model description by Dave Estes <cestes@codeaurora.org>.
llvm-svn: 260686
2016-02-12 15:51:51 +00:00
a7385ebf78
[AArch64] Add support for Samsung Exynos-M1
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Adds core tuning support for new Samsung Exynos-M1 core (ARMv8-A).
Differential Revision: http://reviews.llvm.org/D15663
llvm-svn: 256828
2016-01-05 12:51:59 +00:00
8b5dc2c94e
[AArch64]: Add support for Cortex-A35
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Adds support for the new Cortex-A35 ARMv8-A core.
llvm-svn: 254503
2015-12-02 11:53:44 +00:00
6088504499
Adding support to LLVM for targeting Cortex-A72
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Currently, Cortex-A72 is modelled as an Cortex-A57 except the fp
load balancing pass isn't enabled for Cortex-A72 as it's not
profitable to have it enabled for this core.
Patch by Ranjeet Singh.
llvm-svn: 228140
2015-02-04 13:31:29 +00:00
cd296378a7
Implement AArch64 TTI interface isAsCheapAsAMove.
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llvm-svn: 214159
2014-07-29 02:09:26 +00:00
Paul Robinson