Commit Graph

404348 Commits

Author SHA1 Message Date
Kristóf Umann 8cc2de667e [analyzer][docs] Fix the incorrect structure of the checker docs
The alpha.security.cert section came right after alpha.security, making it look
like checkers like alpha.security.MmapWriteExec belonged to that package.

Differential Revision: https://reviews.llvm.org/D113397
2021-11-09 15:26:00 +01:00
Valentin Clement 9d9019c77c
Revert "[fir] Add fir.convert op conversion from FIR to LLVM IR"
This reverts commit 165879ec31.

Windows buildbot failure
2021-11-09 15:03:51 +01:00
Valentin Clement 165879ec31
[fir] Add fir.convert op conversion from FIR to LLVM IR
Add conversion pattern for the `fir.convert` operation.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: rovka, awarzynski

Differential Revision: https://reviews.llvm.org/D113469

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2021-11-09 14:55:24 +01:00
Sanjay Patel c36b7e21bd [InstCombine] enhance vector bitwise select matching
(Cond & C) | (~bitcast(Cond) & D) --> bitcast (select Cond, (bc C), (bc D))

This is part of fixing:
https://llvm.org/PR34047

That report shows a case where a bitcast is sitting between the select condition
candidate and its 'not' value due to current cast canonicalization rules.

There's a bitcast type restriction that might be violated in existing matching,
but I still need to investigate if that is possible -
Alive2 shows we can only do this transform safely when the bitcast is from
narrow to wide vector elements (otherwise poison could leak into elements
that were safe in the original code):
https://alive2.llvm.org/ce/z/Hf66qh

Differential Revision: https://reviews.llvm.org/D113035
2021-11-09 08:54:59 -05:00
Chris Jackson 9c63adfb8b [DebugInfo][LSR] Add test for use of IV with a SCEV containing undef
Added a lit test that checks scev-based salvagaing does not select IVs
that have a SCEV containing an undef.

Original Differential Revision: https://reviews.llvm.org/D111810
2021-11-09 13:36:34 +00:00
Denys Shabalin 48d1f099d4 [mlir] Add nano precision clock to execution engine
Reviewed By: ftynse, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D113476
2021-11-09 14:32:36 +01:00
Valentin Clement fcb5a2b7d9
[fir] Force target for FIR to LLVM IR conversion 2021-11-09 14:26:40 +01:00
Valentin Clement 7b5132dae8
[fir] Add complex operations conversion from FIR LLVM IR
This patch add conversion for primitive operations on complex types.
- fir.addc
- fir.subc
- fir.mulc
- fir.divc
- fir.negc

This adds also the type conversion for !fir.complex<KIND> type.

This patch is part of the upstreaming effort from fir-dev branch.

This patch was updated to avoid failure on windows buildbot.
Flang codegen does not support windows target so we force the test
to use a known target instead.

Reviewed By: kiranchandramohan, rovka

Differential Revision: https://reviews.llvm.org/D113434

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2021-11-09 14:17:34 +01:00
Chris Jackson 116dc70cf3 [DebugInfo][LSR] Add more stringent checks on IV selection and salvage
attempts

Prevent the selection of IVs that have a SCEV containing an undef. Also
prevent salvaging attempts for values for which a SCEV could not be
created by ScalarEvolution and have only SCEVUknown.

Reviewed by: Orlando

Differential Revision: https://reviews.llvm.org/D111810
2021-11-09 13:09:37 +00:00
Florian Hahn 2ead34716a
[SimplifyCFG] Add early bailout if Use is not in same BB.
Without this patch, passingValueIsAlwaysUndefined will iterate over all
instructions from I to the end of the basic block, even if the use is
outside the block.

This patch adds an early bail out, if the use instruction is outside I's
BB. This can greatly reduce compile-time in cases where very large basic
blocks are involved, with a large number of PHI nodes and incoming
values.

Note that the refactoring makes the handling of the case where I is a
phi and Use is in PHI more explicit  as well: for phi nodes, we can also
directly bail out. In the existing code, we would iterate until we reach
the end and return false.

Based on an earlier patch by Matt Wala.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D113293
2021-11-09 12:57:03 +00:00
David Pagan b0de656bdf Initial parsing/sema for 'align' clause
Added basic parsing/sema/serialization support for 'align' clause for use with
'allocate' directive.
2021-11-09 07:34:18 -05:00
Andrew Savonichev b702276ad0 [AArch64] Add Machine InstCombiner patterns for FMUL indexed variant
This patch adds DUP+FMUL => FMUL_indexed pattern to InstCombiner.
FMUL_indexed is normally selected during instruction selection, but it
does not work in cases when VDUP and VMUL are in different basic
blocks.

Differential Revision: https://reviews.llvm.org/D99662
2021-11-09 15:30:19 +03:00
Salman Javed 0076957202 [clang-tidy] Fix lint warning in ClangTidyDiagnosticConsumer.cpp (NFC)
Calling clang-tidy on ClangTidyDiagnosticConsumer.cpp gives a
"unmatched NOLINTBEGIN without a subsequent NOLINTEND" warning.

The "NOLINTBEGIN" and "NOLINTEND" string literals used in the
implementation of `createNolintError()` get mistaken for actual
NOLINTBEGIN/END comments used to suppress clang-tidy warnings.

Rewrite the string literals so that they can no longer be mistaken for
actual suppression comments.

Differential Revision: https://reviews.llvm.org/D113472
2021-11-10 01:09:35 +13:00
Valentin Clement 9b7c584ed8
Revert "[fir] Add complex operations conversion from FIR LLVM IR"
This reverts commit b9bc64ba14.

flang-x86_64-windows is failing with this patch
2021-11-09 13:07:36 +01:00
Daniel Kiss c5c4bac6c0 Reland "[libcxxabi][ARM] Make CXX_end_cleanup compatible with Armv6-M"
On Armv6-M the branch may not able to reach the _Unwind_Resume function because it's relocation(R_ARM_THM_JUMP11) is in -2048, 2047 range only.

Reviewed By: chill, stuij, lenary

Differential Revision: https://reviews.llvm.org/D113181
2021-11-09 12:53:53 +01:00
Simon Pilgrim 58c01ef270 [SelectionDAG] Merge FoldConstantVectorArithmetic into FoldConstantArithmetic (PR36544)
This patch merges FoldConstantVectorArithmetic back into FoldConstantArithmetic.

Like FoldConstantVectorArithmetic we now handle vector ops with any operand count, but we currently still only handle binops for scalar types - this can be improved in future patches - in particular some common unary/trinary ops still have poor constant folding.

There's one change in functionality causing test changes - FoldConstantVectorArithmetic bails early if the build/splat vector isn't all constant (with some undefs) elements, but FoldConstantArithmetic doesn't - it instead attempts to fold the scalar nodes and bails if they fail to regenerate a constant/undef result, allowing some additional identity/undef patterns to be handled.

Differential Revision: https://reviews.llvm.org/D113300
2021-11-09 11:31:01 +00:00
Roman Lebedev 3bdf738d1b
[NFC][X86][Costmodel] Add i16 replication shuffle costmodel test coverage 2021-11-09 14:19:44 +03:00
Alexey Lapshin c8ae08987d [llvm-dwarfdump] dump link to the immediate parent.
It is often useful to know which die is the parent of the current die.
This patch adds information about parent offset into the dump:

0x0000000b: DW_TAG_compile_unit
              DW_AT_producer    ("by_hand")

0x00000014:   DW_TAG_base_type (0x0000000b)  <<<<<<<<<<<<<<
                DW_AT_name      ("int")

Now it is easy to see which die is the parent of the current die.
This patch makes that behaviour to be default.
We can make it to be opt-in if neccessary.

This functionality differs from already existed "--show-parents"
in that sence that parent information is shown for all dies and
only link to the immediate parent is shown.

Differential Revision: https://reviews.llvm.org/D113406
2021-11-09 14:14:06 +03:00
Max Kazantsev cb728cb8a9 [NFC] Get rid of hardcoded magical constant and use Optionals instead
Refactor calculateIterationsToInvariance so that it doesn't need a magical
constant to signify unknown answer.
2021-11-09 18:13:19 +07:00
Roman Lebedev d484cc152b
[TTI] Adjust `getReplicationShuffleCost()` interface
It is trivial to produce DemandedSrcElts given DemandedReplicatedElts,
so don't pass the former. Also, it isn't really useful so far
to have the overload taking the Mask, so just inline it.
2021-11-09 14:07:59 +03:00
Simon Pilgrim 32a4a883f6 Revert rGe1eec7601b6988b35ae3cdc8d67cf3cf4e1361dd "[XCOFF][yaml2obj] support for the auxiliary file header."
This is failing on MSVC builds: https://lab.llvm.org/buildbot/#/builders/86/builds/23436
2021-11-09 11:02:13 +00:00
Dmitry Makogon 5ec2386332 Reapply db28934 "[IndVars] Pass TTI to replaceCongruentIVs"
This reapplies patch db289340c8.

The test failures on build with expensive checks caused by the patch happened due
to the fact that we sorted loop Phis in replaceCongruentIVs using llvm::sort,
which shuffles the given container if the expensive checks are enabled,
so equivalent Phis in the sorted vector had different mutual order from run
to run. replaceCongruentIVs tries to replace narrow Phis with truncations
of wide ones. In some test cases there were several Phis with the same
width, so if their order differs from run to run, the narrow Phis would
be replaced with a different Phi, depending on the shuffling result.

The patch ae14fae0ff fixed this issue by
replacing llvm::sort with llvm::stable_sort.
2021-11-09 17:42:29 +07:00
Florian Hahn acbefbf19f [VPlan] Guard code to dump instructions after d9361bfbe2.
This should fix build failures when built without assertions enabled,
e.g.
    https://lab.llvm.org/buildbot/#/builders/205/builds/172
2021-11-09 10:29:05 +00:00
Florian Hahn d9361bfbe2 [VPlan] Add initial inner-loop VPlan verification.
This patch adds a function to verify general properties of VPlans. The
first check makes sure that all phi-like recipes are at the beginning of
a block, with no other recipes in between.

Note that this currently may not hold for VPBlendRecipes at the moment,
as other recipes may be inserted before the VPBlendRecipe during mask
creation.

Note that this patch depends on D111300 and D111301, which fix code that
breaks the checked invariant.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D111302
2021-11-09 10:18:28 +00:00
Valentin Clement b9bc64ba14
[fir] Add complex operations conversion from FIR LLVM IR
This patch add conversion for primitive operations on complex types.
- fir.addc
- fir.subc
- fir.mulc
- fir.divc
- fir.negc

This adds also the type conversion for !fir.complex<KIND> type.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: rovka

Differential Revision: https://reviews.llvm.org/D113434

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2021-11-09 11:05:29 +01:00
Djordje Todorovic 2ca1cd7e37 [cmake] By default do not instrument compiler-rt if LLVM_BUILD_INSTRUMENTED_COVERAGE is ON
Applying the same rules as for LLVM_BUILD_INSTRUMENTED build in the cmake files.
By having this patch, we are able to disable/enable instrument+coverage build
of the compiler-rt project when building instrumented LLVM.

Differential Revision: https://reviews.llvm.org/D108127
2021-11-09 10:59:25 +01:00
Esme-Yi e1eec7601b [XCOFF][yaml2obj] support for the auxiliary file header.
Summary:
  This patch adds yaml2obj supporting for the auxiliary
  file header of XCOFF.

Reviewed By: DiggerLin, jhenderson

Differential Revision: https://reviews.llvm.org/D111487
2021-11-09 09:48:40 +00:00
Justas Janickas d85d57e987 Revert "[OpenCL] Allow optional __generic in __remove_address_space utility"
This reverts commit 81081daef0.
2021-11-09 09:42:17 +00:00
Dmitry Makogon ae14fae0ff [SCEVExpander] Use stable_sort to sort loop Phis in SCEVExpander::replaceCongruentIVs
This is a fix for test failures on expensive checks build caused by db289340c8.

With LLVM_ENABLE_EXPENSIVE_CHECKS enabled the llvm::sort shuffles the given container.
However, the sort is only called when the TTI is passed to replaceCongruentIVs.
In the mentioned patch we pass it TTI, so the sort happens. But due to shuffling
equivalent Phis may appear in different order from run to run.
With the stable_sort instead of sort this is impossible - the order of sorted Phis
is preserved.
2021-11-09 16:29:57 +07:00
Diana Picus 65431d3aeb [fir] TargetRewrite: Rewrite COMPLEX values
Rewrite function signatures and calls to functions that accept or return
COMPLEX values.

Also teach insert_value and extract_value about the MLIR ComplexType, by
adding AnyComplex to AnyCompositeLike.

This patch is part of the effort for upstreaming the fir-dev branch.

Differential Revision: https://reviews.llvm.org/D113273

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Kiran Chandramohan <kiran.chandramohan@arm.com>
Co-authored-by: Tim Keith <tkeith@nvidia.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
2021-11-09 09:26:10 +00:00
Jay Foad 5c3c7adf3a [CodeGen] Fix assertion failure in TwoAddressInstructionPass::rescheduleMIBelowKill
This fixes an assertion failure with -early-live-intervals when trying
to update the live intervals for a debug instruction, which don't even
have slot indexes.

Differential Revision: https://reviews.llvm.org/D113116
2021-11-09 09:24:21 +00:00
Shao-Ce SUN 1c81941f19 [NFC][RISCV] Fix wrong predicates of vfwredsum 2021-11-09 17:19:50 +08:00
Groverkss 6706a4720f [MLIR][NFC] FlatAffineConstraints: Refactor division representation computation
This patch factors out division representation computation from upper-lower bound
inequalities to a separate function. This is done to improve readability and reuse.

This patch is marked NFC since the only change is factoring out existing code
to a separate function.

Reviewed By: grosser

Differential Revision: https://reviews.llvm.org/D113463
2021-11-09 14:08:15 +05:30
Kazu Hirata c375cdc932 [Hexagon] Use MachineBasicBlock::{successors,predecessors} (NFC) 2021-11-09 00:26:06 -08:00
Carlos Galvez 7ecec3f0f5 [CUDA] Bump supported CUDA version to 11.5
Differential Revision: https://reviews.llvm.org/D113249
2021-11-09 08:20:53 +00:00
Justas Janickas 81081daef0 [OpenCL] Allow optional __generic in __remove_address_space utility
Clang builtin utility `__remove_address_space` now works if generic
address space is not supported in C++ for OpenCL 2021.

Differential Revision: https://reviews.llvm.org/D110155
2021-11-09 08:13:34 +00:00
Diana Picus 4c263ede54 [flang] Add TargetRewrite pass
This patch adds the basic infrastructure for the TargetRewrite pass,
which rewrites certain FIR dialect operations into target specific
forms. In particular, it converts boxchar function parameters, call
arguments and return values. Other convertions will be included in
future patches.

This patch is part of the effort for upstreaming the fir-dev branch.

Differential Revision: https://reviews.llvm.org/D112910

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Kiran Chandramohan <kiran.chandramohan@arm.com>
Co-authored-by: Tim Keith <tkeith@nvidia.com>
2021-11-09 07:57:31 +00:00
LLVM GN Syncbot eaa8533b33 [gn build] Port ef717f3852 2021-11-09 07:11:34 +00:00
Atmn Patel ef717f3852 Revert "[clang][openmp][NFC] Remove arch-specific CGOpenMPRuntimeGPU files"
This reverts commit 81a7cad2ff.
2021-11-09 02:10:42 -05:00
LLVM GN Syncbot 4edbc2736e [gn build] Port 81a7cad2ff 2021-11-09 06:54:23 +00:00
Atmn Patel 81a7cad2ff [clang][openmp][NFC] Remove arch-specific CGOpenMPRuntimeGPU files
The existing CGOpenMPRuntimeAMDGCN and CGOpenMPRuntimeNVPTX classes are
just code bloat. By removing them, the codebase gets a bit cleaner.

Reviewed By: jdoerfert, JonChesterfield, tianshilei1992

Differential Revision: https://reviews.llvm.org/D113421
2021-11-09 01:52:52 -05:00
Akira Hatanaka 1fe8993ad8 [ObjC][ARC] Replace uses of ObjC intrinsics that are arguments of
operand bundle "clang.arc.attachedcall" with ObjC runtime functions

The existing code only handles the case where the intrinsic being
rewritten is used as the called function pointer of a call/invoke.
2021-11-08 21:19:07 -08:00
Jonas Devlieghere 0f2a7f2955 [debugserver] Put building for arm64e behind a CMake flag 2021-11-08 21:01:43 -08:00
LLVM GN Syncbot 3eda87732f [gn build] Port 6cad45d5c6 2021-11-09 04:15:33 +00:00
Nico Weber f006564f42 [gn build] (manually) port 38be8f4057 (llvm-tli-checker) 2021-11-08 23:15:03 -05:00
Vitaly Buka 63886c21ec [NFC][dfsan] Split Init and ThreadStart 2021-11-08 19:16:55 -08:00
Vitaly Buka a5b06ad39a Partially revert "[NFC][msan] Split ThreadStart and Init"
I don't know if removing "if (!start_routine_)" from ThreadStart
is NFC.

This reverts commit b3267bb3af.
2021-11-08 19:16:55 -08:00
Liqiang Tao 6cad45d5c6 [llvm][Inline] Add a module level inliner
Add module level inliner, which is a minimum viable product at this point.
Also add some tests for it.

RFC: https://lists.llvm.org/pipermail/llvm-dev/2021-August/152297.html

Reviewed By: kazu

Differential Revision: https://reviews.llvm.org/D106448
2021-11-09 11:03:29 +08:00
Vitaly Buka b3267bb3af [NFC][msan] Split ThreadStart and Init 2021-11-08 18:58:33 -08:00
Akira Hatanaka d61eb6c5d9 [ObjC][ARC] Use operand bundle "clang.arc.attachedcall" on x86-64
https://reviews.llvm.org/D92808 made clang use the operand bundle
instead of emitting retainRV/claimRV calls on arm64. This commit makes
changes to clang that are needed to use the operand bundle on x86-64.

Differential Revision: https://reviews.llvm.org/D111331
2021-11-08 18:38:40 -08:00