312b70a970
Add explicit triples to avoid default behavior that varies by host.
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llvm-svn: 41510
2007-08-27 20:54:48 +00:00
8dc0b93151
If the source and destination pointers in an llvm.memmove are known
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to not alias each other, it can be translated as an llvm.memcpy.
llvm-svn: 41489
2007-08-27 16:26:13 +00:00
ff33241e16
call libc memcpy/memset if array size is bigger then threshold.
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Coping 100MB array (after a warmup) shows that glibc 2.6.1 implementation on
x86-64 (core 2) is 30% faster (from 0.270917s to 0.188079s)
llvm-svn: 41479
2007-08-27 10:18:20 +00:00
595401079e
Test dag xform: Fold C ? 0 : 1 to ~C or zext(~C) or trunc(~C)
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llvm-svn: 41164
2007-08-18 06:11:57 +00:00
2c4ea1e411
New test. Make sure dynamic_stackalloc size is rounded up.
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llvm-svn: 41135
2007-08-16 23:52:23 +00:00
1393d88cc6
Update test: dynamic_stackalloc size *must* be rounded to ensure stack ptr be left in a valid state.
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llvm-svn: 41134
2007-08-16 23:51:28 +00:00
4ba05408ac
add byval test
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llvm-svn: 41123
2007-08-16 13:09:02 +00:00
ada7205b76
Convert tests using "grep -c ... | grep ..." to use the count script.
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llvm-svn: 41100
2007-08-15 13:49:33 +00:00
85c1e51b34
Delete extraneous uses of wc -l.
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llvm-svn: 41099
2007-08-15 13:45:35 +00:00
5327cf7b48
Convert another test to use the count script. This one didn't fit the
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regex used to convert all the others because the first '|' was on a
separate line.
llvm-svn: 41098
2007-08-15 13:42:36 +00:00
f9dd170e36
Convert tests using "| wc -l | grep ..." to use the count script.
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llvm-svn: 41097
2007-08-15 13:36:28 +00:00
687dbf1a99
tcl seems to hate |& for some reason.
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llvm-svn: 41073
2007-08-14 16:19:35 +00:00
0e92458068
switch this to use fastcc to avoid fpstack traffic on x86-32. Switch to
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using the count script instead of wc -l
llvm-svn: 41072
2007-08-14 16:14:10 +00:00
5c6d53d2ff
Update test case. A spill should now be deleted.
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llvm-svn: 41070
2007-08-14 09:16:00 +00:00
5e221dbe8f
Spiller reuse test case.
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llvm-svn: 41068
2007-08-14 05:51:03 +00:00
2814fe847d
Now capable of rematerializing coalesced live intervals.
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llvm-svn: 41061
2007-08-13 23:54:16 +00:00
ccb3611881
When x86 addresses matching exceeds its recursion limit, check to
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see if the base register is already occupied before assuming it can be
used. This fixes bogus code generation in the accompanying testcase.
llvm-svn: 41049
2007-08-13 20:03:06 +00:00
4e7f673f65
Fix PR1607
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llvm-svn: 41048
2007-08-13 18:42:37 +00:00
030a59d967
Fix test so it passes.
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llvm-svn: 41012
2007-08-10 22:20:57 +00:00
b372abab14
Increase efficiency of sign_extend_inreg by using subregisters for truncation. As the README suggests sign_extend_subreg is selected to (sext(trunc)).
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llvm-svn: 41010
2007-08-10 21:48:46 +00:00
d36d30b53c
Add 2-addr to 3-addr promotion code that allows 32-bit LEA to be used via subregisters when 16-bit LEA is disabled.
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llvm-svn: 41007
2007-08-10 21:18:25 +00:00
a17799a3bd
Fix EXTRACT_ELEMENT, EXTRACT_SUBVECTOR, and EXTRACT_VECTOR_ELT to
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use an intptr ValueType instead of i32 for the index operand in
getCopyToParts.
llvm-svn: 40987
2007-08-10 14:59:38 +00:00
39d751058a
allow this to pass on ppc hosts.
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llvm-svn: 40846
2007-08-05 18:48:18 +00:00
8932bff7fe
Fix the alignment requirements of several unpck and shuf instructions.
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Generalize isPSHUFDMask and add a unary SHUFPD pattern so that SHUFPD's
memory operand alignment can be tested as well, with a fix to avoid
breaking MMX's use of isPSHUFDMask.
llvm-svn: 40756
2007-08-02 21:17:01 +00:00
fa3eeeedc0
Mark the SSE and MMX load instructions that
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X86InstrInfo::isReallyTriviallyReMaterializable knows how to handle
with the isReMaterializable flag so that it is given a chance to handle
them. Without hoisting constant-pool loads from loops this isn't very
visible, though it does keep CodeGen/X86/constant-pool-remat-0.ll from
making a copy of the constant pool on the stack.
llvm-svn: 40736
2007-08-02 14:27:55 +00:00
824693c87a
Fix test.
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llvm-svn: 40721
2007-08-02 05:04:16 +00:00
41ccce7169
New test. Bogus implicit-def prevented a copy from being coalesced.
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llvm-svn: 40690
2007-08-01 20:26:40 +00:00
9182684222
we're now handling this right :)
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llvm-svn: 40675
2007-08-01 17:10:30 +00:00
09a141df31
Requires SSE2.
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llvm-svn: 40657
2007-08-01 00:10:12 +00:00
54ec4bfa5f
Change the x86 assembly output to use tab characters to separate the
...
mnemonics from their operands instead of single spaces. This makes the
assembly output a little more consistent with various other compilers
(f.e. GCC), and slightly easier to read. Also, update the regression
tests accordingly.
llvm-svn: 40648
2007-07-31 20:11:57 +00:00
12c6be84ff
Redo and generalize previously removed opt for pinsrw: (vextract (v4i32 bc (v4f32 s2v (f32 load ))), 0) -> (i32 load )
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llvm-svn: 40628
2007-07-31 08:04:03 +00:00
4788552deb
Re-apply 40504, but with a fix for the segfault it caused in oggenc:
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Make the alignedload and alignedstore patterns always require 16-byte
alignment. This way when they are used in the "Fs" instructions, in which
a vector instruction is used for a scalar purpose, they can still require
the full vector alignment. And add a regression test for this.
llvm-svn: 40555
2007-07-27 17:16:43 +00:00
931de40afa
Reverting 40504 for now. It's breaking oggenc.
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llvm-svn: 40547
2007-07-27 01:37:47 +00:00
dfa5d283fd
Test case for PR1573.
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llvm-svn: 40539
2007-07-26 17:45:57 +00:00
e9ba8e0765
Fix test.
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llvm-svn: 40536
2007-07-26 17:07:03 +00:00
8455bd3fae
Remove X86ISD::LOAD_PACK and X86ISD::LOAD_UA and associated code from the
...
x86 target, replacing them with the new alignment attributes on memory
references.
llvm-svn: 40504
2007-07-26 00:31:09 +00:00
f906c7286f
Use movaps to load a v4f32 build_vector of all-constant values into a
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register instead of loading each element individually.
llvm-svn: 40478
2007-07-24 22:55:08 +00:00
45863cc202
Update these regression tests to accomodate X86InstrSSE.td now using movups/movaps
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for everything.
llvm-svn: 40101
2007-07-20 16:31:26 +00:00
f195429a0e
New test.
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llvm-svn: 40077
2007-07-20 00:27:56 +00:00
a39fd10e32
New test.
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llvm-svn: 40073
2007-07-19 23:53:50 +00:00
8ab393548f
Try fixing it again.
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llvm-svn: 40072
2007-07-19 23:53:29 +00:00
314e1cb7ee
For PR1553:
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Change the keywords for the zext and sext parameter attributes to be
zeroext and signext so they don't conflict with the keywords for the
instructions of the same name. This gets around the ambiguity.
llvm-svn: 40069
2007-07-19 23:13:04 +00:00
dd96b98bf6
Don't need the "&&" to glue lines together.
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llvm-svn: 40063
2007-07-19 18:06:26 +00:00
e8ea3303ce
Testcase for PR1549
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llvm-svn: 40041
2007-07-19 06:31:11 +00:00
dcc3451f8a
New test.
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llvm-svn: 40020
2007-07-18 21:39:16 +00:00
776962a97a
Implement initial memory alignment awareness for SSE instructions. Vector loads
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and stores that have a specified alignment of less than 16 bytes now use
instructions that support misaligned memory references.
llvm-svn: 40015
2007-07-18 20:23:34 +00:00
a7b65c30a3
It's not necessary to do rounding for alloca operations when the requested
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alignment is equal to the stack alignment.
llvm-svn: 40004
2007-07-18 16:29:46 +00:00
5184c9d787
Fix test.
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llvm-svn: 39976
2007-07-17 18:16:09 +00:00
9ae2eb43d8
Use push / pop for prologues and epilogues.
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llvm-svn: 39967
2007-07-17 07:59:08 +00:00
2182f06f2d
Skeleton of post-RA scheduler; doesn't do anything yet.
...
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.
llvm-svn: 39816
2007-07-13 17:13:54 +00:00
Dan Gohman