Commit Graph

289197 Commits

Author SHA1 Message Date
Serguei Katkov 32754aa37f [SCEV] Add missed Test for rL331949.
llvm-svn: 331950
2018-05-10 01:42:59 +00:00
Serguei Katkov 7d02f059e7 SCEV] Do not use induction in isKnownPredicate for simplification umax.
During simplification umax we trigger isKnownPredicate twice. As a first attempt it
tries the induction. To do that it tries to get post increment of SCEV.
Re-writing the SCEV may result in simplification of umax. If the SCEV contains a lot
of umax operations this recursion becomes very slow.

The added test demonstrates the slow behavior.

To resolve this we use only simple ways to check whether the predicate is known.

Reviewers: sanjoy, mkazantsev
Reviewed By: sanjoy
Subscribers: lebedev.ri, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D46046

llvm-svn: 331949
2018-05-10 01:40:43 +00:00
Craig Topper 553d451e95 [InstCombine] Reorder an if condition to put a cheap check in front of a computeKnownBits call. NFC
llvm-svn: 331948
2018-05-10 00:53:25 +00:00
Craig Topper 333efc951a [InstCombine] Use APInt::getBitsSetFrom to shortern a line and fix an 80 columns violation. NFC
Fix a similar line in the same function.

llvm-svn: 331947
2018-05-10 00:53:22 +00:00
Chris Matthews c3f259cb6c [LIT] Add the missing file
I forgot to commit this file.

llvm-svn: 331946
2018-05-10 00:08:39 +00:00
Chris Matthews bd9ffc6243 Refactor test incase results are backwards
Looks like results can come in either way in this file.  Loosen the ordering constraints.

llvm-svn: 331945
2018-05-10 00:06:17 +00:00
Philip Reames 913a779df2 [Inscombine] fix a signedness warning which broke -Werror builds
llvm-svn: 331944
2018-05-10 00:05:29 +00:00
Craig Topper 2b248849ae [Builtins] Improve the IR emitted for MSVC compatible rotr/rotl builtins to match what the middle and backends understand
Previously we emitted something like

rotl(x, n) {
  n &= bitwidth-1;
  return n != 0 ? ((x << n) | (x >> (bitwidth - n)) : x;
}

We use a select to avoid the undefined behavior on the (bitwidth - n) shift.

The middle and backend don't really recognize this as a rotate and end up emitting a cmov or control flow because of the select.

A better pattern is (x << (n & mask)) | (x << (-n & mask)) where mask is bitwidth - 1.

Fixes the main complaint in PR37387. There's still some work to be done if the user writes that sequence directly on a short or char where type promotion rules can prevent it from being recognized. The builtin is emitting direct IR with unpromoted types so that isn't a problem for it.

Differential Revision: https://reviews.llvm.org/D46656

llvm-svn: 331943
2018-05-10 00:05:13 +00:00
Chris Matthews 069a1eb3bb [LIT] Handle xml characters in test names
Lit creates malformed xml when the test case has an & in the name.

Escape those correctly.

This also adds a test case which I will add other nasty encoding issues to in some followup commits.

llvm-svn: 331942
2018-05-09 23:48:32 +00:00
Artem Belevich 2f348ea1c7 [NVPTX] Added a feature to use short pointers for const/local/shared AS.
Const/local/shared address spaces are all < 4GB and we can always use
32-bit pointers to access them. This has substantial performance impact
on kernels that uses shared memory for intermediary results.

The feature is disabled by default.

Differential Revision: https://reviews.llvm.org/D46147

llvm-svn: 331941
2018-05-09 23:46:19 +00:00
Vitaly Buka c779388c7b [sanitizer] Use all available rounded up capacity
Reviewers: eugenis

Subscribers: kubamracek, llvm-commits

Differential Revision: https://reviews.llvm.org/D46617

llvm-svn: 331940
2018-05-09 23:31:05 +00:00
Sanjay Patel 6f2cf73b37 [PhaseOrdering] remove stale comments; NFC
Forgot to update this with rL331937.

llvm-svn: 331939
2018-05-09 23:10:46 +00:00
Artem Belevich 679dafe69e [CUDA] Added -f[no-]cuda-short-ptr option
The option enables use of 32-bit pointers for accessing
const/local/shared memory. The feature is disabled by default.

Differential Revision: https://reviews.llvm.org/D46148

llvm-svn: 331938
2018-05-09 23:10:09 +00:00
Sanjay Patel ac3951a735 [AggressiveInstCombine] convert a chain of 'and-shift' bits into masked compare
This is a follow-up to D45986. As suggested there, we should match the "all-bits-set" 
pattern in addition to "any-bits-set".

This was a little more complicated than I thought it would be initially because the 
"and 1" instruction can be anywhere in the chain. Hopefully, the code comments make 
that logic understandable, but if you see a way to simplify or improve that, it's 
most appreciated.

This transforms patterns that emerge from bitfield tests as seen in PR37098:
https://bugs.llvm.org/show_bug.cgi?id=37098

I think it would also help reduce the large test from:
D46336
D46595 
but we need something to reassociate that case to the forms we're expecting here first.

Differential Revision: https://reviews.llvm.org/D46649

llvm-svn: 331937
2018-05-09 23:08:15 +00:00
Vitaly Buka ed43f18b55 [lsan] Report unsuspended threads
Summary:
Leak checker needs to suspend all process threads. If we have some running
thread in registry but not suspended we can have false leak report. So we will
report this case here for future debugging.

Reviewers: eugenis

Subscribers: kubamracek, llvm-commits

Differential Revision: https://reviews.llvm.org/D46663

llvm-svn: 331936
2018-05-09 23:02:14 +00:00
Philip Reames 79e917d117 [InstCombine] Widen guards with conditions between
The previous handling for guard widening in InstCombine was extremely restrictive. In particular, it didn't handle the common case where we had two guards separated by a single icmp. Handle this by scanning through a small fixed window of instructions to find the next guard if needed.

Differential Revision: https://reviews.llvm.org/D46203

llvm-svn: 331935
2018-05-09 22:56:32 +00:00
Julie Hockett b11f8b3cbc Revert "[clang-tidy] Adding RestrictSystemIncludes check to Fuchsia module"
This reverts commit r331930, which was landed by accident.

llvm-svn: 331934
2018-05-09 22:28:18 +00:00
Benjamin Kramer 0d2fc1a501 [InstCombine] Teach SimplifyDemandedBits that udiv doesn't demand low dividend bits that are zero in the divisor
This is safe as long as the udiv is not exact. The pattern is not common in
C++ code, but comes up all the time in code generated by XLA's GPU backend.

Differential Revision: https://reviews.llvm.org/D46647

llvm-svn: 331933
2018-05-09 22:27:34 +00:00
Julie Hockett b524d5e553 Revert "[clang] Adding CharacteristicKind to PPCallbacks::InclusionDirective"
This reverts commit r331904 because of a memory leak.

llvm-svn: 331932
2018-05-09 22:25:47 +00:00
Julie Hockett 4a43843532 Revert "[tools] Updating PPCallbacks::InclusionDirective calls"
This reverts commit r331905, since it's dependent on reverted r331905.

llvm-svn: 331931
2018-05-09 22:25:43 +00:00
Julie Hockett 06af01bbc2 [clang-tidy] Adding RestrictSystemIncludes check to Fuchsia module
Adding a check to restrict system includes to a whitelist. Given a list
of includes that are explicitly allowed, the check issues a fixit to
remove any system include not on that list from the source file.

Differential Revision: https://reviews.llvm.org/D43778

llvm-svn: 331930
2018-05-09 22:25:42 +00:00
Amaury Sechet 4f729f6a67 [ARM] Add support for SETCCCARRY instead of SETCCE
Summary: As per title. SETCCE is deprecated and will eventually be removed.

Reviewers: rogfer01, efriedma, rengolin, javed.absar

Subscribers: kristof.beyls, chrib, llvm-commits

Differential Revision: https://reviews.llvm.org/D46512

llvm-svn: 331929
2018-05-09 22:15:51 +00:00
Manoj Gupta d0c801f49e Update pragma-attribute-supported-attributes-list.test.
Update the test to include the new attribute NoStackProtector
to fix the build fails.

llvm-svn: 331928
2018-05-09 22:05:53 +00:00
Vitaly Buka cf50425b77 [sanitizer] Fix argument type and remove unneeded vector resize
llvm-svn: 331927
2018-05-09 22:03:52 +00:00
Roman Tereshin 6d26638c90 [GlobalISel][Legalizer] Widening the second src op of shifts bug fix
The second source operand of G_SHL, G_ASHR, and G_LSHR must preserve its
value as a (small) unsigned integer, therefore its incorrect to widen it
in any way but by zero extending it.

G_SHL was using G_ANYEXT and G_ASHR - G_SEXT (which is correct for their
destination and first source operands, but not the "number of bits to
shift" operand).

Generally, shifts aren't as similar to regular binary operations as it
might seem, for instance, they aren't commutative nor associative and
the second source operand usually requires a special treatment.

Reviewers: bogner, javed.absar, aivchenk, rovka

Reviewed By: bogner

Subscribers: igorb, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D46413

llvm-svn: 331926
2018-05-09 21:43:30 +00:00
Manoj Gupta 4fbf84c173 [Clang] Implement function attribute no_stack_protector.
Summary:
This attribute tells clang to skip this function from stack protector
when -stack-protector option is passed.
GCC option for this is:
__attribute__((__optimize__("no-stack-protector"))) and the
equivalent clang syntax would be: __attribute__((no_stack_protector))

This is used in Linux kernel to selectively disable stack protector
in certain functions.

Reviewers: aaron.ballman, rsmith, rnk, probinson

Reviewed By: aaron.ballman

Subscribers: probinson, srhines, cfe-commits

Differential Revision: https://reviews.llvm.org/D46300

llvm-svn: 331925
2018-05-09 21:41:18 +00:00
Paul Semel 4246a462a3 [llvm-objcopy] Add --strip-symbol (-N) option
llvm-svn: 331924
2018-05-09 21:36:54 +00:00
Eric Liu 2e538089fa Add SourceManagerForFile helper which sets up SourceManager and dependencies for a single file with code snippet
Summary: This can be used to create a virtual environment (incl. VFS, source manager) for code snippets.

Reviewers: sammccall, klimek

Reviewed By: sammccall

Subscribers: klimek, mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D46176

llvm-svn: 331923
2018-05-09 21:35:52 +00:00
Petr Hosek 1608ca6d64 [CMake] Build shared version of runtimes for Fuchsia
Fuchsia is no longer treated as UNIX which means we need to explicitly
enable building of shared versions of runtimes.

Differential Revision: https://reviews.llvm.org/D46609

llvm-svn: 331922
2018-05-09 21:24:06 +00:00
Vitaly Buka 34794a9669 [sanitizer] Use tid_t in ThreadLister
llvm-svn: 331921
2018-05-09 21:21:26 +00:00
Farhana Aleen e24f3ff8de [AMDGPU] Support horizontal vectorization of min/max.
Author: FarhanaAleen

Reviewed By: rampitec

Subscribers: AMDGPU

Differential Revision: https://reviews.llvm.org/D46604

llvm-svn: 331920
2018-05-09 21:18:34 +00:00
Matt Arsenault eac81b2448 AMDGPU: Ignore any_extend in mul24 combine
If a multiply is truncated, SimplifyDemandedBits
sometimes turns a zero_extend of the inputs into an
any_extend, which makes the known bits computation unhelpful.
Ignore these and compute known bits for the underlying value,
since we insert the correct extend type after.

llvm-svn: 331919
2018-05-09 21:11:35 +00:00
Krzysztof Parzyszek cff73a2118 [Hexagon] Add patterns for vector shift-and-accumulate
llvm-svn: 331918
2018-05-09 21:10:41 +00:00
Matt Arsenault 74fd7600d2 AMDGPU: Handle partial shift reduction for variable shifts
If the variable shift amount has known bits, we can still reduce
the shift.

llvm-svn: 331917
2018-05-09 20:52:54 +00:00
Matt Arsenault b143d9a5ea AMDGPU: Partially shrink 64-bit shifts if reduced to 16-bit
This is an extension of an existing combine to reduce wider
shls if the result fits in the final result type. This
introduces the same combine, but reduces the shift to a middle
sized type to avoid the slow 64-bit shift.

llvm-svn: 331916
2018-05-09 20:52:43 +00:00
Vitaly Buka d3e55bf7fc [sanitizer] Cleanup sorting functions
llvm-svn: 331915
2018-05-09 20:42:11 +00:00
Stella Stamenova 42ba76c9f6 [cmake, unittests] Fix the CMake file for the LLDB unittests to support multiple configurations
Summary: The current setup for the unit tests only works correctly when the generator does not support multiple configurations. When the generator supports multiple configurations, the inputs are not copied to the correct per-configuration directory. This change sets up the build to copy the inputs in each configuration directory.

Reviewers: labath, asmith, zturner

Reviewed By: labath

Subscribers: mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D46642

llvm-svn: 331914
2018-05-09 19:58:51 +00:00
Simon Pilgrim ca7981ac98 [X86] Fix Broadwell's Shuffle256 schedule classes load latency values.
Allows us to remove some unnecessary InstRW overrides.

llvm-svn: 331913
2018-05-09 19:27:48 +00:00
Martin Storsjo 5c84d442f5 [COFF] Fix dangling StringRefs from SVN 331900
llvm-svn: 331912
2018-05-09 19:07:10 +00:00
Simon Pilgrim d5d4cdb49d [X86] Merge instregex patterns to reduce InstrRW compile time.
llvm-svn: 331911
2018-05-09 19:04:15 +00:00
David Bolvansky b89605db01 Allow copy elision in path concatenation
Summary:
Just port of libstdc++'s fix to libc++ fs: e6ac4004fe

Author of fix: Jonathan Wakely

Reviewers: EricWF, mclow.lists

Reviewed By: EricWF

Subscribers: smeenai, christof, cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D46593

llvm-svn: 331910
2018-05-09 18:57:17 +00:00
Matt Arsenault 762d498808 AMDGPU: Add combine for trunc of bitcast from build_vector
If the truncate is only accessing the first element of the vector,
we can use the original source value.

This helps with some combine ordering issues after operations are
lowered to integer operations between bitcasts of build_vector.
In particular it stops unnecessarily materializing the unused
top half of a vector in some cases.

llvm-svn: 331909
2018-05-09 18:37:39 +00:00
Kostya Serebryany 73634e4037 [dfsan] add one more sanitizer-coverage hook to the whitelist
llvm-svn: 331908
2018-05-09 18:35:09 +00:00
Krzysztof Parzyszek 5093945e5c [Hexagon] Check the end of the correct container (fix typo)
llvm-svn: 331907
2018-05-09 18:33:59 +00:00
Matt Arsenault 378f86998c AMDGPU: Stop special casing constant indexes of extract_vector_elt
The same result folds out of the dynamic expansion logic if the
index is constant.

llvm-svn: 331906
2018-05-09 18:29:26 +00:00
Julie Hockett 4e548fe06f [tools] Updating PPCallbacks::InclusionDirective calls
[revision] added SrcMgr::CharacteristicKind to the InclusionDirective
callback, this revision updates instances of it in clang-tools-extra.

Differential Revision: https://reviews.llvm.org/D46615

llvm-svn: 331905
2018-05-09 18:27:37 +00:00
Julie Hockett 36d94ab8f0 [clang] Adding CharacteristicKind to PPCallbacks::InclusionDirective
Adding a SrcMgr::CharacteristicKind parameter to the InclusionDirective
in PPCallbacks, and updating calls to that function. This will be useful
in https://reviews.llvm.org/D43778 to determine which includes are system
headers.

Differential Revision: https://reviews.llvm.org/D46614

llvm-svn: 331904
2018-05-09 18:27:33 +00:00
Martin Storsjo 518b6c9882 [llvm-rc] Handle C preprocessor output
When preprocessing resource scripts (which can easily be done outside
of llvm-rc), included headers can leave behind C declarations (despite
preprocessing with -DRC_INVOKED), that can't be parsed by a resource
compiler.

This is handled in all of rc.exe, by parsing the preprocessor output
line markers and ignoring content from files named *.h and *.c,
documented at [1].

In addition to this filtering, strip out any other preprocessor directive
that is left behind (like pragmas) which also can't be handled by the
tokenizer.

The added test uses both standard #line markers (supported by rc.exe) and
GNU style extended line markers, thus this test doesn't pass with rc.exe,
but passes with GNU windres. (Windres on the other hand doesn't filter
out files named *.c, only *.h.)

Differential Revision: https://reviews.llvm.org/D46579

[1] https://msdn.microsoft.com/en-us/library/windows/desktop/aa381033(v=vs.85).aspx

llvm-svn: 331903
2018-05-09 18:21:03 +00:00
Martin Storsjo 7bc3c5822e [llvm-rc] Add support for the RCDATA resource type
This is the same as any other user defined resource, but with
a specific allocated resource type number.

Differential Revision: https://reviews.llvm.org/D46636

llvm-svn: 331902
2018-05-09 18:20:56 +00:00
Martin Storsjo c1a67857ba [llvm-rc] Allow -1 for control IDs in old style dialogs with 16 bit fields
-1 is commonly used as ID for controls that one don't want to
refer to later. For DIALOG resources, the IDs are 16 bit numbers,
and -1 gets interpreted as UINT32_MAX earlier, which then later is
too large to write into a uint16_t.

Differential Revision: https://reviews.llvm.org/D46506

llvm-svn: 331901
2018-05-09 18:20:49 +00:00