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22946 Commits

Author SHA1 Message Date
Chris Lattner 324871ef1a Pull shifts by a constant through multiplies (a form of reassociation), 
implementing Regression/CodeGen/X86/mul-shift-reassoc.ll

llvm-svn: 26440
 2006-03-01 03:44:24 +00:00
Chris Lattner e8ddd8a72f new testcase 
llvm-svn: 26439
 2006-03-01 03:43:38 +00:00
Evan Cheng 1926427351 Vector op lowering. 
llvm-svn: 26438
 2006-03-01 01:11:20 +00:00
Evan Cheng 53a2d60bca New vector type v2f32. 
llvm-svn: 26437
 2006-03-01 01:10:52 +00:00
Evan Cheng b97aab4371 Vector ops lowering. 
llvm-svn: 26436
 2006-03-01 01:09:54 +00:00
Evan Cheng 91c574b642 New type v2f32. 
llvm-svn: 26435
 2006-03-01 01:06:22 +00:00
Evan Cheng 5dc7772620 Missing a cast previously. 
llvm-svn: 26434
 2006-03-01 00:58:54 +00:00
Evan Cheng 5d5f6f3e32 - Added v2f32, not used by any target currently. Only for testing purpose. 
- Minor bug fix.

llvm-svn: 26433
 2006-03-01 00:55:26 +00:00
Evan Cheng be85e89ec4 - Added VConstant as an abstract version of ConstantVec. 
- All abstrct vector nodes must have # of elements and element type as their
first two operands.

llvm-svn: 26432
 2006-03-01 00:51:13 +00:00
Evan Cheng 2a78abd411 Add a test case for left shift by 1. We should not be using lea for this. 
llvm-svn: 26431
 2006-02-28 23:57:45 +00:00
Evan Cheng 0e69f45b07 Another entry. 
llvm-svn: 26430
 2006-02-28 23:38:49 +00:00
Evan Cheng 990c3602bd Don't match x << 1 to LEAL. It's better to emit x + x. 
llvm-svn: 26429
 2006-02-28 21:13:57 +00:00
Jim Laskey 716edb9754 Add const, volatile, restrict support. 
Add array of debug descriptor support.

llvm-svn: 26428
 2006-02-28 20:15:07 +00:00
Chris Lattner c5b6c9a12a Fix a regression in a patch from a couple of days ago. This fixes 
Transforms/InstCombine/2006-02-28-Crash.ll

llvm-svn: 26427
 2006-02-28 19:47:20 +00:00
Chris Lattner 8c5f04d212 new testcase 
llvm-svn: 26426
 2006-02-28 19:46:56 +00:00
Chris Lattner c1fa889cde 8 spaces -> tab. Reported by Wink Saville 
llvm-svn: 26425
 2006-02-28 19:12:58 +00:00
Chris Lattner 408fee7ad4 evan's recent x86 isel improvements have fixed this, though not in the way 
originally envisioned :)

llvm-svn: 26422
 2006-02-28 16:39:56 +00:00
Chris Lattner b9f35f06bc Add a subtarget feature for the stfiwx instruction. I know the G5 has it, 
but I don't know what other PPC impls do.  If someone could update the proc
table, I would appreciate it :)

llvm-svn: 26421
 2006-02-28 07:08:22 +00:00
Chris Lattner d786b0e033 new testcases 
llvm-svn: 26420
 2006-02-28 06:54:19 +00:00
Chris Lattner f0032b350c Compile: 
unsigned foo4(unsigned short *P) { return *P & 255; }
unsigned foo5(short *P) { return *P & 255; }

to:

_foo4:
        lbz r3,1(r3)
        blr
_foo5:
        lbz r3,1(r3)
        blr

not:

_foo4:
        lhz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr
_foo5:
        lhz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr

llvm-svn: 26419
 2006-02-28 06:49:37 +00:00
Chris Lattner 872810da6c remove implemented item 
llvm-svn: 26418
 2006-02-28 06:36:04 +00:00
Chris Lattner bdbc4476d9 Fold "and (LOAD P), 255" -> zextload. This allows us to compile: 
unsigned foo3(unsigned *P) { return *P & 255; }
as:
_foo3:
        lbz r3, 3(r3)
        blr

instead of:

_foo3:
        lwz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr

and:

unsigned short foo2(float a) { return a; }

as:
_foo2:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lhz r3, -2(r1)
        blr

instead of:

_foo2:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr

llvm-svn: 26417
 2006-02-28 06:35:35 +00:00
Chris Lattner 0f8a727c49 fold (sra (sra x, c1), c2) -> (sra x, c1+c2) 
llvm-svn: 26416
 2006-02-28 06:23:04 +00:00
Chris Lattner b70f141893 Implement rem.ll:test[7-9] and PR712 
llvm-svn: 26415
 2006-02-28 05:49:21 +00:00
Chris Lattner 3059128d02 new testcases for PR712 
llvm-svn: 26414
 2006-02-28 05:48:56 +00:00
Chris Lattner 2a7c7b8bab Simplify some code now that the RHS of a rem can't be 0 
llvm-svn: 26413
 2006-02-28 05:40:55 +00:00
Chris Lattner 626f96431b new testcase 
llvm-svn: 26412
 2006-02-28 05:30:48 +00:00
Chris Lattner 0de4a8d7b7 Rearrange some code, fold "rem X, 0", implementing rem.ll:test6 
llvm-svn: 26411
 2006-02-28 05:30:45 +00:00
Chris Lattner 9fed5b6122 Add support for output memory constraints. 
llvm-svn: 26410
 2006-02-27 23:45:39 +00:00
Jim Laskey 6d5c2a0156 Qualify dwarf namespace inside llvm namespace. 
llvm-svn: 26409
 2006-02-27 22:37:23 +00:00
Nate Begeman f918ed2e33 readme updates 
llvm-svn: 26405
 2006-02-27 22:08:36 +00:00
Jim Laskey bc7a3832e8 Partial enabling of functions. 
llvm-svn: 26404
 2006-02-27 20:37:42 +00:00
Chris Lattner ec185f7843 Don't print constant initializers, they may span lines now. 
llvm-svn: 26403
 2006-02-27 20:09:23 +00:00
Jim Laskey 72b66d6d8a Supporting multiple compile units. 
llvm-svn: 26402
 2006-02-27 17:27:12 +00:00
Jim Laskey 22e47b9f4e Re-orging file. 
llvm-svn: 26401
 2006-02-27 12:43:29 +00:00
Jim Laskey 6be3d8e0df Pretty print large struct constants. 
llvm-svn: 26400
 2006-02-27 10:33:53 +00:00
Jim Laskey 8f2c1021b4 Removed dependency on how operands are printed (want multi-line.) 
llvm-svn: 26399
 2006-02-27 10:29:04 +00:00
Chris Lattner d87ea46887 Use -emit-llvm -S to get .ll file output from llvm-gcc 
llvm-svn: 26397
 2006-02-27 05:39:00 +00:00
Chris Lattner c7bfed0f7b Merge two almost-identical pieces of code. 
Make this code more powerful by using ComputeMaskedBits instead of looking
for an AND operand.  This lets us fold this:

int %test23(int %a) {
        %tmp.1 = and int %a, 1
        %tmp.2 = seteq int %tmp.1, 0
        %tmp.3 = cast bool %tmp.2 to int  ;; xor tmp1, 1
        ret int %tmp.3
}

into: xor (and a, 1), 1
llvm-svn: 26396
 2006-02-27 02:38:23 +00:00
Chris Lattner a8bd74d5d0 new testcases 
llvm-svn: 26395
 2006-02-27 02:36:19 +00:00
Chris Lattner f5c8a0b83f Fold (A^B) == A -> B == 0 
and  (A-B) == A  ->  B == 0

llvm-svn: 26394
 2006-02-27 01:44:11 +00:00
Chris Lattner 7422e470f3 New testcases 
llvm-svn: 26393
 2006-02-27 01:43:02 +00:00
Chris Lattner ab8164042a Implement bit propagation through sub nodes, this (re)implements 
PowerPC/div-2.ll

llvm-svn: 26392
 2006-02-27 01:00:42 +00:00
Chris Lattner 3af2da1f3d Reenable this 
llvm-svn: 26391
 2006-02-27 01:00:12 +00:00
Chris Lattner 47ee42829d remove some completed notes 
llvm-svn: 26390
 2006-02-27 00:39:31 +00:00
Chris Lattner a60751dd43 Check RHS simplification before LHS simplification to avoid infinitely looping 
on PowerPC/small-arguments.ll

llvm-svn: 26389
 2006-02-27 00:36:27 +00:00
Chris Lattner 27220f8958 Just like we use the RHS of an AND to simplify the LHS, use the LHS to 
simplify the RHS.  This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:

_test2:
        srwi r2, r3, 1
        xori r3, r2, 40961
        blr

instead of this:

_test2:
        rlwinm r2, r3, 31, 17, 31
        xori r2, r2, 40961
        rlwinm r3, r2, 0, 16, 31
        blr

llvm-svn: 26388
 2006-02-27 00:22:28 +00:00
Chris Lattner 255ab33177 new testcase 
llvm-svn: 26387
 2006-02-27 00:20:23 +00:00
Chris Lattner 118ddba929 Add a bunch of missed cases. Perhaps the most significant of which is that 
assertzext produces zero bits.

llvm-svn: 26386
 2006-02-26 23:36:02 +00:00
Chris Lattner f78df7c14d Fold (X|C1)^C2 -> X^(C1|C2) when possible. This implements 
InstCombine/or.ll:test23.

llvm-svn: 26385
 2006-02-26 19:57:54 +00:00