Commit Graph

3509 Commits

Author SHA1 Message Date
Tim Northover 8c824a07ae Diagnostics: remove dodgy handler for bitcode inlineasm diagnostics.
Whatever crash it was there to present appears to have been fixed in the
backend now, and it had the nasty side-effect of causing clang to exit(0) and
leave a .o containing goodness knows what even when an error hit.

llvm-svn: 265038
2016-03-31 19:19:24 +00:00
Jonas Paulsson 3ace74a414 [SystemZ] Specify required features for builtins.
BuiltinsSystemZ.def is extended to include the required processor
features per intrinsic.

New test test/CodeGen/builtins-systemz-error2.c that checks for
expected errors when instrinsics are used with a subtarget that does
not support the required feature (e.g. vector support).

Reviewed by Ulrich Weigand.

llvm-svn: 264873
2016-03-30 15:51:24 +00:00
Teresa Johnson 0c7bb96533 Prepare tests for change to emit Module SourceFileName to LLVM assembly
Modify these tests to ignore the source file name when looking for the
expected string. It was already catching the source file name once via
the ModuleID, and will catch it another time with an impending change to
LLVM to serialize out the module's SourceFileName.

llvm-svn: 264868
2016-03-30 13:59:49 +00:00
Yunzhong Gao 333e69d70f Fixing PR26558: remove the adx target attribute requirement from adc builtins.
The addcarry and subborrow variants of the builtins do not require the adx
target attribute; only the addcarryx variants require them.

Differential Revision: http://reviews.llvm.org/D18533

llvm-svn: 264801
2016-03-29 22:59:20 +00:00
Hrvoje Varga 14c42eec54 Add additional Hi/Lo registers to Clang MipsTargetInfoBase
Differential Revision: http://reviews.llvm.org/D17378

llvm-svn: 264727
2016-03-29 12:46:16 +00:00
Jacques Pienaar d964cc22d1 [lanai] Add Lanai backend to clang driver.
Changes to clang to add Lanai backend. Adds a new target, ABI and toolchain.

General Lanai backend discussion on llvm-dev thread "[RFC] Lanai backend" (http://lists.llvm.org/pipermail/llvm-dev/2016-February/095118.html).

Differential Revision: http://reviews.llvm.org/D17002

llvm-svn: 264655
2016-03-28 21:02:54 +00:00
Michael Zuckerman def78750b7 [CLANG][avx512][BUILTIN] Adding fixupimm{pd|ps|sd|ss}
getexp{sd|ss} getmant{sd|ss} kunpck{di|si} loada{pd|ps} loaddqu{di|hi|qi|si} max{sd|ss} min{sd|ss} kmov16 builtins to clang


Differential Revision: http://reviews.llvm.org/D18215

llvm-svn: 264574
2016-03-28 12:23:09 +00:00
Eric Christopher 4650272310 The time when -faltivec (or, on clang only, -maltivec) will magically
include altivec.h has come and gone.

Rationale: This causes modules, rewrite-includes, etc to be sad and
people should just include altivec.h in their source.

llvm-svn: 264235
2016-03-24 01:26:08 +00:00
Matt Arsenault 08087c52eb Add missing __builtin_bitreverse8
Also add documentation for bitreverse builtins

llvm-svn: 264203
2016-03-23 22:14:43 +00:00
Andrey Turetskiy 5f1cf5fa66 [X86] Add "x87" in x86 target feature map.
Differential Revision: http://reviews.llvm.org/D13980

llvm-svn: 264149
2016-03-23 11:15:10 +00:00
George Burgess IV 6da4c20f7d [Sema] Allow implicit conversions of &overloaded_fn in C.
Also includes a minor ``enable_if`` docs update.

Currently, our address-of overload machinery will only allow implicit
conversions of overloaded functions to void* in C. For example:

```
void f(int) __attribute__((overloadable));
void f(double) __attribute__((overloadable, enable_if(0, "")));

void *fp = f; // OK. This is C and the target is void*.
void (*fp2)(void) = f; // Error. This is C, but the target isn't void*.
```

This patch makes the assignment of `fp2` select the `f(int)` overload,
rather than emitting an error (N.B. you'll still get a warning about the
`fp2` assignment if you use -Wincompatible-pointer-types).

Differential Revision: http://reviews.llvm.org/D13704

llvm-svn: 264132
2016-03-23 02:33:58 +00:00
Justin Lebar 717d2b0a0d [CUDA] Implement atomicInc and atomicDec builtins
These functions cannot be implemented as atomicrmw or cmpxchg
instructions, so they are implemented as a call to the NVVM intrinsics
@llvm.nvvm.atomic.load.inc.32.p0i32 and
@llvm.nvvm.atomic.load.dec.32.p0i32.

Patch by Jason Henline.

Reviewers: jlebar

Differential Revision: http://reviews.llvm.org/D18322

llvm-svn: 264009
2016-03-22 00:09:28 +00:00
Renato Golin 930de67e6a [ARM] Clang tests for ARM Cortex-A32 support
Patch by Sam Parker.

llvm-svn: 263957
2016-03-21 17:29:51 +00:00
Pirama Arumuga Nainar 8e2e9d6f4c Add -fnative-half-arguments-and-returns
Summary:
r246764 handled __fp16 arguments and returns for AAPCS, but skipped this
handling for OpenCL.  Simlar to OpenCL, RenderScript also handles __fp16
type natively.

This patch adds the -fnative-half-arguments-and-returns command line
flag to allow such languages to skip this coercion of __fp16.

Reviewers: srhines, olista01

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D18138

llvm-svn: 263795
2016-03-18 16:58:36 +00:00
Roman Levenstein 35aa5cecf2 Add attributes for preserve_mostcc/preserve_allcc calling conventions to the C/C++ front-end
Till now, preserve_mostcc/preserve_allcc calling convention attributes were only
available at the LLVM IR level. This patch adds attributes for
preserve_mostcc/preserve_allcc calling conventions to the C/C++ front-end.

The code was mostly written by Juergen Ributzka.
I just added support for the AArch64 target and tests.

Differential Revision: http://reviews.llvm.org/D18025

llvm-svn: 263647
2016-03-16 18:00:46 +00:00
Pablo Barrio 2a35ff0687 Add more ARM Cortex-R8 regression tests to Clang.
Summary:
This patch adds Clang tests for Cortex-R8 related to FP capabilities and
hardware integer divide.

Reviewers: rengolin, bsmith

Subscribers: aemerson, cfe-commits, rengolin

Differential Revision: http://reviews.llvm.org/D18193

llvm-svn: 263632
2016-03-16 10:21:04 +00:00
Marina Yatsina d6d8b315d3 Avoid using LookupResult's implicit copy ctor and assignment operator to avoid warnings
The purpose of this patch is to keep the same functionality without using LookupResult's implicit copy ctor and assignment operator, because they cause warnings when -Wdeprecated is passed.
This patch is meant to help the following review: http://reviews.llvm.org/D18123.
The functionality is covered by the tests in my original commit (255890)
The test case in this patch was added to test a bug caught in the review of the first version of this fix.

Differential Revision: http://reviews.llvm.org/D18175

llvm-svn: 263630
2016-03-16 09:56:58 +00:00
Evgeniy Stepanov 02279ed12d [cfi] Don't emit checks for disabled CFI kinds.
In the cross-DSO CFI mode clang emits __cfi_check_fail that handles
errors triggered from other modules with targets in the current
module. With this change, __cfi_check_fail will handle errors for
CFI kinds that are not enabled in the current module as if they
have the trapping behaviour (-fsanitize-trap=...).

This fixes a bug where some combinations of -fsanitize* flags may
result in a link failure due to a missing sanitizer runtime library
for the diagnostic calls in __cfi_check_fail.

llvm-svn: 263578
2016-03-15 20:19:29 +00:00
Mehdi Amini 557c20a886 Remove compile time PreserveName in favor of a runtime cc1 -discard-value-names option
Summary:
This flag is enabled by default in the driver when NDEBUG is set. It
is forwarded on the LLVMContext to discard all value names (but
GlobalValue) for performance purpose.

This an improved version of D18024

Reviewers: echristo, chandlerc

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D18127

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 263394
2016-03-13 21:05:23 +00:00
Amjad Aboud 13d7a70657 Added test that covers changes in r263379.
llvm-svn: 263380
2016-03-13 11:12:57 +00:00
Reid Kleckner e10b601537 [SEH] Remove nounwind/noinline from outlined finally funclets
With the new EH representation this is no longer necessary.

llvm-svn: 263269
2016-03-11 17:36:16 +00:00
Nico Weber 416ad130ea Reenable asm-errors.c
r134811 made the test pass and reenabled it, but r134831
accidentally disabled it again due to a bad merge.

llvm-svn: 263168
2016-03-10 22:40:02 +00:00
Simon Pilgrim 05e07836c8 Updated SSE3 builtin tests to more closely match the llvm fast-isel equivalent tests
llvm-svn: 263117
2016-03-10 14:46:49 +00:00
Simon Pilgrim 99665cb77f Added note to SSE4a builtins about keeping in sync with llvm tests
llvm-svn: 263116
2016-03-10 14:44:32 +00:00
Simon Pilgrim baed60dd0a Updated SSSE3 builtin tests to more closely match the llvm fast-isel equivalent tests
llvm-svn: 263115
2016-03-10 14:42:17 +00:00
Tim Northover e5dc94ee31 ARM: fix arm_neon_intrinsics.c and re-enable.
It turns out I'd never actually tested my recent change because it was
gated on long-tests. Failure ensued.

llvm-svn: 263093
2016-03-10 04:39:45 +00:00
Richard Trieu 9402d58e5b Disable failing test and fix RUN line.
See https://llvm.org/bugs/show_bug.cgi?id=26894 for details.  This change
fixes the incorrect flags to Clang and the piping issue.  It also disables
the FileCheck portion of the test, which is currently failing.

llvm-svn: 263091
2016-03-10 04:04:12 +00:00
Tim Northover 67181e3c3a ARM & AArch64: fix IR-converted tests.
My script was converting %a0 to [[A]]0 if it had seen %a defined before %a0.
Oops.

llvm-svn: 263056
2016-03-09 20:06:10 +00:00
Kit Barton fbab158767 [PPC] FE support for generating VSX [negated] absolute value instructions
Includes new built-in, conversion of built-in to target-independent intrinsic
and update in the header file. Tests are also updated. There is a second part in
the backend for which I will post a separate code-review. BACKEND PART SHOULD BE
COMMITTED FIRST.

Phabricator: http://reviews.llvm.org/D17816
llvm-svn: 263051
2016-03-09 19:28:31 +00:00
Tim Northover 58672974a9 ARM & AArch64: convert asm tests to LLVM IR and restrict optimizations.
This is mostly a one-time autoconversion of tests that checked assembly after
"-Owhatever" compiles to only run "opt -mem2reg" and check the assembly. This
should make them much more stable to changes in LLVM so they won't break on
unrelated changes.

"opt -mem2reg" is a compromise designed to increase the readability of tests
that check dataflow, while minimizing dependency on LLVM. Hopefully mem2reg is
stable enough that no surpises will come along.

Should address http://llvm.org/PR26815.

llvm-svn: 263048
2016-03-09 18:54:42 +00:00
Tim Northover 6b582867ad AArch64: remove a couple more tests already covered elsewhere.
llvm-svn: 263038
2016-03-09 18:00:06 +00:00
Tim Northover f53713769d AArch64: remove tests of intrinsics completely duplicated elsewhere.
llvm-svn: 262964
2016-03-08 23:10:58 +00:00
Michael Zuckerman e71d59fc4f [CLANG][AVX512][BUILTIN] Add builtin vcomi{ss|sd}
Differential Revision: http://reviews.llvm.org/D17919

llvm-svn: 262847
2016-03-07 19:15:00 +00:00
Marina Yatsina 5f77679356 [ms-inline-asm][AVX512] Add ability to use k registers in MS inline asm + fix bag with curly braces
Until now curly braces could only be used in MS inline assembly to mark block start/end.
All curly braces were removed completely at a very early stage.
This approach caused bugs like:
"m{o}v eax, ebx" turned into "mov eax, ebx" without any error.

In addition, AVX-512 added special operands (e.g., k registers), which are also surrounded by curly braces that mark them as such.
Now, we need to keep the curly braces and identify at a later stage if they are marking block start/end (if so, ignore them), or surrounding special AVX-512 operands (if so, parse them as such).

This patch fixes the bug described above and enables the use of AVX-512 special operands.

This commit is the the clang part of the patch.
The clang part of the review is: http://reviews.llvm.org/D17766
The llvm part of the review is: http://reviews.llvm.org/D17767

Differential Revision: http://reviews.llvm.org/D17766

llvm-svn: 262842
2016-03-07 18:10:25 +00:00
Joerg Sonnenberger d0be8dcbf8 Implement __builtin_eh_return_data_regno for SPARC and SPARC64.
llvm-svn: 262838
2016-03-07 17:19:15 +00:00
Michael Zuckerman 9f33848f04 [CLANG][AVX512][BUILTIN] Adding new feature flag headed files and new BUILTIN vpermi2varq{i|t}{128|256|512}{mask|maskz}
Differential Revision: http://reviews.llvm.org/D17917

llvm-svn: 262834
2016-03-07 17:04:11 +00:00
Amjad Aboud faea560286 Resolved Bug 26414.
https://llvm.org/bugs/show_bug.cgi?id=26414
Since interrupt handler must be returned with iret, tail call can't be used.

Differential Revision: http://reviews.llvm.org/D17853

llvm-svn: 262830
2016-03-07 14:22:46 +00:00
Michael Zuckerman 0190c65571 [CLANG][AVX512][BUILTIN] Adding new feature flag header file and new builtin vpmadd52{h|l}uq{128|256|512}{mask|maskz}
Differential Revision: http://reviews.llvm.org/D17915

llvm-svn: 262820
2016-03-07 09:55:55 +00:00
Michael Zuckerman 912be16a0e [CLANG][AVX512][BUILTIN] Adding vpmultishiftqb{128|256|512}
Differential Revision: http://reviews.llvm.org/D17914

llvm-svn: 262817
2016-03-07 08:29:10 +00:00
David Majnemer e2ae228c76 [X86] Pass __m64 types via SSE registers for GCC compatibility
For compatibility with GCC, classify __m64 as SSE.
However, clang is a platform compiler for certain targets; retain our
old behavior on those targets: classify __m64 as integer.

This fixes PR26832.

llvm-svn: 262688
2016-03-04 05:26:16 +00:00
Michael Zuckerman 0d67e4b5d6 [CLANG][AVX512][BUILTIN] movddup{128|256|512}
Differential Revision: http://reviews.llvm.org/D17826

llvm-svn: 262617
2016-03-03 13:43:05 +00:00
Anastasia Stulova 1f95cc097c [OpenCL] Apply missing restrictions for Blocks in OpenCL v2.0
Applying the following restrictions for block types in OpenCL (v2.0 s6.12.5):
 - __block storage class is disallowed
 - every block declaration must be const qualified and initialized
 - a block can't be used as a return type of a function
 - a blocks can't be used to declare a structure or union field
 - extern speficier is disallowed

Corrected image and sampler types diagnostics with struct and unions.

Review: http://reviews.llvm.org/D16928
llvm-svn: 262616
2016-03-03 13:33:19 +00:00
Michael Zuckerman 56de012b41 Fixing a checkfile error in avx512vlbw-builtins.c
Differential Revision: http://reviews.llvm.org/D17814

llvm-svn: 262611
2016-03-03 12:17:50 +00:00
Michael Zuckerman 1ad03e7f01 [CLANG][AVX512][BUILTIN] movdqu{qi|hi} {128|256|512}
Differential Revision: http://reviews.llvm.org/D17814

llvm-svn: 262609
2016-03-03 11:34:52 +00:00
Michael Zuckerman ffbb67a8e2 [CLANG][AVX512][BUILTIN] movdqa{32|64}{load|store|}{128|256|512}
Differential Revision: http://reviews.llvm.org/D17812

llvm-svn: 262598
2016-03-03 09:26:01 +00:00
Michael Zuckerman abbe34bce6 [Clang][AVX512][BUILTIN] Adding PSRL{W|WI}{128|256|512}
Differential Revision: http://reviews.llvm.org/D17754

llvm-svn: 262593
2016-03-03 08:55:20 +00:00
Rong Xu 9c6f1538cc [PGO] Change profile use cc1 option to handle IR level profiles
This patch changes cc1 option for PGO profile use from
-fprofile-instr-use=<path> to -fprofile-instrument-use-path=<path>.
-fprofile-instr-use=<path> is now a driver only option.

In addition to decouple the cc1 option from the driver level option, this patch
also enables IR level profile use. cc1 option handling now reads the profile
header and sets CodeGenOpt ProfileUse (valid values are {None, Clang, LLVM}
-- this is a common enum for -fprofile-instrument={}, for the profile
instrumentation), and invoke the pipeline to enable the respective PGO use pass.

Reviewers: silvas, davidxl

Differential Revision: http://reviews.llvm.org/D17737

llvm-svn: 262515
2016-03-02 20:59:36 +00:00
Michael Zuckerman 3df95e711f [CLANG] [AVX512] [BUILTIN] Adding PSRA{W|WI}{128|256|512}.
Differential Revision: http://reviews.llvm.org/D17706

llvm-svn: 262481
2016-03-02 12:06:06 +00:00
Michael Zuckerman d15c95a793 [CLANG] [AVX512] [BUILTIN] Adding PSRAV
Differential Revision: http://reviews.llvm.org/D17699

llvm-svn: 262471
2016-03-02 09:05:46 +00:00
Simon Pilgrim 2e6a9a290b Updated SSE41 builtin tests to more closely match the llvm fast-isel equivalent tests
llvm-svn: 262418
2016-03-01 22:38:33 +00:00