llvm-project

Author	SHA1	Message	Date
Mircea Trofin	55f2eeebc9	[NFC] Disallow unused prefixes in MC/AMDGPU 1 out of 2 patches. Differential Revision: https://reviews.llvm.org/D94553	2021-01-12 14:31:22 -08:00
Dmitry Preobrazhensky	ecde200209	[AMDGPU][MC] Corrected parser to avoid generation of excessive error messages Summary of changes: - Changed parser to eliminate generation of excessive error messages; - Corrected lit tests to match all expected error messages; - Corrected lit tests to guard against unwanted extra messages (added option "--implicit-check-not=error:"); - Added missing checks and fixed some typos in tests. See bug 46907: https://bugs.llvm.org/show_bug.cgi?id=46907 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D86940	2020-09-02 19:42:18 +03:00
Dmitry Preobrazhensky	c4995076c6	[AMDGPU][MC][GFX9][GFX10] Corrected number of src operands for ds_[read/write]_addtid_b32 See https://bugs.llvm.org/show_bug.cgi?id=37941 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D68787 llvm-svn: 374561	2019-10-11 14:53:26 +00:00
Matt Arsenault	efa1d655d4	AMDGPU: Add ds_{read\|write}_addtid_b32 definitions llvm-svn: 312349	2017-09-01 18:38:02 +00:00
Matt Arsenault	ed6e8f0a90	AMDGPU: Add most d16 load/store instruction definitions Doesn't include the tied operand necessary for the loads, but is enough for the assembler to work. llvm-svn: 312347	2017-09-01 18:36:06 +00:00