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4 Commits

Author SHA1 Message Date
Matt Arsenault ee324ffc1f AMDGPU: Fix min3/max3 combines for f16/i16 
Fix missing instruction definitions for min3/max3.

llvm-svn: 303284
 2017-05-17 19:25:06 +00:00
Matt Arsenault 03612631cb AMDGPU: Add definition for v_xad_u32 
llvm-svn: 296515
 2017-02-28 20:27:30 +00:00
Matt Arsenault 10268f93e8 AMDGPU: Use v_med3_{f16|i16|u16} 
llvm-svn: 296401
 2017-02-27 22:40:39 +00:00
Matt Arsenault c9f2517e96 AMDGPU: Add some of the new gfx9 VOP3 instructions 
llvm-svn: 296382
 2017-02-27 21:04:41 +00:00