llvm-project

Author	SHA1	Message	Date
Craig Topper	0498b88d48	Post process ADC/SBB and use a shorter encoding if they use a sign extended immediate. llvm-svn: 177243	2013-03-18 03:34:55 +00:00
Craig Topper	7e9a1cb199	Refactor some duplicated code into helper functions. llvm-svn: 177242	2013-03-18 02:53:34 +00:00
Charles Davis	74c282b5ef	Add retw and lretw instructions. Also, fix Intel syntax parsing for all ret instructions. llvm-svn: 154468	2012-04-11 01:10:53 +00:00
Devang Patel	7cdb2ff6b5	Intel syntax. Adjust special code, used to recognize cmp<comparison code>{ss,sd,ps,pd}, for intel syntax. llvm-svn: 149291	2012-01-30 22:47:12 +00:00
Devang Patel	a410ed3ced	Intel Syntax: Extend special hand coded logic, to recognize special instructions, for intel syntax. llvm-svn: 148864	2012-01-24 21:43:36 +00:00
Devang Patel	d0930fff85	Intel syntax: Parse ... PTR [-8] llvm-svn: 148570	2012-01-20 21:21:01 +00:00
Devang Patel	f36613cb45	Intel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax. llvm-svn: 148569	2012-01-20 21:14:06 +00:00
Devang Patel	f83dcfd052	Post process 'and', 'sub' instructions and select better encoding, if available. llvm-svn: 148489	2012-01-19 18:40:55 +00:00
Devang Patel	2529dd9e00	Intel syntax: There is no need to create unary expr for simple negative displacement. llvm-svn: 148486	2012-01-19 18:15:51 +00:00
Devang Patel	4a62ff9bcb	Post process 'xor', 'or' and 'cmp' instructions and select better encoding, if available. llvm-svn: 148485	2012-01-19 17:53:25 +00:00