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6 Commits

Author SHA1 Message Date
Tom Stellard 0351ea2010 R600: Fix handling of NAN in comparison instructions 
We were completely ignoring the unorder/ordered attributes of condition
codes and also incorrectly lowering seto and setuo.

Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 191603
 2013-09-28 02:50:50 +00:00
Vincent Lejeune 4b5b849753 R600: Schedule copy from phys register at beginning of block 
It allows regalloc pass to remove them by trivially assigning associated reg

llvm-svn: 183336
 2013-06-05 20:27:35 +00:00
Vincent Lejeune f83df1f1cb R600: use capital letter for PV channel 
llvm-svn: 183107
 2013-06-03 15:44:35 +00:00
Vincent Lejeune 3d5118ca40 R600: Use bottom up scheduling algorithm 
llvm-svn: 182129
 2013-05-17 16:50:56 +00:00
Vincent Lejeune f97af796a9 R600: Prettier asmPrint of Alu 
llvm-svn: 180956
 2013-05-02 21:52:30 +00:00
Tom Stellard 75aadc2813 Add R600 backend 
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

llvm-svn: 169915
 2012-12-11 21:25:42 +00:00