Commit Graph

316456 Commits

Author SHA1 Message Date
Stanislav Mekhanoshin ec42fc177c [AMDGPU] gfx1010 SearchableTableEmitter patch for NSA
This part was accidentally missing from NSA image support commit.

Differential Revision: https://reviews.llvm.org/D61868

llvm-svn: 360623
2019-05-13 21:59:03 +00:00
Aaron Ballman 2ce598a44a Introduce the ability to dump the AST to JSON.
This adds the -ast-dump=json cc1 flag (in addition to -ast-dump=default, which is the default if no dump format is specified), as well as some initial AST dumping functionality and tests.

llvm-svn: 360622
2019-05-13 21:39:55 +00:00
Jonas Devlieghere aeeeb37e37 [CMake] Simplify lldb-server handling
We can piggyback off the existing add_lldb_tool_subdirectory to decide
whether or not lldb-server should be built.

Differential revision: https://reviews.llvm.org/D61872

llvm-svn: 360621
2019-05-13 21:25:02 +00:00
Nemanja Ivanovic 1d662316cb [Pass Pipeline][NFC] Add a test prior to committing D61726
This patch just adds a test case to show the differences in code emitted
by opt before and after https://reviews.llvm.org/D61726.

Previous attempt to commit this did not include the registered target
requirement so it caused buildbot breaks.

llvm-svn: 360620
2019-05-13 21:14:36 +00:00
Craig Topper 5f999c2bea [X86] Various type corrections to the code that creates LOCK_OR32mi8/OR32mi8Locked to the stack for idempotent atomic rmw and atomic fence.
These are updates to match how isel table would emit a LOCK_OR32mi8 node.

-Use i32 for the immediate zero even though only 8 bits are encoded.
-Use i16 for segment register.
-Use LOCK_OR32mi8 for idempotent atomic operations in 32-bit mode to match
64-bit mode. I'm not sure why OR32mi8Locked and LOCK_OR32mi8 both exist. The
only difference seems to be that OR32mi8Locked is marked as UnmodeledSideEffects=1.
-Emit an extra i32 result for the flags output.

I don't know if the types here really matter just noticed it was inconsistent
with normal behavior.

llvm-svn: 360619
2019-05-13 21:01:24 +00:00
Lang Hames 56baade10d [JITLink][MachO] Honor the no-dead-strip flag on nlist entries.
llvm-svn: 360618
2019-05-13 20:52:30 +00:00
David L. Jones 3cce23746e [Support] Ensure redirected outputs don't contain output from previous tests.
stdout may be buffered, and may not flush on every write. Explicitly flushing
before redirecting the output ensures that the captured output does not contain
output from other tests.

llvm-svn: 360617
2019-05-13 20:32:53 +00:00
Nikita Popov 323dc634b9 [WebAssembly] Don't assume that zext/sext result is i32/i64 in fast isel (PR41841)
Usually this will abort fast-isel at the instruction using the
non-legal result, but if the only use is in a different basic block,
we'll incorrectly assume that the zext/sext is to i32 (rather than
i128 in this case).

Differential Revision: https://reviews.llvm.org/D61823

llvm-svn: 360616
2019-05-13 19:40:18 +00:00
Stanislav Mekhanoshin d9930d499a [AMDGPU] gfx1010 tests. NFC.
llvm-svn: 360615
2019-05-13 19:30:06 +00:00
Marshall Clow ce78105558 Make more friendly with unions. Reviewed as https://reviews.llvm.org/D61858
llvm-svn: 360614
2019-05-13 19:29:23 +00:00
Matthias Gehre 5f9afe953d [clang-tidy] readability-redundant-declaration: fix false positive with C "extern inline"
Summary:
readability-redundant-declaration was diagnosing a redundant declaration
on "extern inline void f();", which is needed in C code to force an external definition
of the inline function f. (This is different to how inline behaves in C++).

Reviewers: alexfh, danielmarjamaki

Subscribers: xazax.hun, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D61700

llvm-svn: 360613
2019-05-13 19:21:57 +00:00
Jonas Devlieghere ae54fc9f04 Merge target and launch info environments
Before this change we were overriding the launch info environment with
the target environment. This meant that the environment variables passed
to `process launch --environment <>` were lost. Instead of replacing the
environment, we should merge them.

Differential revision: https://reviews.llvm.org/D61864

llvm-svn: 360612
2019-05-13 19:17:48 +00:00
Jonas Devlieghere 6c86f7d75e Remove commented-out code
llvm-svn: 360611
2019-05-13 19:17:44 +00:00
Sterling Augustine 7981a28d9d Add a new LIBUNWIND_WEAK_PTHREAD Cmake option to force
calls into the pthread library use weak symbols.

This option allows libpthread to be a weak dependency rather
than a hard one.

Differential Revision: https://reviews.llvm.org/D60285

llvm-svn: 360610
2019-05-13 18:45:03 +00:00
Stanislav Mekhanoshin 79b2828b3f [AMDGPU] Reorder includes per coding standard. NFC.
llvm-svn: 360609
2019-05-13 18:05:10 +00:00
Stanislav Mekhanoshin 21088639ae [AMDGPU] Remove now unused V2FP16_ONE constant def. NFC.
llvm-svn: 360608
2019-05-13 17:52:57 +00:00
Jan Korous 1652d81401 [clang][ASTContext] Call setAttached for comments attached to a declaration
This is a bug affecting performance when compiling with -Wdocumentation.

In Sema::ActOnDocumentable we're checking whether there are any comments unattached to declaration at the end of comment list whenever we encounter new documentable declaration.
Since this property of RawComment was never set we were trying to find comments every time and that involves at least a couple expensive SourceLocation decompositions.

Differential Revision: https://reviews.llvm.org/D61538

llvm-svn: 360607
2019-05-13 17:52:09 +00:00
Robert Lougher 91a9d4ef4b Revert [X86] Avoid SFB - Fix inconsistent codegen with/without debug info
Revert r360436 as it is causing clang-x64-windows-msvc buildbot to fail.

llvm-svn: 360606
2019-05-13 17:36:46 +00:00
Sanjay Patel 760f61ab36 [InstCombine] try harder to form rotate (funnel shift) (PR20750)
We have a similar match for patterns ending in a truncate. This
should be ok for all targets because the default expansion would
still likely be better from replacing 2 'and' ops with 1.

Attempt to show the logic equivalence in Alive (which doesn't
currently have funnel-shift in its vocabulary AFAICT):

  %shamt = zext i8 %i to i32
  %m = and i32 %shamt, 31
  %neg = sub i32 0, %shamt
  %and4 = and i32 %neg, 31
  %shl = shl i32 %v, %m
  %shr = lshr i32 %v, %and4
  %or = or i32 %shr, %shl
  =>
  %a = and i8 %i, 31
  %shamt2 = zext i8 %a to i32
  %neg2 = sub i32 0, %shamt2
  %and4 = and i32 %neg2, 31
  %shl = shl i32 %v, %shamt2
  %shr = lshr i32 %v, %and4
  %or = or i32 %shr, %shl

https://rise4fun.com/Alive/V9r

llvm-svn: 360605
2019-05-13 17:28:19 +00:00
Nick Desaulniers c33f754e74 [TargetLowering] Handle multi depth GEPs w/ inline asm constraints
Summary:
X86TargetLowering::LowerAsmOperandForConstraint had better support than
TargetLowering::LowerAsmOperandForConstraint for arbitrary depth
getelementpointers for "i", "n", and "s" extended inline assembly
constraints. Hoist its support from the derived class into the base
class.

Link: https://github.com/ClangBuiltLinux/linux/issues/469

Reviewers: echristo, t.p.northover

Reviewed By: t.p.northover

Subscribers: t.p.northover, E5ten, kees, jyknight, nemanjai, javed.absar, eraman, hiraditya, jsji, llvm-commits, void, craig.topper, nathanchance, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61560

llvm-svn: 360604
2019-05-13 17:27:44 +00:00
Paul Robinson b38e4b28e3 Stop defining negative versions of some lit feature keywords:
zlib/nozlib, asan/not_asan, msan/not_msan, ubsan/not_ubsan.

We still have two other ways to express the absence of a feature.
First, we have the '!' operator to invert the sense of a keyword.  For
example, given a feature that depends on zlib being unavailable, its
test can say:
    REQUIRES: !zlib

Second, if a test doesn't play well with some features, such as
sanitizers, that test can say:
    UNSUPPORTED: asan, msan

The different ways of writing these exclusions both have the same
technical effect, but have different implications to the reader.

llvm-svn: 360603
2019-05-13 17:18:58 +00:00
Andrey Churbanov 1aaf2a3c18 fixed typo made by commit r360595
llvm-svn: 360602
2019-05-13 17:04:32 +00:00
Sanjay Patel cb8957f718 [InstCombine] add tests for rotates with narrow shift amount (PR20750); NFC
llvm-svn: 360601
2019-05-13 17:02:26 +00:00
Nico Weber 69a3f9e465 gn build: Fewer dependencies in llvm/lib/Target
The tablegen groups only need public_deps for inc files included
(possibly transitively) in other targets. Move inc files that are
internan to the MCTargetDesc libraries into regular deps.

Related to the changes that merged InstPrinter into MCTargetDesc
(360484, 360486 etc).

llvm-svn: 360600
2019-05-13 16:59:43 +00:00
Shafik Yaghmour 9acacebf83 [DataFormatters] FindLibCppStdFunctionCallableInfo() currently uses FindFunctions() in order to find a lambdas operator()() but using FindSymbolsMatchingRegExAndType() is cheaper and if we also anchor the regex using ^ this adds some additional performance gains.
Differential Revision: https://reviews.llvm.org/D61759

llvm-svn: 360599
2019-05-13 16:48:06 +00:00
Sam Clegg 0b13ca2f5e [WebAssembly] Refactor relocation processing. NFC.
This is the remaining NFC part of https://reviews.llvm.org/D61539 which
was reverted.

Differential Revision: https://reviews.llvm.org/D61800

llvm-svn: 360598
2019-05-13 16:42:52 +00:00
Nico Weber eadbde32db gn build: Merge r360572
llvm-svn: 360597
2019-05-13 16:15:40 +00:00
Simon Pilgrim 73aee29095 [X86][SSE] LowerBuildVectorv4x32 - don't insert MOVQ for undef elts
Fixes the regression noted in D61782 where a VZEXT_MOVL was being inserted because we weren't discriminating between 'zeroable' and 'all undef' for the upper elts.

Differential Revision: https://reviews.llvm.org/D61782

llvm-svn: 360596
2019-05-13 16:10:11 +00:00
Andrey Churbanov 7f63e8c0a6 Fixed creation of aliases in Windows build.
Changed file extension of the destination of the copy of libomp.lib
(it was mistakely .dll, now it is .lib) in installation on Windows.

Differential Revision: https://reviews.llvm.org/D61673

llvm-svn: 360595
2019-05-13 16:07:37 +00:00
Simon Pilgrim cf5a8eb7cd [X86][SSE] Relax use limits for lowerAddSubToHorizontalOp (PR32433)
Now that we can use HADD/SUB for scalar additions from any pair of extracted elements (D61263), we can relax the one use limit as we will be able to merge multiple uses into using the same HADD/SUB op.

This exposes a couple of missed opportunities in LowerBuildVectorv4x32 which will be committed separately.

Differential Revision: https://reviews.llvm.org/D61782

llvm-svn: 360594
2019-05-13 16:02:45 +00:00
Peter Smith 4e21c770ec [ELF] Full support for -n (--nmagic) and -N (--omagic) via common page
The -n (--nmagic) disables page alignment, and acts as a -Bstatic
The -N (--omagic) does what -n does but also marks the executable segment as
writeable. As page alignment is disabled headers are not allocated unless
explicit in the linker script.

To disable page alignment in LLD we choose to set the page sizes to 1 so
that any alignment based on the page size does nothing. To set the
Target->PageSize to 1 we implement -z common-page-size, which has the side
effect of allowing the user to set the value as well.

Setting the page alignments to 1 does mean that any use of
CONSTANT(MAXPAGESIZE) or CONSTANT(COMMONPAGESIZE) in a linker script will
return 1, unlike in ld.bfd. However given that -n and -N disable paging
these probably shouldn't be used in a linker script where -n or -N is in
use.

Differential Revision: https://reviews.llvm.org/D61688

llvm-svn: 360593
2019-05-13 16:01:26 +00:00
Simon Pilgrim d3cedee3c6 [TargetLowering] Add SimplifyDemandedBits support for ZERO_EXTEND_VECTOR_INREG
More work for PR39709.

llvm-svn: 360592
2019-05-13 15:51:26 +00:00
Craig Topper c6a6c10742 [X86] Add test case for mask register variant of PR41619 which should be fixed after r360552
llvm-svn: 360591
2019-05-13 15:45:20 +00:00
Brian Cain 9423ba8121 [libcxx] teach type_traits test about long uint32_t
Patch by Ben Craig.

llvm-svn: 360590
2019-05-13 15:41:18 +00:00
Amara Emerson e5248e6b41 Revert "[LSR] Tweak setup cost depth threshold to 10."
Changing the threshold might not be the best long term approach. Revert for now.

llvm-svn: 360589
2019-05-13 15:37:18 +00:00
Simon Pilgrim d9aa928603 [X86] Add SimplifyDemandedBits support for PEXTRB/PEXTRW (PR39709)
Test case will be included in a followup - its being used but its tricky to show a case that isn't caught at a later stage anyway.

llvm-svn: 360588
2019-05-13 15:31:27 +00:00
Aleksandr Urakov 7f5318c892 [NativePDB] Fix tests after r360569
llvm-svn: 360587
2019-05-13 15:06:13 +00:00
Marshall Clow 98c7c4fad2 Add a test for LWG#3204 and mark it as complete. Reviewed as https://reviews.llvm.org/D61829 Thanks to Zoe for the patch.
llvm-svn: 360586
2019-05-13 14:56:02 +00:00
Sanjay Patel 05dafb1c97 [DAGCombiner] narrow vector binop with inserts/extract
We catch most of these patterns (on x86 at least) by matching
a concat vectors opcode early in combining, but the pattern may
emerge later using insert subvector instead.

The AVX1 diffs for add/sub overflow show another missed narrowing
pattern. That one may be falling though the cracks because of
combine ordering and multiple uses.

llvm-svn: 360585
2019-05-13 14:31:14 +00:00
Alexey Bataev f9e00db818 [OPENMP][NVPTX]Simplify handling of thread limit, NFC.
Summary:
Patch improves performance of the full runtime mode by moving
threads limit counter to the shared memory. It also allows to save
global memory.

Reviewers: grokos, kkwli0, gtbercea

Subscribers: guansong, jdoerfert, openmp-commits, caomhin

Tags: #openmp

Differential Revision: https://reviews.llvm.org/D61801

llvm-svn: 360584
2019-05-13 14:21:46 +00:00
Pavel Labath b1e28d9b6a DWARF/DIERef: remove non-const operator<
It serves no purpose as one can always invoke the const version instead.

llvm-svn: 360583
2019-05-13 13:52:40 +00:00
Sanjay Patel 83e61bc5e2 [x86] add test for insert/extract binop; NFC
This pattern is visible in the c-ray benchmark with an AVX target.

llvm-svn: 360582
2019-05-13 13:32:16 +00:00
Kevin P. Neal 5987749e33 Add constrained fptrunc and fpext intrinsics.
The new fptrunc and fpext intrinsics are constrained versions of the
regular fptrunc and fpext instructions.

Reviewed by:	Andrew Kaylor, Craig Topper, Cameron McInally, Conner Abbot
Approved by:	Craig Topper
Differential Revision: https://reviews.llvm.org/D55897

llvm-svn: 360581
2019-05-13 13:23:30 +00:00
Hans Wennborg d5fb162563 Revert r360559 "[c++20] P1064R0: Allow virtual function calls in constant expression evaluation."
This caused Chromium builds to hit the new "can't handle virtual calls with
virtual bases" assert. Reduced repro coming up.

llvm-svn: 360580
2019-05-13 13:19:09 +00:00
Simon Pilgrim d845bc3d0c TargetLowering::SimplifyDemandedBits - early-out for UNDEF ops. NFCI.
llvm-svn: 360579
2019-05-13 12:44:03 +00:00
Thomas Preud'homme e47362c1ec FileCheck [5/12]: Introduce regular numeric variables
Summary:
This patch is part of a patch series to add support for FileCheck
numeric expressions. This specific patch introduces regular numeric
variables which can be set on the command-line.

This commit introduces regular numeric variable that can be set on the
command-line with the -D option to a numeric value. They can then be
used in CHECK patterns in numeric expression with the same shape as
@LINE numeric expression, ie. VAR, VAR+offset or VAR-offset where offset
is an integer literal.

The commit also enable strict whitespace in the verbose.txt testcase to
check that the position or the location diagnostics. It fixes one of the
existing CHECK in the process which was not accurately testing a
location diagnostic (ie. the diagnostic was correct, not the CHECK).

Copyright:
    - Linaro (changes up to diff 183612 of revision D55940)
    - GraphCore (changes in later versions of revision D55940 and
                 in new revision created off D55940)

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: hiraditya, llvm-commits, probinson, dblaikie, grimar, arichardson, tra, rnk, kristina, hfinkel, rogfer01, JonChesterfield

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60385

llvm-svn: 360578
2019-05-13 12:39:08 +00:00
Eugene Leviant 053c6fc2b8 [ThinLTO] Don't internalize weak writeable variables
Variables with linkonce_odr and weak_odr linkage shouldn't be internalized
if they're not readonly. Otherwise we may end up with multiple copies of
such variable, so reads and writes will become inconsistent

Differential revision: https://reviews.llvm.org/D61255

llvm-svn: 360577
2019-05-13 11:53:05 +00:00
Pavel Labath 9cba2c9650 Add REQUIRES: windows to NativePDB/stack_unwinding01.cpp
The test runs the compiled executable. As such, it can only work on
windows hosts.

llvm-svn: 360576
2019-05-13 11:32:52 +00:00
Serge Guelton 2cabb4dc5b Simplify llvm-cat help
Only output options that are directly relevant.

Differential Revision: https://reviews.llvm.org/D61740

llvm-svn: 360575
2019-05-13 11:29:25 +00:00
Pavel Labath 1211baa51c Breakpad: Generate unwind plans from STACK CFI records
Summary:
This patch implements the GetUnwindPlan interface (added in the previous
patch) for SymbolFileBreakpad, and uses it to generate unwind plans from
STACK CFI records in breakpad files.

We first perform a light-weight parse of the breakpad in order to build
up a map of regions covered by the unwind info so that we can later jump
to the right record when we need to unwind a specific function.

The actual parsing is relatively straight-forward, as the STACK CFI records
are just another (text) form of the eh_frame unwind instructions, and
the same goes for lldb's UnwindPlans. The newly-introduced
PostfixExpression API is used to convert the breakpad postfix
expressions into DWARF. The generated dwarf expressions are stored in a
BumpPtrAllocator, as the UnwindPlan does not take ownership of the
expression data it references (usually this is static data in an object
file, so special ownership is needed).

At this moment the generated unwind plans aren't used in the actual
unwind machinery (only in the image show-unwind command), but that is
coming in a separate patch.

Reviewers: amccarth, clayborg, markmentovai

Subscribers: aprantl, jasonmolenda, lldb-commits

Differential Revision: https://reviews.llvm.org/D61733

llvm-svn: 360574
2019-05-13 11:25:35 +00:00