Commit Graph

341641 Commits

Author SHA1 Message Date
Alex Richardson 3114435168 Re-enable a update_cc_test_checks.py tests
This test was not running because it still had a REQUIRES: python3 line.
As this is no longer necessary, remove the REQUIRES to run the test
again.
2020-02-05 15:37:30 +00:00
Simon Pilgrim e63abde39f [clang][driver] Fix null pointer dereference warning inside PrintActions1 (PR43462)
As detailed on PR43462, clang static analyzer is complaining about a null pointer dereference as we provide a 'host' toolchain fallback if the ToolChain pointer is null, but then use that pointer anyhow to report the triple.

Tests indicate the ToolChain pointer is always valid and the 'host' code path is redundant.

Differential Revision: https://reviews.llvm.org/D74046
2020-02-05 15:32:18 +00:00
Sjoerd Meijer 01022af5d5 [ARM][MVE] LowOverheadLoops: DCE on the iteration count setup expression
Once we have created a tail-predicated hardware-loop, and thus know the number
of elements that are processed, we want to clean-up the iteration count
expression of that loop. In D73682, we bailed the analysis on conditionally
executed instructions. This adds support for IT-blocks, so that we can handle
these cases again. The restriction is that we only support IT blocks containing
1 statement, but that seems to cover most cases and forms of the iteration
count expression.

Differential Revision: https://reviews.llvm.org/D73947
2020-02-05 15:15:46 +00:00
Alexey Bataev 569dc65c63 [OPNEMP50][DOCS]Mark array shaping expression as claimed, NFC. 2020-02-05 10:02:39 -05:00
Alexey Bataev fd3437a4f7 [OPENMP][NVPTX]Add NVPTX specific definitions for new/delete operators.
Summary:
To use new/delete in NVPTX code we need to define them. Implementation
copied from CUDA wrappers.

Reviewers: hfinkel, jdoerfert

Subscribers: mgorny, guansong, kkwli0, caomhin, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73128
2020-02-05 09:57:53 -05:00
Stephan Herhut e1e09f0ce6 [MLIR] Add mapping based on ValueRange to BlockAndValueMapper.
Summary:
It is often needed to map entire ranges rather than single values. To avoid
writing the same for loop every time, I have added an overload to the map
method.

Differential Revision: https://reviews.llvm.org/D73894
2020-02-05 15:48:13 +01:00
Artem Dergachev 482e236e56 [analyzer] Fix a couple of bugs in HTML report generation.
It should now produce valid HTML again.

Differential Revision: https://reviews.llvm.org/D73993
2020-02-05 17:16:38 +03:00
Momchil Velikov a328536c6d [ARM] Correct syntax of the CLRM insn
The predicate should be adjacent to the opcode.

Differential Revision: https://reviews.llvm.org/D74040
2020-02-05 13:54:34 +00:00
Andrea Di Biagio aaaeac6166 [MCA] Remove verification check on MayLoad and MayStore. NFCI
Field NumMicroOpcodes is currently used by mca to model the number of uOPs
dispatched from the uOp-Queue to the out of order backend.  From a 'dispatch'
point of view, an instruction with zero opcodes is still valid; it simply
doesn't consume any dispatch group slots.

However, mca doesn't expect an instruction with zero uOPs to consume pipeline
resources because it is seen as a contradiction.  In practice, it only makes
sense if such an instruction is eliminated and never really executed. It may be
that mca is being too conservative here. However I believe that mca is right,
and we should probably check that inconsistency in CodeGenSchedule.cpp (when we
also verify scheduling classes in general).

This patch removes the check for MayLoad and MayStore in mca.  That check is
probably too conservative: we are already checking if a zero-uops instruction
consumes any processor resources. Note also that instructions with unmodelled
side-effects also tend to set the MayLoad/MayStore flags even if - theoretically
speaking - they might not even consume any hw resources in practice.

In future we may want to implement different checks (possibly outside of mca)
and potentially revisit the logic in mca that verifies instructions.
For that reason I have raised PR44797.
2020-02-05 13:50:01 +00:00
Simon Pilgrim 4592bb7195 visitINSERT_VECTOR_ELT - pull out repeated dyn_cast. NFCI.
This always gets called at least once.
2020-02-05 13:30:54 +00:00
Sam Parker 564275289d [ARM][LowOverheadLoops] Fix loop count chain
Checking that the use-def chain that performs the loop count
isSafeToRemove is not sufficient because it means that we can
remove register copies that we need to restore lr to its correct
value. This change now prevents the transform from kicking in for the
'remove-elem-moves' test which needs to addressed later on.

Differential Revision: https://reviews.llvm.org/D74037
2020-02-05 13:21:51 +00:00
Sam Parker 4c7f819204 [ARM][LowOverheadLoops] Ensure memory predication
While validating each MVE instruction, check that all instructions
that touch memory are somehow predicated upon the VCTP.

Differential Revision: https://reviews.llvm.org/D73616
2020-02-05 13:19:08 +00:00
Raphael Isemann 706256b6d3 [lldb] Revert some change in data-formatter-objc/main.m that broke TestDataFormatterObjCNSDate.py
Changing the date2 to an timezone independent value broke the test as the data formatters
uses the current time zone for the summary (so changing it to a time zone independent value
would again break the test in some time zones). We anyway just care about this for date2
which will be printed in a timezone-independent summary.
2020-02-05 14:08:57 +01:00
Haojian Wu eaf0c89ec5 [clangd] Add the missing elaborated types in FindTarget.
Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74025
2020-02-05 14:03:36 +01:00
Raphael Isemann 7506ca3e8c [lldb][NFC] Remove some unnecessary curly braces 2020-02-05 13:47:09 +01:00
Michał Górny 5cc817be75 [lldb] Introduce i386 support in NetBSD Process plugin
Introduce support for i386 platform that is shared with amd64
in the same plugin.  The concept is partially based on the Linux
implementation.

The plugin tries to reuse as much code as possible.  As a result, i386
register enums are mapped into amd64 values and those are used in actual
code.  The code for accessing FPU and debug registers is shared,
although general-purpose register layouts do not match between the two
kernel APIs and need to be #ifdef-ed.

This layout will also make it possible to add support for debugging
32-bit programs on amd64 with minimal added code.

In order for this to work, I had to add missing data for debug registers
on i386.

Differential Revision: https://reviews.llvm.org/D73802
2020-02-05 13:31:06 +01:00
Raphael Isemann 8d8bd0d654 [lldb] Make TestDataFormatterObjCCF.py pass outside California
Summary:
This test creates its dates with `NSDate dateWithNaturalLanguageString` which is deprecated and uses the current time zone of the machine to
interpret the input string. This causes that the created NSDate has a different value depending on the locale of the machine
and we hardcoded the value for California's time zone (PST) but the data formatter gives out the GMT value as a string.

This just replaces the use with the timezone-independent dateWithTimeIntervalSince1970 (which we also use in the rest of the test)
to make this pass independently of the time zone of the machine running the test.

Reviewers: mib

Reviewed By: mib

Subscribers: lldb-commits, JDevlieghere

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D74038
2020-02-05 13:24:06 +01:00
Alexey Sotkin f780e15caf [OpenCL] Fix support for cl_khr_mipmap_image_writes
Text of the extension is available here:
https://github.com/KhronosGroup/OpenCL-Docs/blob/master/ext/cl_khr_mipmap_image.asciidoc

Patch by Ilya Mashkov

Differential Revision: https://reviews.llvm.org/D71460
2020-02-05 14:55:32 +03:00
Simon Pilgrim 8616bd417f [X86] Fix missing load latencies (PR36894)
We weren't account for load latencies in the SSE42/AES/CLMUL schedule classes
2020-02-05 11:53:16 +00:00
Simon Pilgrim 6198e1c40a Fix MSVC signed/unsigned warning. NFCI. 2020-02-05 11:53:16 +00:00
Ayke van Laethem ea8b2cb9bf
[AVR] Add disassembly tests for supported instructions
The disassembler of the AVR backend is incomplete: most instructions do
not correctly disassemble yet.

This patch is the first in a series to add disassembly support to the
AVR backend. It starts with adding disassembler tests for instructions
that already disassemble correctly.

Differential Revision: https://reviews.llvm.org/D73911
2020-02-05 12:38:51 +01:00
Martin Storsjö 2f1ca30f99 Partially revert c1c9819ef9
Revert the part of that change that broke the
test Passes/./PluginsTests/PluginsTests.LoadPlugin.
2020-02-05 13:29:48 +02:00
Martin Storsjö c1c9819ef9 [CMake] Add missing component dependencies, to fix building for mingw with BUILD_SHARED_LIBS
Differential Revision: https://reviews.llvm.org/D73840
2020-02-05 13:10:27 +02:00
Haojian Wu f8865c0194 [clangd] Pull out a isProtoFile function.
Reviewers: kadircet

Reviewed By: kadircet

Subscribers: merge_guards_bot, mgorny, ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73780
2020-02-05 12:04:03 +01:00
Raphael Isemann 5ff4f881a7 [lldb] Ignore type sugar in TypeSystemClang::GetPointerType
Summary:
Currently having a typedef for ObjC types is breaking member access in LLDB:
```
typedef NSString Str;
NSString *s; s.length; // OK
Str *s; s.length; // Causes: member reference base type 'Str *' (aka 'NSString *') is not a structure or union
```

This works for NSString as there the type building from `NSString` -> `NSString *` will correctly
build a ObjCObjectPointerType (which is necessary to make member access with a dot possible),
but for the typedef the `Str` -> `Str *` conversion will produce an incorrect PointerType. The reason
for this is that our check in TypeSystemClang::GetPointerType is not desugaring the base type,
which causes that `Str` is not recognised as a type to a `ObjCInterface` as the check only sees the
typedef sugar that was put around it. This causes that we fall back to constructing a PointerType
instead which does not allow member access with the dot operator.

This patch just changes the check to look at the desugared type instead.

Fixes rdar://17525603

Reviewers: shafik, mib

Reviewed By: mib

Subscribers: mib, JDevlieghere, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D73952
2020-02-05 11:44:40 +01:00
Sebastian Neubauer 163e33b290 [AMDGPU] Fix lowering a16 image intrinsics
scalar_to_vector takes only one argument, not two.
The a16 tests now also check the packing of coordinates into registers

Differential Revision: https://reviews.llvm.org/D73482
2020-02-05 10:54:34 +01:00
Sebastian Neubauer 3bc7ffdaab [AMDGPU] Use v3f32 type in image instructions
This should lower the amount of used registers for gfx9.

I updated some of the changed tests with the update script because
changing them by hand is tedious.

Differential Revision: https://reviews.llvm.org/D73884
2020-02-05 10:35:41 +01:00
Georgii Rymar 60f161eb62 [yaml2obj][obj2yaml] - Simplify format of the SHT_LLVM_ADDRSIG section.
Previously the description allowed to describe symbols with use of
`Name` and `Index` keys. This patch removes them and now it is still
possible to use either names or symbol indexes, but the code is simpler
and the format is slightly different.

Such a change will be useful for another patches, e.g:
https://reviews.llvm.org/D73788#inline-671077

Differential revision: https://reviews.llvm.org/D73888
2020-02-05 12:33:14 +03:00
Kadir Cetinkaya ca1c21d4b6
[clangd] Use printf instead of `echo -e` to be compliant with dash 2020-02-05 10:21:32 +01:00
Djordje Todorovic de90d73e03 [DebugInfo] Avoid the call site param for mem instrs with multiple defs
We currently only handle mem instructions with a single define.
Avoid the call site parameter debug info when we find the case with
multiple defs, rather than throwing an assert.

Differential Revision: https://reviews.llvm.org/D73954
2020-02-05 10:03:14 +01:00
Kadir Cetinkaya 6e8d6bc9ec
[clangd] Preserve -nostdinc and --sysroot when calling query driver
Solves this issue: https://github.com/clangd/clangd/issues/157

This is my first contribution to an llvm project, so I hope I'm doing it right!

Patch by @topisani (Tobias Pisani)!

Reviewers: kadircet, klimek

Differential Revision: https://reviews.llvm.org/D73811
2020-02-05 09:58:06 +01:00
Craig Topper a3d489e87e [X86] Add a DAG combine for (i32 (sext (i8 (x86isd::setcc_carry)))) -> (i32 (x86isd::setcc_carry)) and remove isel patterns.
Same for any_extend though we don't have coverage for that.

The test changes are because isel didn't check one use of the
setcc_carry. So in isel we would end up with two different
sized setcc_carry instructions. And since it clobbers
the flags we would need to recreate the flags for the second
instruction.

This code handles additional uses by truncating the new wide
setcc_carry back to the original size for those uses.
2020-02-04 22:40:36 -08:00
Petr Hosek 491a4a7ac9 [CMake] Passthrough CMAKE_SYSTEM_NAME to default builtin and runtimes target
When building the default builtin and runtimes target, set the
CMAKE_SYSTEM_NAME to the current one. This is not necessary on
Linux and Darwin, but it appears to be necessary on Windows,
otherwise CMake fails.

Differential Revision: https://reviews.llvm.org/D73811
2020-02-04 22:38:20 -08:00
Petr Hosek 7800310cb5 [CMake][compiler-rt] Replace Windows backslashes with CMake ones
XRay builds uses llvm-config to obtain the ldflags and libs and then
passes those to CMake. Unfortunately, this breaks on Windows because
CMake tries to interpret backslashes followed by certain characters
as flags. We need to rewrite these into forward slashes that are used
by CMake (even on Windows).

Differential Revision: https://reviews.llvm.org/D73523
2020-02-04 22:35:31 -08:00
Paula Toth 4a2fa55299 Remove leftover artifacts from use of gtest.
Reviewers: abrachet

Reviewed By: abrachet

Subscribers: mgorny, MaskRay, libc-commits

Tags: #libc-project

Differential Revision: https://reviews.llvm.org/D74008
2020-02-04 21:41:45 -08:00
Jan Vesely e6686adf8a AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x)
The old version might be faster on EG (RECIP_IEEE is Trans only),
but it'd need extra corner case checks.
This gives correct corner case behaviour and saves a register.
Fixes OCL CTS sqrt test (1-thread, scalar) on Turks.

Reviewer: arsenm
Differential Revision: https://reviews.llvm.org/D74017
2020-02-05 00:24:07 -05:00
Thomas Lively 8c3e6af71b [WebAssembly] Add experimental multivalue calling ABI
Summary:
For now, this ABI simply expands all possible aggregate arguments and
returns all possible aggregates directly. This ABI will change rapidly
as we prototype and benchmark a new ABI that takes advantage of
multivalue return and possibly other changes from the MVP ABI.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D72972
2020-02-04 21:09:49 -08:00
Thomas Lively 649aba93a2 Revert "[WebAssembly][InstrEmitter] Foundation for multivalue call lowering"
Summary:
This reverts commit 3ef169e586. The
purpose of this commit was to allow stack machines to perform
instruction selection for instructions with variadic defs. However,
MachineInstrs fundamentally cannot support variadic defs right now, so
this change does not turn out to be useful.

Depends on D73927.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73928
2020-02-04 20:04:59 -08:00
Jason Molenda 843a0f9771 Enhance debugserver's err reporting on attach fails
Explicitly check for a request to attach to a pid that doesn't
exist, to attach to a pid that is already being debugged, unify the
SIP process check, and an attempt at checking if developer mode is
enabled on the system (which isn't working in debugserver, for some
reason; I can't get the authorization record which should be an
unprivileged operation and works in a standalone program I wrote).

I'll debug the developer mode check later, but I wanted to land it
along with everything else; right now it will claim that developer
mode is always enabled so it's harmless to include as-is.
2020-02-04 19:46:55 -08:00
Kern Handa b8004b7308 [mlir] Mark the MLIR tools for installation in CMake
This binplaces `mlir-translate`, `mlir-cuda-runner`, and `mlir-cpu-runner` when building the CMake install target.

Differential Revision: https://reviews.llvm.org/D73986
2020-02-05 03:42:57 +00:00
Matt Arsenault 9260d01faa AMDGPU: Correct memory size for image intrinsics
This was incorrectly rounding up to the next power of 2. v4f32 was
rounding up to v8f32, which was just wrong. There are also v3i16/v3f16
available in MVT, so we don't even need to round the f16 cases
anymore. Additionally, this field is really an EVT so we don't even
need to consider this.

Also switch some asserts to return invalid. We should have an IR
verifier for these intrinsic return types, but for now it's better to
not assert on IR that passes the verifier.

This should also probably be fixed to consider that dmask is really
eliminating some of the loaded components.
2020-02-04 22:29:23 -05:00
David Blaikie ec50e10db4 DebugInfo: Hash DW_OP_convert in loclists when using Split DWARF
Originally committed in: 1ced28cbe7
            Reverted in: f75301d16d

(reverted due to tests failing on non-linux/x86 targets, tests have since been
generalized and specialized... since Split DWARF isn't supported on non-elf
targets anyway and we have no way to run on "whatever elf target is available"
so they fail on MacOS without an explicit target triple)

This code was incorrectly emitting extra bytes into arbitrary parts of
the object file when it was meant to be hashing them to compute the DWO
ID.

Follow-up patch(es) will refactor this API somewhat to make such bugs
harder to introduce, hopefully.
2020-02-04 19:25:47 -08:00
David Blaikie def55a8efd DebugInfo: Add a couple of missing COFF sections to make convert-loclist.ll pass on Windows 2020-02-04 19:23:57 -08:00
David Blaikie 9329cfca84 DebugInfo: convert-debugloc.ll generalize to run on ppc64le
This target produces a location list for the location, so split the
match between lines to allow for a location list match.
2020-02-04 19:14:22 -08:00
Jonas Devlieghere b453caf111 [lldb/Reproducers] Change the way we instrument void* arguments
The reproducer instrumentation cannot automatically serialize and
deserialize void* arguments. Currently we deal with this by explicitly
preventing these methods from being instrumented. This has the undesired
side effect of breaking replay when that method returns a value later
used by another SB API call.

The solution is to change our approach and instrument these methods.
Instead of using the DUMMY macro, we just make (de)serialization of the
void pointer a NOOP and always return a nullptr.
2020-02-04 19:05:13 -08:00
David Blaikie a1c338d70b DebugInfo: Fix convert-loclist.ll Split DWARF variant to use a hardcoded triple
Since we don't support Split DWARF emission on non-ELF formats, hardcode
an elfine triple (we don't have a way to ask for "any ELF triple" it
seems, so hardcoded will have to do)
2020-02-04 19:02:11 -08:00
Thomas Lively 8acedb595d Revert "[WebAssembly] Split and recombine multivalue calls for ISel"
Summary:
This reverts commit 28857d14a8. This
commit worked toward a solution that did not turn out to be feasible
because MachineInstrs cannot contain an arbitrary number of defs.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73927
2020-02-04 18:46:43 -08:00
Yonghong Song d96c1bbaa0 [BPF] disable ReduceLoadWidth during SelectionDag phase
The compiler may transform the following code
  ctx = ctx + reloc_offset
  ... (*(u32 *)ctx) & 0x8000 ...
to
  ctx = ctx + reloc_offset
  ... (*(u8 *)(ctx + 1)) & 0x80 ...
where reloc_offset will be replaced with a constant during
AsmPrinter phase.

The above transformed code will be rejected the kernel verifier
as it does not allow
  *(type *)((ctx + non_zero_offset1) + non_zero_offset2)
style access pattern.

It is hard at SelectionDag phase to identify whether a load
is related to context or not. Sometime, interprocedure analysis
may be needed. So let us simply prevent such optimization
from happening.

Differential Revision: https://reviews.llvm.org/D73997
2020-02-04 18:37:43 -08:00
David Blaikie 57c54ddd7f Recommit: DebugInfo: Check DW_OP_convert in loclists with Split DWARF
Originally committed in: 552a8fe12b
            Reverted in: f75301d16d

Reverted because it was running llc directly (rather than %llc_dwarf)
which uses COFF files on Windows which LLVM doesn't support all DWARF
features in.

This functionality isn't fully working, but sets up the testing for a
follow-on patch that demonstrates and fixes the brokenness related to
DWO ID hashing this construct.
2020-02-04 18:37:06 -08:00
Thomas Lively 27748363da [WebAssembly] Enable recently implemented SIMD operations
Summary:
Moves a batch of instructions from unimplemented-simd128 to simd128
because they have recently become available in V8.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D73926
2020-02-04 18:36:32 -08:00