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1419 Commits

Author SHA1 Message Date
Chandler Carruth f12e3a67db Switch LLVM_USE_RVALUE_REFERENCES to LLVM_HAS_RVALUE_REFERENCES. 
Rationale:
1) This was the name in the comment block. ;]
2) It matches Clang's __has_feature naming convention.
3) It matches other compiler-feature-test conventions.

Sorry for the noise. =]

I've also switch the comment block to use a \brief tag and not duplicate
the name.

llvm-svn: 168996
 2012-11-30 11:45:22 +00:00
Jack Carter b05cb67b81 Mips direct object xgot support 
This patch provides support for the MIPS relocations:

    *)  R_MIPS_GOT_HI16
    *)  R_MIPS_GOT_LO16
    *)  R_MIPS_CALL_HI16
    *)  R_MIPS_CALL_LO16

These are used for large GOT instruction sequences.

Contributer: Jack Carter
llvm-svn: 168471
 2012-11-21 23:38:59 +00:00
Akira Hatanaka bb6e74a2f1 [mips] Generate big GOT code. 
llvm-svn: 168460
 2012-11-21 20:40:38 +00:00
Akira Hatanaka 56d5f1bca5 [mips] Simplify lowering functions in MipsISelLowering.cpp by using the helper 
functions added in r168456.

llvm-svn: 168458
 2012-11-21 20:30:40 +00:00
Akira Hatanaka fd04ad4261 [mips] Add helper functions that create nodes for computing address. 
llvm-svn: 168456
 2012-11-21 20:26:38 +00:00
Akira Hatanaka 59f299f28e [mips] Add command line option "-mxgot". 
llvm-svn: 168455
 2012-11-21 20:21:11 +00:00
Akira Hatanaka dbe41ad18c [mips] When a node which loads from a GOT is created, pass a MachinePointerInfo 
referring to a GOT entry.

llvm-svn: 168453
 2012-11-21 20:16:34 +00:00
Akira Hatanaka 03fb5b96fc [mips] Add target operand flag enums for big GOT relocations. 
llvm-svn: 168450
 2012-11-21 19:59:51 +00:00
Akira Hatanaka ef83919b4c Initial implementation of MipsTargetLowering::isLegalAddressingMode. 
llvm-svn: 168230
 2012-11-17 00:25:41 +00:00
Akira Hatanaka 907f5f0ca7 [mips] Fix delay slot filler so that instructions with register operand $1 are 
allowed in branch delay slot.

llvm-svn: 168131
 2012-11-16 02:39:34 +00:00
Akira Hatanaka 3bc1beb696 [mips] Add predicate HasFPIdx for floating-point indexed load instruction 
support and use it in place of HasMips32r2Or64.

llvm-svn: 168089
 2012-11-15 21:17:13 +00:00
Akira Hatanaka 5fdeac3268 Add assertions in MipsLongBranch which check the size of basic blocks. 
llvm-svn: 168078
 2012-11-15 20:05:11 +00:00
Akira Hatanaka 28e02ec8c1 [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node. 
Patch by Sasa Stankovic.

llvm-svn: 167548
 2012-11-07 19:10:58 +00:00
Akira Hatanaka 40f2d30987 Delete MipsFunctionInfo::NextStackOffset. No functionality change intended. 
llvm-svn: 167546
 2012-11-07 19:04:26 +00:00
Akira Hatanaka da1980f697 [mips] Set flag neverHasSideEffects flag on floating point conversion 
instructions.

llvm-svn: 167348
 2012-11-03 00:53:12 +00:00
Akira Hatanaka 7828331329 [mips] Set flag isAsCheapAsAMove flag on instruction LUi. 
llvm-svn: 167345
 2012-11-03 00:26:02 +00:00
Akira Hatanaka 5852e3b800 [mips] Stop reserving register AT and use register scavenger when a scratch 
register is needed.

llvm-svn: 167341
 2012-11-03 00:05:43 +00:00
Akira Hatanaka 654e3b40f5 [mips] Do not reserve all 64-bit registers, but only the ones which need to be 
reserved. Without this fix, RegScavenger::getRegsAvailable incorrectly
returns an empty set of integer registers.

llvm-svn: 167335
 2012-11-02 23:36:01 +00:00
Akira Hatanaka 949f8d890d [mips] Use register number instead of name to print register $AT. 
llvm-svn: 167315
 2012-11-02 21:26:03 +00:00
Akira Hatanaka 97b43d8bdf [mips] Add function MipsFrameLowering::estimateStackSize. 
This function estimates stack size and will be called before
PrologEpilogInserter scans the callee-saved registers.

llvm-svn: 167313
 2012-11-02 21:10:22 +00:00
Akira Hatanaka 719df2874c [mips] Add member field MipsFunctionInfo::IncomingArgSize which holds the size 
of the incoming argument area.

llvm-svn: 167312
 2012-11-02 21:03:58 +00:00
Akira Hatanaka 0dfbf1262b [mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directive 
"set .noat" so that the assembler doesn't issue warnings when register $AT is
used.

llvm-svn: 167310
 2012-11-02 20:56:25 +00:00
Akira Hatanaka 4f5ef21869 [mips] Set isAsCheapAsAMove flag on ADDiu and DADDiu, which enables 
re-materialization of immediate loads.

llvm-svn: 167153
 2012-10-31 18:37:55 +00:00
Reed Kotler 27a7229c47 Implement ADJCALLSTACKUP and ADJCALLSTACKDOWN 
llvm-svn: 167107
 2012-10-31 05:21:10 +00:00
Akira Hatanaka 9c962c02e4 [mips] Allow tail-call optimization for vararg functions and functions which 
use the caller's stack.

llvm-svn: 167048
 2012-10-30 20:16:31 +00:00
Akira Hatanaka 4866fe14e2 Add code for saving formal argument information to MipsFunctionInfo. This 
information will be used by IsEligibleForTailCallOptimization to determine
whether a call can be tail-call optimized.

llvm-svn: 167043
 2012-10-30 19:37:25 +00:00
Akira Hatanaka 6233cf565f Add definition of function MipsTargetLowering::passArgOnStack which emits nodes 
for passing a function call argument on a stack.

llvm-svn: 167041
 2012-10-30 19:23:25 +00:00
Akira Hatanaka 8e50aba5f9 Do not do tail-call optimization if target is mips16. 
llvm-svn: 167039
 2012-10-30 19:07:58 +00:00
Reed Kotler a811753716 Change mips16 delay slot jumps to non delay slot forms by default. 
We will make them delay slot forms if there is something that can be
placed in the delay slot during a separate pass. Mips16 extended instructions
cannot be placed in delay slots.

llvm-svn: 166990
 2012-10-30 00:54:49 +00:00
Reed Kotler 740981e35c Implement patterns for extloadi8 and extloadi16 
llvm-svn: 166960
 2012-10-29 19:39:04 +00:00
Reed Kotler aebb8b034c Expand all atomic ops for mips16. 
llvm-svn: 166935
 2012-10-29 16:16:54 +00:00
Reed Kotler e6c31579be Implement brind operator for mips16. 
llvm-svn: 166903
 2012-10-28 23:08:07 +00:00
Rafael Espindola d957cb2584 Remove TargetELFWriterInfo. 
All the credit goes to Jan Voung for noticing it was dead!

llvm-svn: 166902
 2012-10-28 21:34:43 +00:00
Reed Kotler 3589dd74ac This patch is for the implementation of mips16 complex pattern addr16. 
Previously mips16 was sharing the pattern addr which is used for mips32
and mips64. This had a number of problems:
1) Storing and loading byte and halfword quantities for mips16 has particular
problems due to the primarily non mips16 nature of SP. When we must
load/store byte/halfword stack objects in a function, we must create a mips16
alias register for SP. This functionality is tested in stchar.ll.
2) We need to have an FP register under certain conditions (such as 
dynamically sized alloca). We use mips16 register S0 for this purpose.
In this case, we also use this register when accessing frame objects so this
issue also affects the complex pattern addr16. This functionality is
tested in alloca16.ll.

The Mips16InstrInfo.td has been updated to use addr16 instead of addr.

The complex pattern C++ function for addr has been copied to addr16 and
updated to reflect the above issues.

llvm-svn: 166897
 2012-10-28 06:02:37 +00:00
Reed Kotler 7e4d9969cb Implement MipsHi for mips16 
llvm-svn: 166852
 2012-10-27 00:57:14 +00:00
Akira Hatanaka 6a124a84dc [mips] Do not tail-call optimize vararg functions or functions with byval 
arguments.

This is rather conservative and should be fixed later to be more aggressive.

llvm-svn: 166851
 2012-10-27 00:56:56 +00:00
Akira Hatanaka 2c07f1f140 [mips] Make sure FuncArg doesn't advance when OrigArgIndex is the same as in the 
previous iteration.

llvm-svn: 166850
 2012-10-27 00:44:39 +00:00
Akira Hatanaka ac8c669985 Use the methods and classes that were added to simplify LowerCall and 
LowerFormalArguments in MipsTargetLowering.

No functionality change intended.

llvm-svn: 166846
 2012-10-27 00:29:43 +00:00
Akira Hatanaka 2a13402a66 Add method MipsTargetLowering::writeVarArgRegs which copies argument registers 
of vararg functions back to the stack.

llvm-svn: 166844
 2012-10-27 00:21:13 +00:00
Akira Hatanaka 35f55b1622 Add method MipsTargetLowering::passByValArg. 
This method emits nodes for passing byval arguments in registers and stack.
This has the same functionality as existing functions PassByValArg64 and
WriteByValArg which will be deleted later.

llvm-svn: 166843
 2012-10-27 00:16:36 +00:00
Akira Hatanaka 25dad19f0e Add method MipsTargetLowering::copyByValRegs. 
This method copies byval arguments passed in registers onto the stack and has
the same functionality as existing functions CopyMips64ByValRegs and
ReadByValArg which will be deleted later.

llvm-svn: 166841
 2012-10-27 00:10:18 +00:00
Akira Hatanaka 4a3711d077 Add class MipsCC which provides methods used to analyze formal and call 
arguments and inquire about calling convention information.

llvm-svn: 166840
 2012-10-26 23:56:38 +00:00
Akira Hatanaka e485c65642 Delete MipsFunctionInfo::InArgFIRange. 
llvm-svn: 166837
 2012-10-26 23:49:51 +00:00
Reed Kotler b650f6bbe7 implement mips16 tls global addr 
llvm-svn: 166827
 2012-10-26 22:57:32 +00:00
Reed Kotler 4e1c629567 (no commit message) 
llvm-svn: 166780
 2012-10-26 16:18:19 +00:00
Reed Kotler 287f0449a2 Implement carry for subtract/add for mips16 
llvm-svn: 166755
 2012-10-26 04:46:26 +00:00
Reed Kotler e47873ab89 implement large (>16 bit) constant loading. 
llvm-svn: 166749
 2012-10-26 03:09:34 +00:00
Reed Kotler 097556d6bd implement mips16 patterns for select nodes 
llvm-svn: 166721
 2012-10-25 21:33:30 +00:00
Chad Rosier f0e8720054 [ms-inline asm] Add support for creating AsmRewrites in the target specific 
AsmParser logic.  To be used/tested in a subsequent commit.

llvm-svn: 166714
 2012-10-25 20:41:34 +00:00
Nadav Rotem 2289f2c932 Implement a basic VectorTargetTransformInfo interface to be used by the loop and bb vectorizers for modeling the cost of instructions. 
llvm-svn: 166593
 2012-10-24 17:22:41 +00:00