Commit Graph

387669 Commits

Author SHA1 Message Date
Fangrui Song 306370be0b [AArch64] Fix namespace issue. NFC 2021-05-06 11:16:07 -07:00
peter klausler 4f41994c13 [flang] Fix race condition in runtime
The code that initializes the default units 5 & 6 had
a race condition that would allow threads access to the
unit map before it had been populated.

Also add some missing calls to va_end() that will never
be called (they're in program abort situations) but might
elicit warnings if absent.

Differential Revision: https://reviews.llvm.org/D101928
2021-05-06 11:09:30 -07:00
Matthew Voss 22aece57be Allow llvm-dis to disassemble multiple files
Differential Revision: https://reviews.llvm.org/D101110
2021-05-06 11:08:55 -07:00
peter klausler 199a623ebf [flang] Runtime must defer formatted/unformatted determination
What the Fortran standard calls "preconnected" external I/O units
might not be known to be connected to unformatted or formatted files
until the first I/O data transfer statement is executed.
Support this deferred determination by representing the flag as
a tri-state Boolean and adapting its points of use.

Differential Revision: https://reviews.llvm.org/D101929
2021-05-06 11:06:43 -07:00
Arthur Eubanks 642df18f14 [gn build] Support compiler-rt/profile on Windows
Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D101961
2021-05-06 10:20:52 -07:00
thomasraoux 71eb32d97e [mlir][vector] Fix typo 2021-05-06 10:12:31 -07:00
thomasraoux 52525cb20f [mlir][linalg][NFC] Make reshape folding control more fine grain
This expose a lambda control instead of just a boolean to control unit
dimension folding.
This however gives more control to user to pick a good heuristic.
Folding reshapes helps fusion opportunities but may generate sub-optimal
generic ops.

Differential Revision: https://reviews.llvm.org/D101917
2021-05-06 10:11:39 -07:00
Thomas Lively b198b9b897 [WebAssembly] Fix argument types in SIMD narrowing intrinsics
The builtins were updated to take signed parameters in 627a526955, but the
intrinsics that use those builtins were not updated as well. The intrinsic test
did not catch this sign mismatch because it is only reported as an error under
-fno-lax-vector-conversions.

This commit fixes the type mismatch and adds -fno-lax-vector-conversions to the
test to catch similar problems in the future.

Differential Revision: https://reviews.llvm.org/D101979
2021-05-06 10:07:45 -07:00
Stefan Pintilie f0adf3a24c [PowerPC][LLD] Make sure that the correct Thunks are used.
This fixes an issue where mixed TOC / NOTOC calls can call the incorrect
thunks if a previous thunk already exists. The issue appears when a TOC
funciton calls a NOTOC callee and then a different NOTOC function calls the same
NOTOC callee. In this case the linker would sometimes incorrectly call the
same thunk for both cases.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D101837
2021-05-06 12:00:04 -05:00
Craig Topper 6660319cef [RISCV] Remove unused RISCV::VLEFF and VLEFF_MASK. NFC
Looks like these got left behind when vleff isel was moved to
X86ISelDAGToDAG.cpp
2021-05-06 09:41:29 -07:00
Hubert Tong e2d774a3db [AIX][Test][ORC] Skip unsupported ORC C API tests on AIX
As mentioned before in D78813, currently the XCOFF backend does not
support writing 64-bit object files, which the ORC JIT tests will try to
exercise if we are on AIX. This patch disables the tests on AIX for now.
This is consistent with what's been done, for example, regarding
`armv7`.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D101971
2021-05-06 12:36:56 -04:00
Denys Shabalin 1f109f9d9c Fix array attribute in bindings for linalg.init_tensor
Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D101998
2021-05-06 18:25:59 +02:00
Jonas Paulsson 1c4cb510b4 [SystemZ] Don't use libcall for 128 bit shifts.
Expand 128 bit shifts instead of using a libcall.

This patch removes the 128 bit shift libcalls and thereby causes
ExpandShiftWithUnknownAmountBit() to be called.

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D101993
2021-05-06 18:14:41 +02:00
Craig Topper 58323be415 [RISCV] Cleanup instruction formats used for B extension ternary operations.
Rename RVInstR4 as used by F/D/Zfh extensions to RVInstR4Frm.
Introduce new RVInstR4 that takes funct3 as a parameter.

Add new format classes for FSRI and FSRIW instead of trying to
bend RVInstR4 to use a shamt overlayed on rs2 and funct2.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D100427
2021-05-06 08:59:05 -07:00
Fraser Cormack 2e0ee68dc8 [LangRef][VP] Fix typos in VP sdiv/udiv examples 2021-05-06 16:37:18 +01:00
David Goldman 159dd447fe [clangd][ObjC] Highlight Objc Ivar refs
Treat them just like we do for properties - as a `property` semantic
token although ideally we could differentiate the two.

Differential Revision: https://reviews.llvm.org/D101785
2021-05-06 11:41:49 -04:00
Stanislav Mekhanoshin 28f1d018b1 [AMDGPU] Fix 64 bit DPP validation
AMDGPUAsmParser::isSupportedDPPCtrl() was failing to correctly
find a DPP register operand, regadless of the position it is
always src0. Moved this check into a new validateDPP() method
where we have full instruction already. In particular it was
failing to reject this case:

v_cvt_u32_f64 v5, v[0:1] quad_perm:[0,2,1,1] row_mask:0xf bank_mask:0xf

Essentially it was broken for any case where size of dst and
src0 differ.

It also improves the diagnostics with a proper error message.

The check in the InstPrinter also drops verification of the dst
register as it does not have anything to do with the dpp operand.

Differential Revision: https://reviews.llvm.org/D101930
2021-05-06 08:40:26 -07:00
Simon Pilgrim 338c1b701f [SLP] Constify the TreeEntry* input into getEntryCost() + setInsertPointAfterBundle(). NFCI. 2021-05-06 16:20:19 +01:00
Simon Pilgrim 2dab059021 [SLP] Constify the TreeEntry* input into dumpTreeCosts(). NFCI. 2021-05-06 16:20:19 +01:00
Simon Pilgrim 1b47489fd0 [SLP] Use empty() instead of size() == 0. NFCI. 2021-05-06 16:20:18 +01:00
Jez Ng 9260760235 [lld-macho] Support loading of zippered dylibs
ld64 can emit dylibs that support more than one platform (typically macOS and
macCatalyst). This diff allows LLD to read in those dylibs. Note that this is a
super bare-bones implementation -- in particular, I haven't added support for
LLD to emit those multi-platform dylibs, nor have I added a variety of
validation checks that ld64 does. Until we have a use-case for emitting zippered
dylibs, I think this is good enough.

Fixes PR49597.

Reviewed By: #lld-macho, oontvoo

Differential Revision: https://reviews.llvm.org/D101954
2021-05-06 11:19:40 -04:00
Jez Ng 7654d8e1a9 [lld-macho][nfc] Convert the mock libSystem.tbd to TBDv4
It doesn't seem like TBDv3 allows for specifying multiple platforms, so I'm
upgrading us to TBDv4. (We need to support multiple platforms in order to test
that we can handle zippered dylibs; that functionality will be added in an
upcoming diff.)

Differential Revision: https://reviews.llvm.org/D101953
2021-05-06 11:19:40 -04:00
thomasraoux 933551eaeb [mlir][NFC] Fix warning in VectorTransforms.cpp 2021-05-06 08:11:42 -07:00
thomasraoux 0b303da6f8 [mlir][vector] add pattern to cast away lead unit dimension for broadcast op
Differential Revision: https://reviews.llvm.org/D101955
2021-05-06 08:02:17 -07:00
Nemanja Ivanovic 1faf3b195e [PowerPC] Re-commit ed87f512bb
This was reverted in 3761b9a234 just
as I was about to commit the fix. This patch inlcudes the
necessary fix.
2021-05-06 09:50:12 -05:00
Austin Kerbow 172d746e16 [AMDGPU][NFC] Fix typos in SIFormMemoryClauses description
NFC.
2021-05-06 07:47:39 -07:00
David Spickett e4b790c5e3 [OpenMP] Temporarily require X86 target for parallel_for_codegen.cpp test
Since https://reviews.llvm.org/D101849 this test has been failing
on bots that only enable either Arm or AArch64 targets.

See: https://lab.llvm.org/buildbot/#/builders/107/builds/7601

Temporarily requires X86 for this test while the difference is figured out.
2021-05-06 14:16:43 +00:00
Louis Dionne fe0e86e602 [libc++] Rewrite std::to_address to avoid relying on element_type
This is a rough reapplication of the change that fixed std::to_address
to avoid relying on element_type (da456167). It is somewhat different
because the fix to avoid breaking Clang (which caused it to be reverted
in 347f69c55) was a bit more involved.

Differential Revision: https://reviews.llvm.org/D101638
2021-05-06 10:14:11 -04:00
Victor Huang bb113b9845 [AIX][TLS] Add support for TLSGD relocations to XCOFF objects
- Add branch absolute reloction R_RBA, R_TLS relocation for the variable offset
  for the tlsgd model and R_TLSM for the region handle for the tlsgd model
- Properly set the relocation fixed values for R_TLS and R_TLSM
- Emit the TCEntry with the variant kind in the XCOFFStreamer

Reviewed by: sfertile, nemanjai, DiggerLin

Differential Revision: https://reviews.llvm.org/D100214
2021-05-06 09:01:47 -05:00
Nico Weber 3761b9a234 Revert "[PowerPC] Provide some P8-specific altivec overloads for P7"
This reverts commit ed87f512bb.
Breaks check-clang, see e.g.
https://lab.llvm.org/buildbot/#/builders/139/builds/3818
2021-05-06 10:01:16 -04:00
Raphael Isemann 3026f75ed0 [lldb][NFC] Make assert in TestStaticVariables more expressive 2021-05-06 16:00:24 +02:00
Jay Foad 9e026273b0 [AMDGPU] SIInsertHardClauses: move more stuff into the class. NFC. 2021-05-06 14:47:54 +01:00
Nemanja Ivanovic ed87f512bb [PowerPC] Provide some P8-specific altivec overloads for P7
This adds additional support for XL compatibility. There are a number
of functions in altivec.h that produce a single instruction (or a
very short sequence) for Power8 but can be done on Power7 without
scalarization. XL provides these implementations.
This patch adds the following overloads for doubleword vectors:
vec_add
vec_cmpeq
vec_cmpgt
vec_cmpge
vec_cmplt
vec_cmple
vec_sl
vec_sr
vec_sra
2021-05-06 08:37:36 -05:00
Paul C. Anagnostopoulos d40a0b8af7 [TableGen] [Clang] Clean up Options.td and add asserts.
Differential Revision: https://reviews.llvm.org/D101766
2021-05-06 09:32:25 -04:00
Anastasia Stulova c28a602329 [OpenCL] Remove subgroups pragma in enqueue kernel and pipe builtins.
This patch simplifies the parser and makes the language semantics
consistent. There is no extension pragma requirement in the spec
for the subgroup functions in enqueue kernel or pipes and all other
builtin functions are available without the pragama.

Differential Revision: https://reviews.llvm.org/D100984
2021-05-06 13:59:38 +01:00
Jon Chesterfield b24e9f82b7 [amdgpu-arch] Fix rpath to run from build dir
[amdgpu-arch] Fix rpath to run from build dir

Prior to this, amdgpu-arch has RUNPATH set to $ORIGIN/../lib which works
for some installs, but not from the build directory where clang executes
the tool from when running tests.

This cmake option adds the location of the rocr runtime to the RUNPATH
(note, it amends RUNPATH here, despite the cmake option referring to RPATH)
to create a binary that runs from build or install location.

Before:
RUNPATH [$ORIGIN/../lib]
After:
RUNPATH [$ORIGIN/../lib:$HOME/llvm-install/lib]

Credit to Greg for knowing this trick and pointing to examples of it in use
for the aomp build scripts.

Reviewed By: pdhaliwal

Differential Revision: https://reviews.llvm.org/D101926
2021-05-06 13:07:00 +01:00
Carl Ritson 67cfefebbb [AMDGPU] Fix WQM failure with single block inactive demote
Instruction test for inactive kill/demote needs to be based on
actual opcode not whether instruction would be lowered to demote.

Reviewed By: piotr

Differential Revision: https://reviews.llvm.org/D101966
2021-05-06 21:02:26 +09:00
Malhar Jajoo fc690777fc Revert "[ARM] Transforming memcpy to Tail predicated Loop"
Reverting commit since it causes failure (10462).
This reverts commit b856f4a232.
2021-05-06 12:39:08 +01:00
Benjamin Kramer 3d746962ed [ORC] Silence unused variable warnings in Release builds. NFC. 2021-05-06 13:37:48 +02:00
David Green 4979c90458 [LV] Account for tripcount when calculation vectorization profitability
The loop vectorizer will currently assume a large trip count when
calculating which of several vectorization factors are more profitable.
That is often not a terrible assumption to make as small trip count
loops will usually have been fully unrolled. There are cases however
where we will try to vectorize them, and especially when folding the
tail by masking can incorrectly choose to vectorize loops that are not
beneficial, due to the folded tail rounding the iteration count up for
the vectorized loop.

The motivating example here has a trip count of 5, so either performs 5
scalar iterations or 2 vector iterations (with VF=4). At a high enough
trip count the vectorization becomes profitable, but the rounding up to
2 vector iterations vs only 5 scalar makes it unprofitable.

This adds an alternative cost calculation when we know the max trip
count and are folding tail by masking, rounding the iteration count up
to the correct number for the vector width. We still do not account for
anything like setup cost or the mixture of vector and scalar loops, but
this is at least an improvement in a few cases that we have had
reported.

Differential Revision: https://reviews.llvm.org/D101726
2021-05-06 12:36:46 +01:00
Ben Dunbobbin 5dd9f44c17 [LLD] Improve --strip-all help text
This is a slight improvement to the help text, as I was slightly
surprised when strip-all did more than remove the symbol table.

Currently, we match gold's help text for strip-all and strip-debug.
I think that the GNU documentation for these options is not particularly
clear. However, I have opted to make only a minor change here and keep
the help text similar to gold's as these are mature options that are
well understood.

ld.bfd (https://sourceware.org/binutils/docs/ld/Options.html) has a
similar implication although it defines strip-debug as a subset of
strip-all. However, felt that noting that strip-all implies strip-debug
is better; because, with the ld.bfd approach you have to read both the
--strip-debug and the --strip-all help text to understand the behaviour
of --strip-all (and the --strip-all help text doesn't indicate that he
--strip-debug help text is related).

Differential Revision: https://reviews.llvm.org/D101890
2021-05-06 12:34:06 +01:00
Christian Sigg a0d019fc89 [mlir] Add support for ops with regions in 'gpu-async-region' rewriter.
Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D101757
2021-05-06 13:21:28 +02:00
Simon Pilgrim 0fdce16efb [AMDGPU] Regenerate fp2int tests. NFCI. 2021-05-06 11:55:14 +01:00
Simon Pilgrim 20e976e248 [AMDGPU] Regenerate shift tests. NFCI. 2021-05-06 11:55:13 +01:00
Jonas Paulsson a0da66bc13 [SystemZ] Support builtin_frame_address with packed stack without backchain.
In order to use __builtin_frame_address(0) with packed stack and no
backchain, the address of where the backchain would have been written is
returned (like GCC).

This address may either contain a saved register or be unused.

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D101897
2021-05-06 12:50:49 +02:00
Kerry McLaughlin 8c9742bd23 [SVE][LoopVectorize] Add support for scalable vectorization of first-order recurrences
Adds support for scalable vectorization of loops containing first-order recurrences, e.g:
```
for(int i = 0; i < n; i++)
  b[i] =  a[i] + a[i - 1]
```
This patch changes fixFirstOrderRecurrence for scalable vectors to take vscale into
account when inserting into and extracting from the last lane of a vector.
CreateVectorSplice has been added to construct a vector for the recurrence, which
returns a splice intrinsic for scalable types. For fixed-width the behaviour
remains unchanged as CreateVectorSplice will return a shufflevector instead.

The tests included here are the same as test/Transform/LoopVectorize/first-order-recurrence.ll

Reviewed By: david-arm, fhahn

Differential Revision: https://reviews.llvm.org/D101076
2021-05-06 11:35:39 +01:00
Eliza Velasquez cdf33962d9 [clang-format] Rename common types between C#/JS
Reviewed By: curdeius

Differential Revision: https://reviews.llvm.org/D101862
2021-05-06 12:12:58 +02:00
Eliza Velasquez ec725b307f [clang-format] Fix C# nullable-related errors
This fixes two errors:

Previously, clang-format was splitting up type identifiers from the
nullable ?. This changes this behavior so that the type name sticks with
the operator.

Additionally, nullable operators attached to return types in interface
functions were not parsed correctly. Digging deeper, it looks like
interface bodies were being parsed differently than classes and structs,
causing MustBeDeclaration to be incorrect for interface members. They
now share the same logic.

One other change is reintroducing the CSharpNullable type independent of
JsTypeOptionalQuestion. Despite having a similar semantic purpose, their
actual syntax differs quite a bit.

Reviewed By: MyDeveloperDay, curdeius

Differential Revision: https://reviews.llvm.org/D101860
2021-05-06 12:11:15 +02:00
Eliza Velasquez a437befa8f [clang-format] Add more support for C# 8 nullables
This adds support for the null-coalescing assignment and null-forgiving
operators.

https://docs.microsoft.com/en-us/dotnet/csharp/language-reference/operators/null-coalescing-operator

https://docs.microsoft.com/en-us/dotnet/csharp/language-reference/operators/null-forgiving

Reviewed By: krasimir, curdeius

Differential Revision: https://reviews.llvm.org/D101702
2021-05-06 11:58:38 +02:00
Jay Foad 7c706af03b [AMDGPU] SIFoldOperands: clean up tryConstantFoldOp
First clean up the strange API of tryConstantFoldOp where it took an
immediate operand value, but no indication of which operand it was the
value for.

Second clean up the loop that calls tryConstantFoldOp so that it does
not have to restart from the beginning every time it folds an
instruction.

This is NFCI but there are some minor changes caused by the order in
which things are folded.

Differential Revision: https://reviews.llvm.org/D100031
2021-05-06 09:55:22 +01:00