Commit Graph

420327 Commits

Author SHA1 Message Date
Matthias Springer 7e6de86ff6 [mlir][bufferize][NFC] Remove caller map and ordered func list from FuncAnalysisState
These can be local variables. No need to store them in the struct.

Differential Revision: https://reviews.llvm.org/D123210
2022-04-07 00:49:24 +09:00
Matthias Springer cb186bc508 [mlir][bufferize][NFC] Rename ModuleAnalysisState to FuncAnalysisState
This is for consistency reasons. `*AnalysisState` always starts with the name of the dialect.

Differential Revision: https://reviews.llvm.org/D123209
2022-04-07 00:48:53 +09:00
Mark de Wever 3fb3770983 [libc++] Use cpp20_output_iterator in tests.
Adds the new cpp20_output_iterator in the ranges::transform test.

Reviewed By: philnik, #libc

Differential Revision: https://reviews.llvm.org/D123139
2022-04-06 17:48:27 +02:00
Mark de Wever d78624975b [NFC][libc++] Modularize chrono's calendar.
The is a followup of D116965 to split the calendar header. This is a
preparation to add the formatters for the chrono header.

The code is only moved no other changes have been made.

Reviewed By: ldionne, #libc, philnik

Differential Revision: https://reviews.llvm.org/D122995
2022-04-06 17:47:53 +02:00
Arjun P 1ba6043332 [MLIR][Presburger] Refactor subtraction in preparation for making it iterative
Refactor the operation of subtraction by
- removing the usage of SimplexRollbackScopeExit since this
  can't be used in the iterative version
- reducing the number of stack variables to make the
  iterative version easier to follow

Reviewed By: Groverkss

Differential Revision: https://reviews.llvm.org/D123156
2022-04-06 16:35:28 +01:00
Roman Lebedev 9be6e7b0f2
[X86] `lowerBuildVectorAsBroadcast()`: with AVX512VL, allow i64->XMM broadcasts from constant pool
Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D123221
2022-04-06 18:33:40 +03:00
Sam McCall af89e4792d [pseudo] Add crude heuristics to choose taken preprocessor branches.
In files where different preprocessing paths are possible, our goal is to
choose a preprocessed token sequence which we can parse that pins down as much
of the grammatical structure as possible.
This forms the "primary parse", and the not-taken branches get parsed later,
and are constrained to be compatible with the primary parse.

Concretely:
  int x =
    #ifdef // TAKEN
      2 + 2 + 2 // determined during primary parse to be an expression
    #else
      2 // constrained to be an expression during a secondary parse
    #endif
    ;

Differential Revision: https://reviews.llvm.org/D121165
2022-04-06 17:22:35 +02:00
Matthias Springer f4f1cf6c31 [mlir][bufferize] Better analysis for return values of CallOps
Support returning arbitrary tensors from functions. Even those that are
not equivalent. To that end, additional information is gathered during
the analysis phase. In particular, which function args are aliasing with
which return values.

Also fix bugs in the current implementation when returning equivalent
tensors. Various unit tests are added to ensure that we have better test
coverage.

Note: Returning non-equivalent tensors is only allowed when
allowReturnAllocs is enabled. This functionality is useful for unit
testing and compatibility with other bufferizations such as the sparse
compiler. This is also towards using ModuleBufferization as a
replacement for --func-bufferize.

Differential Revision: https://reviews.llvm.org/D119120
2022-04-06 23:54:32 +09:00
Matthias Springer cd7de446fd [mlir][bufferize] Simplify ModuleBufferization driver
* Bufferize FuncOp bodies and boundaries in the same loop. This is in preparation of moving FuncOp bufferization into an external model implementation.
* As a side effect, stop bufferization earlier if there was an error. (Do not continue bufferization, fewer error messages.)
* Run equivalence analysis of CallOps before the main analysis. This is needed so that equialvence info is propagated properly.

Differential Revision: https://reviews.llvm.org/D123208
2022-04-06 23:53:07 +09:00
Matthias Springer 5ab34492d6 [mlir][bufferize] Fix dropped return type in ModuleBufferization
Differential Revision: https://reviews.llvm.org/D123192
2022-04-06 23:48:15 +09:00
Paul Walker 1c307b9794 [NFC] Remove redundant IndexType canonicalisation from DAGTypeLegalizer::PromoteIntOp_MSCATTER
Promotion does not affect the base element type and so the original
index type will remain unchanged.  This reflects the behaviour of
DAGTypeLegalizer::PromoteIntOp_MGATHER with no tests affected.
2022-04-06 15:30:29 +01:00
Paul Walker 5e407f0887 [SVE] Add gather/scatter tests to highlight bugs in their generated code. 2022-04-06 15:30:29 +01:00
LLVM GN Syncbot c59e833942 [gn build] Port afa94306a8 2022-04-06 14:24:39 +00:00
Sam McCall afa94306a8 [clangd] Add code action to generate a constructor for a C++ class
Differential Revision: https://reviews.llvm.org/D116514
2022-04-06 16:23:50 +02:00
LLVM GN Syncbot bb47e1fe3d [gn build] Port 68eac9a6e7 2022-04-06 14:15:16 +00:00
Sam McCall 68eac9a6e7 [clangd] Code action to declare missing move/copy constructor/assignment
Fixes https://github.com/clangd/clangd/issues/973

Differential Revision: https://reviews.llvm.org/D116490
2022-04-06 16:14:42 +02:00
Shengchen Kan 05535f3d07 [X86][tablgen] Add one entry manually into the memory folding table
```
{"MMX_MOVD64grr", "MMX_MOVD64mr"}
```
This pair has different opcodes.
2022-04-06 22:06:15 +08:00
chenglin.bi 87f0d55304 [AArch64] Fold lsr+bfi in tryBitfieldInsertOpFromOr
In tryBitfieldInsertOpFromOr, if the new created LSR Node's source
is LSR with Imm shift, try to fold them.

Fixes https://github.com/llvm/llvm-project/issues/54696

Reviewed By: efriedma, benshi001

Differential Revision: https://reviews.llvm.org/D122915
2022-04-06 22:02:31 +08:00
Nikita Popov 1dc1d5a0d2 [SimplifyLibCalls] Use KnownBits helper APIs (NFC)
Use helper APIs for isNonNegative() and getMaxValue() instead of
flipping the zero value and having a long comment explaining why
that is necessary.
2022-04-06 16:01:24 +02:00
Paul Robinson 31c971145f [PS4] clang-format PS4CPU.cpp/.h 2022-04-06 06:52:29 -07:00
Augie Fackler 33b1f41914 MemoryBuiltins: getAllocAlignment is now useful for non-allocator funcs
This has been true since dba73135c8, but
didn't matter until now because clang wasn't emitting allocalign
attributes.

Differential Revision: https://reviews.llvm.org/D121640
2022-04-06 09:51:38 -04:00
Jay Foad 538c77172a [AMDGPU] Fix unused variable warning after D117484 2022-04-06 14:45:38 +01:00
Jean Perier c58c64d05c [flang] Add runtime API to catch unit number out of range
Unit numbers must fit on a default integer. It is however possible that
the user provides the unit number in UNIT with a wider integer type.
In such case, lowering was previously silently narrowing
the value and passing the result to the BeginXXX runtime entry points.
Cases where the conversion caused overflow were not reported/caught.
Most existing compilers catch these errors and raise an IO error.
Add a CheckUnitNumberInRange runtime API to do the same in f18.

This runtime API has its own error management interface (i.e., does not
use GetIoMsg, EndIo, and EnableHandlers) because the usual error
management requires BeginXXX to be called to set up the error
management. But in this case, the BeginXXX cannot be called since
the bad unit number that would be provided to it overflew (and in the worst
case scenario, the narrowed value could point to a different valid unit
already in use). Hence I decided to make an API that must be called
before the BeginXXX and should trigger the whole BeginXXX/.../EndIoStatement
to be skipped in case the unit number is too big and the user enabled
error recovery.

Note that CheckUnitNumberInRange accepts negative numbers (as long as
they can fit on a default integer), because unit numbers may be negative
if they were created by NEWUNIT.

Differential Revision: https://reviews.llvm.org/D123157
2022-04-06 15:38:13 +02:00
Shengchen Kan f4661b5a55 [X86] Fold MMX_MOVD64from64rr + store to MMX_MOVQ64mr instead of MMX_MOVD64from64mr in auto-generated table
This is a follow-up patch for D122241.
2022-04-06 21:33:57 +08:00
zhongyunde 9a2d5cc1da [SVE][AArch64] Enable first active true vector combine for INTRINSIC_WO_CHAIN
WHILELO/LS insn is used very important for SVE loop, and itself
is a flag-setting operation, so add it.

Reviewed By: paulwalker-arm, david-arm

Differential Revision: https://reviews.llvm.org/D122796
2022-04-06 21:01:37 +08:00
Hansang Bae e4ac11beb7 [OpenMP] Add support for ompt_callback_dispatch
This change adds support for ompt_callback_dispatch with the new
dispatch chunk type introduced in 5.2. Definitions of the new
ompt_work_loop types were also added in the header file.

Differential Revision: https://reviews.llvm.org/D122107
2022-04-06 08:01:02 -05:00
zhongyunde 19e5235147 [AArch64][InstCombine] Fold MLOAD and zero extensions into MLOAD
Accord the discussion in D122281, we missing an ISD::AND combine for MLOAD
because it relies on BuildVectorSDNode is fails for scalable vectors.
This patch is intend to handle that, so we can circle back the type MVT::nxv2i32

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D122703
2022-04-06 20:50:42 +08:00
Louis Dionne e27a122b3a [libc++] Support arrays in make_shared and allocate_shared (P0674R1)
This patch implements P0674R1, i.e. support for arrays in std::make_shared
and std::allocate_shared.

Co-authored-by: Zoe Carver <z.zoelec2@gmail.com>

Differential Revision: https://reviews.llvm.org/D62641
2022-04-06 08:42:55 -04:00
Shengchen Kan eddd399c98 [X86][tablgen] Add three entries manually into the memory folding table
```
{X86::MOVLHPSrr,X86::MOVHPSrm}
{X86::VMOVLHPSZrr,X86::VMOVHPSZ128rm}
{X86::VMOVLHPSrr,X86::VMOVHPSrm}
```

Each of the three pairs has different mnemonic, so we have to add it
manually. This is a follow-up patch for D122477.
2022-04-06 20:37:39 +08:00
Nico Weber edddf384c2 [gn build] (manually) port 83a798d4b0 (abi_breaking_checks in tests) 2022-04-06 08:31:20 -04:00
Simon Pilgrim 3681292294 [AMDGPU] Regenerate shared-op-cycle.ll test 2022-04-06 12:23:17 +01:00
Simon Pilgrim f743159037 [AMDGPU] Regenerate pv-packing.ll test 2022-04-06 12:23:17 +01:00
Roman Lebedev 34ce9fd864
[TLI] `TargetLowering::SimplifyDemandedVectorElts()`: narrowing bitcast: fill known zero elts from known src bits
E.g. in
```
%i0 = zext <2 x i8> to <2 x i16>
%i1 = bitcast <2 x i16> to <4 x i8>
```
the `%i0`'s zero bits are known to be `0xFF00` (upper half of every element is known zero),
but no elements are known to be zero, and for `%i1`, we don't know anything about zero bits,
but the elements under `0b1010` mask are known to be zero (i.e. the odd elements).

But, we didn't perform such a propagation.

Noticed while investigating more aggressive `vpmaddwd` formation.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D123163
2022-04-06 14:19:31 +03:00
Daniil Kovalev 83a798d4b0 [CodeGen] Place SDNode debug ID declaration under appropriate #if
Place PersistentId declaration under #if LLVM_ENABLE_ABI_BREAKING_CHECKS to
reduce memory usage when it is not needed.

Differential Revision: https://reviews.llvm.org/D120714
2022-04-06 14:09:32 +03:00
Alex Zinenko 82c18dd9ad [mlir] Fix DialectRegistry::addExtension compile error
It appears that the DialectRegistry::addExtension template was never
instantiated because it contains an obvious compilation error. Fix it.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D123199
2022-04-06 13:00:34 +02:00
Nathan Sidwell ba4482f481 [clang][NFC] Add specificity to compatibility hack
Add specific dates and versions to note about source_location handling.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D123119
2022-04-06 03:57:36 -07:00
Jeremy Morse fb6596f1ec [DebugInfo][InstrRef] Avoid a crash from mixed variable location modes
Variable locations now come in two modes, instruction referencing and
DBG_VALUE. At -O0 we pick DBG_VALUE to allow fast construction of variable
information. Unfortunately, SelectionDAG edits the optimisation level in
the presence of opt-bisect-limit, meaning different passes have different
views of what variable location mode we should use. That causes assertions
when they're mixed.

This patch plumbs through a boolean in SelectionDAG from start to
instruction emission, so that we don't rely on the current optimisation
level for correctness.

Differential Revision: https://reviews.llvm.org/D123033
2022-04-06 11:55:38 +01:00
Sven van Haastregt 77c74fd877 [OpenCL] Remove argument names from math builtins
This simplifies completeness comparisons against OpenCLBuiltins.td and
also makes the header no longer "claim" the argument name identifiers.

Continues the direction set out in D119560.
2022-04-06 11:43:59 +01:00
Alexander Belyaev 747b10be95 Revert "Revert "[mlir] Rewrite canonicalization of collapse(expand) and expand(collapse).""
This reverts commit 96e9b6c9dc.
2022-04-06 12:18:30 +02:00
Jay Foad a73006bd09 [AMDGPU] Add a test for setting WAVESIZE in pixel shaders 2022-04-06 11:02:06 +01:00
Wei Xiao 6c0e043866 [X86] Add test for smin(x, 0) & smax(x, 0) 2022-04-06 18:01:08 +08:00
Simon Pilgrim 8be0da7901 [AMDGPU] Regenerate omod.ll tests 2022-04-06 10:55:54 +01:00
Jay Foad aa1b22db0f [AMDGPU] Add a test for setting EXTRA_LDS_SIZE in pixel shaders 2022-04-06 10:49:55 +01:00
Antonio Frighetto 060ff66337 Add support for more archs in `Triple::getArchTypeForLLVMName`
Add support for i386, s390x in Triple::getArchTypeForLLVMName.

Differential Revision: https://reviews.llvm.org/D122003
2022-04-06 10:43:31 +01:00
Roman Sokolkov 153431ec7a [docs] Fix Kaleidoscope code example
* replace virtual with override
* use default like in full code example

Differential Revision: https://reviews.llvm.org/D123110
2022-04-06 10:41:10 +01:00
Simon Pilgrim 3369e474bb [DAG] Allow XOR(X,MIN_SIGNED_VALUE) to perform AddLike folds
As raised on PR52267, XOR(X,MIN_SIGNED_VALUE) can be treated as ADD(X,MIN_SIGNED_VALUE), so let these cases use the 'AddLike' folds, similar to how we perform no-common-bits OR(X,Y) cases.

define i8 @src(i8 %x) {
  %r = xor i8 %x, 128
  ret i8 %r
}
=>
define i8 @tgt(i8 %x) {
  %r = add i8 %x, 128
  ret i8 %r
}
Transformation seems to be correct!

https://alive2.llvm.org/ce/z/qV46E2

Differential Revision: https://reviews.llvm.org/D122754
2022-04-06 10:37:11 +01:00
Matthias Springer 7a50560354 [mlir][bufferize][NFC] Clean up ModuleBufferizationState
* Store bbArg indices instead of BlockArguments, so that args can be changed during bufferizationn.
* Use type aliases for better readability.

Differential Revision: https://reviews.llvm.org/D123191
2022-04-06 18:32:53 +09:00
Shengchen Kan 4d21497006 [X86] Remove TB_NO_REVERSE for 2 memory folding entries
```
X86::MMX_MOVD64from64rr -> X86::MMX_MOVQ64mr
X86::MMX_MOVD64grr -> X86::MMX_MOVD64mr
```

These two entries were added in llvm-svn: 372770.
I think these two should be reversable.

Reviewed By: RKSimon, pengfei

Differential Revision: https://reviews.llvm.org/D122217
2022-04-06 17:21:12 +08:00
Nicolas Vasilache fc8f465a00 [mlir][MemRef] Allow transposed layouts in ExpandShapeOp.
https://reviews.llvm.org/D122641 introduced fixes to the ExpandShapeOp verifier
but also introduced an artificial layout limitation that prevents the consideration of transposed layouts.

This revision fixes the omissions and reimplements the logic using saturated arithmetic which is more
idiomatic and avoids leaking internal implementation details.

Tests cases are added for transposed layouts.

Reviewed By: springerm

Differential Revision: https://reviews.llvm.org/D122845
2022-04-06 04:19:30 -04:00
Simon Pilgrim 9e97b2a477 [DAG] SimplifySetCC - relax fold (X^C1) == C2 --> X == C1^C2
https://alive2.llvm.org/ce/z/A_auBq

Remove limitation that wouldn't perform the fold if all the inverted bits are known zero

The thumb2 changes look to be benign, although it does show that the TEQ/TST isel patterns could probably be improved.

Fixes movmsk regression in D122754

Differential Revision: https://reviews.llvm.org/D123023
2022-04-06 09:18:08 +01:00