4 Commits

Author	SHA1	Message	Date
Sander de Smalen	c067c30d9e	[AArch64] Asm: Fix parsing of register aliases that have a name starting with 'z' ... Summary: This fixes an issue as identified by @rnk in https://reviews.llvm.org/rL321029. Reviewers: rnk, fhahn, rengolin, efriedma, echristo, olista01 Reviewed By: rnk, fhahn Subscribers: aemerson, javed.absar, kristof.beyls, llvm-commits, rnk Differential Revision: https://reviews.llvm.org/D41382 llvm-svn: 321158	2017-12-20 09:45:45 +00:00
Reid Kleckner	8f3c351aa3	Add test for .req directive starting with 'p' ... Reduced test case from libjpeg_turbo. llvm-svn: 321029	2017-12-18 22:01:18 +00:00
Frederic Riss	b61f01f1c2	Fix some unnoticed/unwanted behavior change from r222319. ... The ARM assembler allows register alias redefinitions as long as it targets the same register. r222319 broke that. In the AArch64 case it would just produce a new warning, but in the ARM case it would error out on previously accepted assembler. llvm-svn: 228109	2015-02-04 03:10:03 +00:00
Saleem Abdulrasool	2e09c514c0	aarch64: support target-specific .req assembler directive ... Based on the support for .req on ARM. The aarch64 variant has to keep track if the alias register was a vector register (v0-31) or a general purpose or VFP/Advanced SIMD ([bhsdq]0-31) register. Patch by Janne Grunau! llvm-svn: 212161	2014-07-02 04:50:23 +00:00