295bbea3ed
AMDGPU/GlobalISel: Fix non-power-of-2 G_SITOFP/G_UITOFP
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This wouldn't work for s33-s63 sources.
2020-02-16 22:48:57 -05:00
bc276c6379
GlobalISel: Lower s1 source G_SITOFP/G_UITOFP
2019-11-15 13:37:20 +05:30
a5376f6322
[GlobalISel][AArch64][AMDGPU][X86] Teach LegalizationArtifactCombiner to combine trunc(g_constant).
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This allows X86 to properly form shift by immediate instructions
since we require an 8-bit constant to match the imported
SelectionDAG patterns.
2019-10-24 12:59:26 -07:00
c8a6df7130
AMDGPU/GlobalISel: Clamp G_SITOFP/G_UITOFP sources
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llvm-svn: 373989
2019-10-07 23:33:08 +00:00
0a6123595f
AMDGPU/GlobalISel: Select s32->s16 G_[US]ITOFP
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llvm-svn: 371949
2019-09-16 00:29:12 +00:00
a4be3eff5c
AMDGPU/GlobalISel: Legalize s32->s16 G_SITOFP/G_UITOFP
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llvm-svn: 371811
2019-09-13 04:04:55 +00:00
2f29220d6d
AMDGPU/GlobalISel: Implement s64->s64 [SU]ITOFP
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llvm-svn: 361082
2019-05-17 23:05:18 +00:00
02b5ca8cd1
GlobalISel: Implement lower for S64->S32 [SU]ITOFP
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This is ported from the custom AMDGPU DAG implementation. I think this
is a better default expansion than what the DAG currently uses, at
least if the target has CTLZ.
This implements the signed version in terms of the unsigned
conversion, which is implemented with bit operations. SelectionDAG has
several other implementations that should eventually be ported
depending on what instructions are legal.
llvm-svn: 361081
2019-05-17 23:05:13 +00:00
fb67164ebc
AMDGPU/GlobalISel: Legalize more fp<->int conversions
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llvm-svn: 351767
2019-01-22 00:20:17 +00:00
Matt Arsenault